From 0b5b6429a080c6526daeb262fee96e7d0408b4f8 Mon Sep 17 00:00:00 2001
From: Feilong Jiang <fjiang@openjdk.org>
Date: Wed, 3 May 2023 02:23:41 +0000
Subject: [PATCH] 8307150: RISC-V: Remove remaining StoreLoad barrier with
 UseCondCardMark for Serial/Parallel GC

Reviewed-by: shade, fyang
---
 .../cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp   | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp b/src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp
index 070ec8e6338..2ad44400687 100644
--- a/src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp
+++ b/src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp
@@ -49,7 +49,6 @@ void CardTableBarrierSetAssembler::store_check(MacroAssembler* masm, Register ob
 
   if (UseCondCardMark) {
     Label L_already_dirty;
-    __ membar(MacroAssembler::StoreLoad);
     __ lbu(t1,  Address(tmp));
     __ beqz(t1, L_already_dirty);
     __ sb(zr, Address(tmp));