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8182138: Disable generating INC and DEC instructions on Xeon Phi and ATOM CPUs

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Reviewed-by: kvn
This commit is contained in:
Rahul Kandu 2017-06-23 15:16:23 -07:00 committed by Vladimir Kozlov
parent 5e4cca403b
commit 12970ac663
2 changed files with 7 additions and 7 deletions
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12
hotspot/src/cpu/x86/vm/vm_version_x86.cpp
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@ -648,9 +648,7 @@ void VM_Version::get_processor_features() {
}
if( is_intel() ) { // Intel cpus specific settings
if ((cpu_family() == 0x06) &&
((extended_cpu_model() == 0x57) || // Xeon Phi 3200/5200/7200
(extended_cpu_model() == 0x85))) { // Future Xeon Phi
if (is_knights_family()) {
_features &= ~CPU_VZEROUPPER;
}
}
@ -1177,10 +1175,7 @@ void VM_Version::get_processor_features() {
FLAG_SET_DEFAULT(UseSSE42Intrinsics, false);
}
}
if ((cpu_family() == 0x06) &&
((extended_cpu_model() == 0x36) || // Centerton
(extended_cpu_model() == 0x37) || // Silvermont
(extended_cpu_model() == 0x4D))) {
if (is_atom_family() || is_knights_family()) {
#ifdef COMPILER2
if (FLAG_IS_DEFAULT(OptoScheduling)) {
OptoScheduling = true;
@ -1191,6 +1186,9 @@ void VM_Version::get_processor_features() {
UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus
}
}
if (FLAG_IS_DEFAULT(UseIncDec)) {
FLAG_SET_DEFAULT(UseIncDec, false);
}
}
if(FLAG_IS_DEFAULT(AllocatePrefetchInstr) && supports_3dnow_prefetch()) {
FLAG_SET_DEFAULT(AllocatePrefetchInstr, 3);

2
hotspot/src/cpu/x86/vm/vm_version_x86.hpp
View File

@ -641,6 +641,8 @@ public:
static bool is_P6() { return cpu_family() >= 6; }
static bool is_amd() { assert_is_initialized(); return _cpuid_info.std_vendor_name_0 == 0x68747541; } // 'htuA'
static bool is_intel() { assert_is_initialized(); return _cpuid_info.std_vendor_name_0 == 0x756e6547; } // 'uneG'
static bool is_atom_family() { return ((cpu_family() == 0x06) && ((extended_cpu_model() == 0x36) || (extended_cpu_model() == 0x37) || (extended_cpu_model() == 0x4D))); } //Silvermont and Centerton
static bool is_knights_family() { return ((cpu_family() == 0x06) && ((extended_cpu_model() == 0x57) || (extended_cpu_model() == 0x85))); } // Xeon Phi 3200/5200/7200 and Future Xeon Phi
static bool supports_processor_topology() {
return (_cpuid_info.std_max_function >= 0xB) &&