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8388173: Shenandoah: Overly strict assertion failure in CAS barrier

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Reviewed-by: shade, xpeng
This commit is contained in:
William Kemper 2026-07-14 18:42:48 +00:00
parent 0efadf5f54
commit 189dde7dfe
1 changed files with 4 additions and 5 deletions
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9
src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp
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@ -705,10 +705,9 @@ void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, Mac
assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
// Oldval and newval can be in the same register, but all other registers should be
// distinct for extra safety, as we shuffle register values around.
assert_different_registers(oldval, tmp, addr.base(), addr.index());
assert_different_registers(newval, tmp, addr.base(), addr.index());
// Oldval and newval cannot be clobbered by aliasing with tmp.
assert_different_registers(oldval, tmp);
assert_different_registers(newval, tmp);
ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp, noreg, noreg, narrow);
@ -729,7 +728,7 @@ void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, Mac
}
void ShenandoahBarrierSetAssembler::get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register newval, Address addr, Register tmp, bool narrow) {
assert_different_registers(newval, tmp, addr.base(), addr.index());
assert_different_registers(newval, tmp);
ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp, noreg, noreg, narrow);