From 2313f8e4ebe5b6d7542fa8a33fd08673cc0caf10 Mon Sep 17 00:00:00 2001 From: Fei Yang Date: Wed, 24 Sep 2025 11:31:09 +0000 Subject: [PATCH] 8368366: RISC-V: AlignVector is mistakenly set to AvoidUnalignedAccesses Reviewed-by: fjiang, rehn, mli --- src/hotspot/cpu/riscv/vm_version_riscv.cpp | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp index e0c3b303750..1bb9509cdde 100644 --- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp +++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp @@ -477,10 +477,6 @@ void VM_Version::c2_initialize() { warning("AES/CTR intrinsics are not available on this CPU"); FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); } - - if (FLAG_IS_DEFAULT(AlignVector)) { - FLAG_SET_DEFAULT(AlignVector, AvoidUnalignedAccesses); - } } #endif // COMPILER2