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8071282: remove misc dead code
Cleanup of dead code done Reviewed-by: kvn, thartmann
This commit is contained in:
parent
d1f090f569
commit
24fd306c51
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -213,10 +213,6 @@ inline oop* frame::interpreter_frame_temp_oop_addr() const {
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return (oop *)(fp() + interpreter_frame_oop_temp_offset);
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}
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inline int frame::pd_oop_map_offset_adjustment() const {
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return 0;
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}
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inline int frame::interpreter_frame_monitor_size() {
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return BasicObjectLock::size();
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}
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@ -243,24 +239,6 @@ inline JavaCallWrapper** frame::entry_frame_call_wrapper_addr() const {
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// Compiled frames
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inline int frame::local_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors) {
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return (nof_args - local_index + (local_index < nof_args ? 1: -1));
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}
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inline int frame::monitor_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors) {
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return local_offset_for_compiler(local_index, nof_args, max_nof_locals, max_nof_monitors);
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}
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inline int frame::min_local_offset_for_compiler(int nof_args, int max_nof_locals, int max_nof_monitors) {
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return (nof_args - (max_nof_locals + max_nof_monitors*2) - 1);
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}
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inline bool frame::volatile_across_calls(Register reg) {
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return true;
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}
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inline oop frame::saved_oop_result(RegisterMap* map) const {
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oop* result_adr = (oop *)map->location(r0->as_VMReg());
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guarantee(result_adr != NULL, "bad register save location");
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -230,10 +230,6 @@ inline JavaCallWrapper** frame::entry_frame_call_wrapper_addr() const {
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// Compiled frames
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inline bool frame::volatile_across_calls(Register reg) {
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return true;
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}
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inline oop frame::saved_oop_result(RegisterMap* map) const {
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oop* result_adr = (oop*) map->location(R0->as_VMReg());
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guarantee(result_adr != NULL, "bad register save location");
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012, 2017, SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -289,14 +289,6 @@ void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr bas
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}
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void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
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LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
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LIR_Opr tmp = FrameMap::R0_opr;
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__ load(new LIR_Address(base, disp, type), tmp, info);
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__ cmp(condition, reg, tmp);
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}
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bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
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assert(left != result, "should be different registers");
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if (is_power_of_2(c + 1)) {
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@ -83,13 +83,6 @@ void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_by
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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Unimplemented(); // Currently unused.
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//if (C1Breakpoint) illtrap();
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//inline_cache_check(receiver, ic_klass);
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}
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void C1_MacroAssembler::verified_entry() {
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if (C1Breakpoint) illtrap();
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// build frame
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2017, SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -226,10 +226,6 @@ void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr bas
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__ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
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}
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void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
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__ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
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}
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bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
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if (tmp->is_valid()) {
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if (is_power_of_2(c + 1)) {
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -73,10 +73,6 @@ void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_by
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push_frame(frame_size_in_bytes);
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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ShouldNotCallThis(); // unused
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}
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void C1_MacroAssembler::verified_entry() {
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if (C1Breakpoint) z_illtrap(0xC1);
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -285,13 +285,6 @@ void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr bas
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}
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void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
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LIR_Opr o7opr = FrameMap::O7_opr;
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__ load(new LIR_Address(base, disp, type), o7opr, info);
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__ cmp(condition, reg, o7opr);
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}
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bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
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assert(left != result, "should be different registers");
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if (is_power_of_2(c + 1)) {
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -64,12 +64,6 @@ void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_by
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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if (C1Breakpoint) breakpoint_trap();
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inline_cache_check(receiver, ic_klass);
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}
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void C1_MacroAssembler::verified_entry() {
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if (C1Breakpoint) breakpoint_trap();
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// build frame
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -86,12 +86,6 @@ inline intptr_t* frame::sender_sp() const { return fp(); }
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inline intptr_t* frame::real_fp() const { return fp(); }
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// Used only in frame::oopmapreg_to_location
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// This return a value in VMRegImpl::slot_size
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inline int frame::pd_oop_map_offset_adjustment() const {
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return _sp_adjustment_by_callee * VMRegImpl::slots_per_word;
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}
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inline intptr_t** frame::interpreter_frame_locals_addr() const {
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return (intptr_t**) sp_addr_at( Llocals->sp_offset_in_saved_window());
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}
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@ -191,61 +185,6 @@ inline JavaCallWrapper** frame::entry_frame_call_wrapper_addr() const {
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}
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inline int frame::local_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors) {
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// always allocate non-argument locals 0..5 as if they were arguments:
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int allocated_above_frame = nof_args;
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if (allocated_above_frame < callee_register_argument_save_area_words)
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allocated_above_frame = callee_register_argument_save_area_words;
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if (allocated_above_frame > max_nof_locals)
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allocated_above_frame = max_nof_locals;
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// Note: monitors (BasicLock blocks) are never allocated in argument slots
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//assert(local_index >= 0 && local_index < max_nof_locals, "bad local index");
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if (local_index < allocated_above_frame)
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return local_index + callee_register_argument_save_area_sp_offset;
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else
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return local_index - (max_nof_locals + max_nof_monitors*2) + compiler_frame_vm_locals_fp_offset;
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}
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inline int frame::monitor_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors) {
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assert(local_index >= max_nof_locals && ((local_index - max_nof_locals) & 1) && (local_index - max_nof_locals) < max_nof_monitors*2, "bad monitor index");
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// The compiler uses the __higher__ of two indexes allocated to the monitor.
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// Increasing local indexes are mapped to increasing memory locations,
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// so the start of the BasicLock is associated with the __lower__ index.
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int offset = (local_index-1) - (max_nof_locals + max_nof_monitors*2) + compiler_frame_vm_locals_fp_offset;
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// We allocate monitors aligned zero mod 8:
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assert((offset & 1) == 0, "monitor must be an an even address.");
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// This works because all monitors are allocated after
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// all locals, and because the highest address corresponding to any
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// monitor index is always even.
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assert((compiler_frame_vm_locals_fp_offset & 1) == 0, "end of monitors must be even address");
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return offset;
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}
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inline int frame::min_local_offset_for_compiler(int nof_args, int max_nof_locals, int max_nof_monitors) {
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// always allocate non-argument locals 0..5 as if they were arguments:
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int allocated_above_frame = nof_args;
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if (allocated_above_frame < callee_register_argument_save_area_words)
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allocated_above_frame = callee_register_argument_save_area_words;
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if (allocated_above_frame > max_nof_locals)
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allocated_above_frame = max_nof_locals;
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int allocated_in_frame = (max_nof_locals + max_nof_monitors*2) - allocated_above_frame;
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return compiler_frame_vm_locals_fp_offset - allocated_in_frame;
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}
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// On SPARC, the %lN and %iN registers are non-volatile.
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inline bool frame::volatile_across_calls(Register reg) {
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// This predicate is (presently) applied only to temporary registers,
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// and so it need not recognize non-volatile globals.
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return reg->is_out() || reg->is_global();
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}
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inline oop frame::saved_oop_result(RegisterMap* map) const {
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return *((oop*) map->location(O0->as_VMReg()));
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}
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@ -230,11 +230,6 @@ void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr bas
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}
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void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
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__ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
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}
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bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
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if (tmp->is_valid() && c > 0 && c < max_jint) {
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if (is_power_of_2(c + 1)) {
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -340,12 +340,6 @@ void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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if (C1Breakpoint) int3();
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inline_cache_check(receiver, ic_klass);
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}
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void C1_MacroAssembler::verified_entry() {
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if (C1Breakpoint || VerifyFPU || !UseStackBanging) {
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// Verified Entry first instruction should be 5 bytes long for correct
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -210,10 +210,6 @@ inline oop* frame::interpreter_frame_temp_oop_addr() const {
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return (oop *)(fp() + interpreter_frame_oop_temp_offset);
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}
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inline int frame::pd_oop_map_offset_adjustment() const {
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return 0;
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}
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inline int frame::interpreter_frame_monitor_size() {
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return BasicObjectLock::size();
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}
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@ -239,22 +235,6 @@ inline JavaCallWrapper** frame::entry_frame_call_wrapper_addr() const {
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// Compiled frames
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inline int frame::local_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors) {
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return (nof_args - local_index + (local_index < nof_args ? 1: -1));
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}
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inline int frame::monitor_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors) {
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return local_offset_for_compiler(local_index, nof_args, max_nof_locals, max_nof_monitors);
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}
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inline int frame::min_local_offset_for_compiler(int nof_args, int max_nof_locals, int max_nof_monitors) {
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return (nof_args - (max_nof_locals + max_nof_monitors*2) - 1);
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}
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inline bool frame::volatile_across_calls(Register reg) {
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return true;
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}
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inline oop frame::saved_oop_result(RegisterMap* map) const {
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oop* result_adr = (oop *)map->location(rax->as_VMReg());
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guarantee(result_adr != NULL, "bad register save location");
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -340,7 +340,6 @@ class LIRGenerator: public InstructionVisitor, public BlockClosure {
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// machine dependent
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void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
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void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info);
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void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info);
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void arraycopy_helper(Intrinsic* x, int* flags, ciArrayKlass** expected_type);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -43,7 +43,6 @@ class C1_MacroAssembler: public MacroAssembler {
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void build_frame(int frame_size_in_bytes, int bang_size_in_bytes);
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void remove_frame(int frame_size_in_bytes);
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void unverified_entry(Register receiver, Register ic_klass);
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void verified_entry();
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void verify_stack_oop(int offset) PRODUCT_RETURN;
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void verify_not_null_oop(Register r) PRODUCT_RETURN;
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@ -337,33 +337,6 @@ class frame {
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// tells whether there is another chunk of Delta stack above
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bool entry_frame_is_first() const;
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// Compiled frames:
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public:
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// Given the index of a local, and the number of argument words
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// in this stack frame, tell which word of the stack frame to find
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// the local in. Arguments are stored above the ofp/rpc pair,
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// while other locals are stored below it.
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// Since monitors (BasicLock blocks) are also assigned indexes,
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// but may have different storage requirements, their presence
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// can also affect the calculation of offsets.
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||||
static int local_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors);
|
||||
|
||||
// Given the index of a monitor, etc., tell which word of the
|
||||
// stack frame contains the start of the BasicLock block.
|
||||
// Note that the local index by convention is the __higher__
|
||||
// of the two indexes allocated to the block.
|
||||
static int monitor_offset_for_compiler(int local_index, int nof_args, int max_nof_locals, int max_nof_monitors);
|
||||
|
||||
// Tell the smallest value that local_offset_for_compiler will attain.
|
||||
// This is used to help determine how much stack frame to allocate.
|
||||
static int min_local_offset_for_compiler(int nof_args, int max_nof_locals, int max_nof_monitors);
|
||||
|
||||
// Tells if this register must be spilled during a call.
|
||||
// On Intel, all registers are smashed by calls.
|
||||
static bool volatile_across_calls(Register reg);
|
||||
|
||||
|
||||
// Safepoints
|
||||
|
||||
public:
|
||||
@ -416,8 +389,6 @@ class frame {
|
||||
// Usage:
|
||||
// assert(frame::verify_return_pc(return_address), "must be a return pc");
|
||||
|
||||
int pd_oop_map_offset_adjustment() const;
|
||||
|
||||
NOT_PRODUCT(void pd_ps();) // platform dependent frame printing
|
||||
|
||||
#include CPU_HEADER(frame)
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user