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8283307: Vectorize unsigned shift right on signed subword types

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Reviewed-by: jiefu, pli, sviswanathan, kvn
This commit is contained in:
Fei Gao 2022-06-06 02:02:10 +00:00 committed by Pengfei Li
parent f347ff9986
commit 24fe8ad74c
9 changed files with 211 additions and 6 deletions
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14
src/hotspot/share/opto/superword.cpp
View File

@ -2013,6 +2013,13 @@ bool SuperWord::implemented(Node_List* p) {
retValue = ReductionNode::implemented(opc, size, arith_type->basic_type());
}
} else {
// Vector unsigned right shift for signed subword types behaves differently
// from Java Spec. But when the shift amount is a constant not greater than
// the number of sign extended bits, the unsigned right shift can be
// vectorized to a signed right shift.
if (VectorNode::can_transform_shift_op(p0, velt_basic_type(p0))) {
opc = Op_RShiftI;
}
retValue = VectorNode::implemented(opc, size, velt_basic_type(p0));
}
if (!retValue) {
@ -2577,6 +2584,13 @@ bool SuperWord::output() {
vlen_in_bytes = in2->as_Vector()->length_in_bytes();
}
} else {
// Vector unsigned right shift for signed subword types behaves differently
// from Java Spec. But when the shift amount is a constant not greater than
// the number of sign extended bits, the unsigned right shift can be
// vectorized to a signed right shift.
if (VectorNode::can_transform_shift_op(n, velt_basic_type(n))) {
opc = Op_RShiftI;
}
vn = VectorNode::make(opc, in1, in2, vlen, velt_basic_type(n));
vlen_in_bytes = vn->as_Vector()->length_in_bytes();
}

18
src/hotspot/share/opto/vectornode.cpp
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@ -438,6 +438,24 @@ bool VectorNode::is_shift_opcode(int opc) {
}
}
bool VectorNode::can_transform_shift_op(Node* n, BasicType bt) {
if (n->Opcode() != Op_URShiftI) {
return false;
}
Node* in2 = n->in(2);
if (!in2->is_Con()) {
return false;
}
jint cnt = in2->get_int();
// Only when shift amount is not greater than number of sign extended
// bits (16 for short and 24 for byte), unsigned shift right on signed
// subword types can be vectorized as vector signed shift.
if ((bt == T_BYTE && cnt <= 24) || (bt == T_SHORT && cnt <= 16)) {
return true;
}
return false;
}
bool VectorNode::is_shift(Node* n) {
return is_shift_opcode(n->Opcode());
}

1
src/hotspot/share/opto/vectornode.hpp
View File

@ -80,6 +80,7 @@ class VectorNode : public TypeNode {
static VectorNode* make_mask_node(int vopc, Node* n1, Node* n2, uint vlen, BasicType bt);
static bool is_shift_opcode(int opc);
static bool can_transform_shift_op(Node* n, BasicType bt);
static bool is_vshift_cnt_opcode(int opc);

162
test/hotspot/jtreg/compiler/c2/irTests/TestVectorizeURShiftSubword.java Normal file
View File

@ -0,0 +1,162 @@
/*
* Copyright (c) 2022, Arm Limited. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*/
package compiler.c2.irTests;
import compiler.lib.ir_framework.*;
import java.util.Random;
import jdk.test.lib.Asserts;
import jdk.test.lib.Utils;
/*
* @test
* @bug 8283307
* @key randomness
* @summary Auto-vectorization enhancement for unsigned shift right on signed subword types
* @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="aarch64"
* @library /test/lib /
* @run driver compiler.c2.irTests.TestVectorizeURShiftSubword
*/
public class TestVectorizeURShiftSubword {
private static final Random RANDOM = Utils.getRandomInstance();
final private static int NUM = 3000;
private short[] shorta = new short[NUM];
private short[] shortb = new short[NUM];
private byte[] bytea = new byte[NUM];
private byte[] byteb = new byte[NUM];
private static final int[] SPECIALS = {
0, 0x1, 0x8, 0xF, 0x3F, 0x7C, 0x7F, 0x80, 0x81, 0x8F, 0xF3, 0xF8, 0xFF,
0x38FF, 0x3FFF, 0x8F8F, 0x8FFF, 0x7FF3, 0x7FFF, 0xFF33, 0xFFF8, 0xFFFF, 0xFFFFFF,
Integer.MAX_VALUE, Integer.MIN_VALUE
};
public byte urshift(byte input, int amount) {
return (byte) (input >>> amount);
}
public short urshift(short input, int amount) {
return (short) (input >>> amount);
}
public static void main(String[] args) {
TestFramework.runWithFlags("-XX:CompileCommand=exclude,*.urshift");
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR, ">0", IRNode.RSHIFT_VB, ">0", IRNode.STORE_VECTOR, ">0"})
public void testByte0() {
for(int i = 0; i < NUM; i++) {
byteb[i] = (byte) (bytea[i] >>> 3);
}
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR, ">0", IRNode.RSHIFT_VB, ">0", IRNode.STORE_VECTOR, ">0"})
public void testByte1() {
for(int i = 0; i < NUM; i++) {
byteb[i] = (byte) (bytea[i] >>> 24);
}
}
@Test
@IR(failOn = {IRNode.LOAD_VECTOR, IRNode.RSHIFT_VB, IRNode.STORE_VECTOR})
public void testByte2() {
for(int i = 0; i < NUM; i++) {
byteb[i] = (byte) (bytea[i] >>> 25);
}
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR, ">0", IRNode.RSHIFT_VS, ">0", IRNode.STORE_VECTOR, ">0"})
public void testShort0() {
for(int i = 0; i < NUM; i++) {
shortb[i] = (short) (shorta[i] >>> 10);
}
}
@Test
@IR(counts = {IRNode.LOAD_VECTOR, ">0", IRNode.RSHIFT_VS, ">0", IRNode.STORE_VECTOR, ">0"})
public void testShort1() {
for(int i = 0; i < NUM; i++) {
shortb[i] = (short) (shorta[i] >>> 16);
}
}
@Test
@IR(failOn = {IRNode.LOAD_VECTOR, IRNode.RSHIFT_VS, IRNode.STORE_VECTOR})
public void testShort2() {
for(int i = 0; i < NUM; i++) {
shortb[i] = (short) (shorta[i] >>> 17);
}
}
@Test
public void checkTest() {
testByte0();
for (int i = 0; i < bytea.length; i++) {
Asserts.assertEquals(byteb[i], urshift(bytea[i], 3));
}
testByte1();
for (int i = 0; i < bytea.length; i++) {
Asserts.assertEquals(byteb[i], urshift(bytea[i], 24));
}
testByte2();
for (int i = 0; i < bytea.length; i++) {
Asserts.assertEquals(byteb[i], urshift(bytea[i], 25));
}
testShort0();
for (int i = 0; i < shorta.length; i++) {
Asserts.assertEquals(shortb[i], urshift(shorta[i], 10));
}
testShort1();
for (int i = 0; i < shorta.length; i++) {
Asserts.assertEquals(shortb[i], urshift(shorta[i], 16));
}
testShort2();
for (int i = 0; i < shorta.length; i++) {
Asserts.assertEquals(shortb[i], urshift(shorta[i], 17));
}
}
@Run(test = "checkTest")
public void checkTest_runner() {
for (int i = 0; i < SPECIALS.length; i++) {
for (int j = 0; j < shorta.length; j++) {
shorta[j] = (short) SPECIALS[i];
bytea[j] = (byte) SPECIALS[i];
}
checkTest();
}
for (int j = 0; j < shorta.length; j++) {
shorta[j] = (short) RANDOM.nextInt();;
bytea[j] = (byte) RANDOM.nextInt();
}
checkTest();
}
}

2
test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java
View File

@ -157,6 +157,8 @@ public class IRNode {
public static final String RSHIFT = START + "RShift(I|L)" + MID + END;
public static final String RSHIFT_I = START + "RShiftI" + MID + END;
public static final String RSHIFT_L = START + "RShiftL" + MID + END;
public static final String RSHIFT_VB = START + "RShiftVB" + MID + END;
public static final String RSHIFT_VS = START + "RShiftVS" + MID + END;
public static final String URSHIFT = START + "URShift(B|S|I|L)" + MID + END;
public static final String URSHIFT_I = START + "URShiftI" + MID + END;
public static final String URSHIFT_L = START + "URShiftL" + MID + END;

2
test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java
View File

@ -133,8 +133,6 @@ public class ArrayShiftOpTest extends VectorizationTestRunner {
}
@Test
// Note that unsigned shift right on subword signed integer types can't
// be vectorized since the sign extension bits would be lost.
public short[] vectorUnsignedShiftRight() {
short[] res = new short[SIZE];
for (int i = 0; i < SIZE; i++) {

2
test/hotspot/jtreg/compiler/vectorization/runner/BasicByteOpTest.java
View File

@ -180,8 +180,6 @@ public class BasicByteOpTest extends VectorizationTestRunner {
}
@Test
// Note that unsigned shift right on subword signed integer types can
// not be vectorized since the sign extension bit would be lost.
public byte[] vectorUnsignedShiftRight() {
byte[] res = new byte[SIZE];
for (int i = 0; i < SIZE; i++) {

2
test/hotspot/jtreg/compiler/vectorization/runner/BasicShortOpTest.java
View File

@ -180,8 +180,6 @@ public class BasicShortOpTest extends VectorizationTestRunner {
}
@Test
// Note that unsigned shift right on subword signed integer types can
// not be vectorized since the sign extension bits would be lost.
public short[] vectorUnsignedShiftRight() {
short[] res = new short[SIZE];
for (int i = 0; i < SIZE; i++) {

14
test/micro/org/openjdk/bench/vm/compiler/VectorShiftRight.java
View File

@ -85,6 +85,13 @@ public class VectorShiftRight {
}
}
@Benchmark
public void urShiftImmByte() {
for (int i = 0; i < SIZE; i++) {
bytesB[i] = (byte) (bytesA[i] >>> 3);
}
}
@Benchmark
public void rShiftShort() {
for (int i = 0; i < SIZE; i++) {
@ -92,6 +99,13 @@ public class VectorShiftRight {
}
}
@Benchmark
public void urShiftImmShort() {
for (int i = 0; i < SIZE; i++) {
shortsB[i] = (short) (shortsA[i] >>> 3);
}
}
@Benchmark
public void urShiftChar() {
for (int i = 0; i < SIZE; i++) {