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8049325: Introduce and clean up umbrella headers for the files in the cpu subdirectories
Introduce and clean up umbrella headers for the files in the cpu subdirectories. Reviewed-by: lfoltan, coleenp, dholmes
This commit is contained in:
parent
6db67f9317
commit
25f33c005d
@ -36,7 +36,6 @@
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#include "runtime/signature.hpp"
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#include "runtime/stubCodeGenerator.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "vmreg_ppc.inline.hpp"
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#ifdef COMPILER1
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#include "c1/c1_Runtime1.hpp"
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#include "runtime/vframeArray.hpp"
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -27,6 +27,7 @@
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#define CPU_PPC_VM_FRAME_PPC_INLINE_HPP
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#include "code/codeCache.hpp"
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#include "code/vmreg.inline.hpp"
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// Inline functions for ppc64 frames:
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2013 SAP AG. All rights reserved.
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* Copyright (c) 2002, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -26,6 +26,7 @@
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#ifndef CPU_PPC_VM_INTERPRETERRT_PPC_HPP
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#define CPU_PPC_VM_INTERPRETERRT_PPC_HPP
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#include "asm/macroAssembler.hpp"
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#include "memory/allocation.hpp"
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// native method calls
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@ -30,6 +30,7 @@
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterGenerator.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/templateTable.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/methodData.hpp"
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@ -32,6 +32,7 @@
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#include "memory/resourceArea.hpp"
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#include "prims/methodHandles.hpp"
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#include "runtime/biasedLocking.hpp"
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#include "runtime/icache.hpp"
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#include "runtime/interfaceSupport.hpp"
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#include "runtime/objectMonitor.hpp"
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#include "runtime/os.hpp"
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@ -267,7 +267,7 @@ register %{
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// It's worth about 1% on SPEC geomean to get this right.
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// Chunk0, chunk1, and chunk2 form the MachRegisterNumbers enumeration
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// in adGlobals_ppc64.hpp which defines the <register>_num values, e.g.
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// in adGlobals_ppc.hpp which defines the <register>_num values, e.g.
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// R3_num. Therefore, R3_num may not be (and in reality is not)
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// the same as R3->encoding()! Furthermore, we cannot make any
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// assumptions on ordering, e.g. R3_num may be less than R2_num.
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@ -1632,7 +1632,7 @@ enum RC { rc_bad, rc_int, rc_float, rc_stack };
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static enum RC rc_class(OptoReg::Name reg) {
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// Return the register class for the given register. The given register
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// reg is a <register>_num value, which is an index into the MachRegisterNumbers
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// enumeration in adGlobals_ppc64.hpp.
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// enumeration in adGlobals_ppc.hpp.
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if (reg == OptoReg::Bad) return rc_bad;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -27,7 +27,6 @@
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#define CPU_PPC_VM_REGISTER_PPC_HPP
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#include "asm/register.hpp"
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#include "vm_version_ppc.hpp"
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// forward declaration
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class Address;
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@ -92,8 +91,8 @@ class RegisterImpl: public AbstractRegisterImpl {
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inline friend Register as_Register(int encoding);
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// accessors
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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VMReg as_VMReg();
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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inline VMReg as_VMReg();
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Register successor() const { return as_Register(encoding() + 1); }
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// testers
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@ -208,8 +207,8 @@ class ConditionRegisterImpl: public AbstractRegisterImpl {
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inline friend ConditionRegister as_ConditionRegister(int encoding);
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// accessors
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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VMReg as_VMReg();
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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inline VMReg as_VMReg();
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// testers
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bool is_valid() const { return (0 <= value() && value() < number_of_registers); }
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@ -264,7 +263,7 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
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// accessors
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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VMReg as_VMReg();
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inline VMReg as_VMReg();
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FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }
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// testers
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@ -365,7 +364,7 @@ class SpecialRegisterImpl: public AbstractRegisterImpl {
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// accessors
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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VMReg as_VMReg();
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inline VMReg as_VMReg();
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// testers
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bool is_valid() const { return 0 <= value() && value() < number_of_registers; }
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2013 SAP AG. All rights reserved.
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* Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -30,6 +30,7 @@
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#include "classfile/systemDictionary.hpp"
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#include "code/vmreg.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "nativeInst_ppc.hpp"
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#include "opto/runtime.hpp"
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#include "runtime/interfaceSupport.hpp"
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@ -37,7 +38,6 @@
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#include "runtime/stubRoutines.hpp"
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#include "runtime/vframeArray.hpp"
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#include "utilities/globalDefinitions.hpp"
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#include "vmreg_ppc.inline.hpp"
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#endif
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#define __ masm->
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -29,16 +29,17 @@
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#include "code/icBuffer.hpp"
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#include "code/vtableStubs.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "oops/compiledICHolder.hpp"
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#include "prims/jvmtiRedefineClassesTrace.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/vframeArray.hpp"
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#include "vmreg_ppc.inline.hpp"
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#include "adfiles/ad_ppc_64.hpp"
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#ifdef COMPILER1
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#include "c1/c1_Runtime1.hpp"
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#endif
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#ifdef COMPILER2
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#include "adfiles/ad_ppc_64.hpp"
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#include "opto/runtime.hpp"
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -401,11 +401,11 @@ class StubGenerator: public StubCodeGenerator {
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__ load_const(exception_file, (void*)__FILE__);
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__ load_const(exception_line, (void*)__LINE__);
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__ std(R3_ARG1, thread_(pending_exception));
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__ std(R3_ARG1, in_bytes(JavaThread::pending_exception_offset()), R16_thread);
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// store into `char *'
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__ std(exception_file, thread_(exception_file));
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__ std(exception_file, in_bytes(JavaThread::exception_file_offset()), R16_thread);
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// store into `int'
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__ stw(exception_line, thread_(exception_line));
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__ stw(exception_line, in_bytes(JavaThread::exception_line_offset()), R16_thread);
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// complete return to VM
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assert(StubRoutines::_call_stub_return_address != NULL, "must have been generated before");
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@ -30,6 +30,7 @@
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterGenerator.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/templateTable.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/methodData.hpp"
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@ -27,6 +27,7 @@
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#include "asm/macroAssembler.inline.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/templateInterpreter.hpp"
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#include "interpreter/templateTable.hpp"
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#include "memory/universe.inline.hpp"
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@ -26,10 +26,28 @@
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#ifndef CPU_PPC_VM_VMREG_PPC_HPP
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#define CPU_PPC_VM_VMREG_PPC_HPP
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bool is_Register();
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Register as_Register();
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inline bool is_Register() {
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return (unsigned int)value() < (unsigned int)ConcreteRegisterImpl::max_gpr;
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}
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bool is_FloatRegister();
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FloatRegister as_FloatRegister();
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inline bool is_FloatRegister() {
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return value() >= ConcreteRegisterImpl::max_gpr &&
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value() < ConcreteRegisterImpl::max_fpr;
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}
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inline Register as_Register() {
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assert(is_Register() && is_even(value()), "even-aligned GPR name");
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return ::as_Register(value()>>1);
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}
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inline FloatRegister as_FloatRegister() {
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assert(is_FloatRegister() && is_even(value()), "must be");
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return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
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}
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inline bool is_concrete() {
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assert(is_reg(), "must be");
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return is_even(value());
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}
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#endif // CPU_PPC_VM_VMREG_PPC_HPP
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@ -44,28 +44,5 @@ inline VMReg SpecialRegisterImpl::as_VMReg() {
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return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_cnd);
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}
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inline bool VMRegImpl::is_Register() {
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return (unsigned int)value() < (unsigned int)ConcreteRegisterImpl::max_gpr;
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}
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inline bool VMRegImpl::is_FloatRegister() {
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return value() >= ConcreteRegisterImpl::max_gpr &&
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value() < ConcreteRegisterImpl::max_fpr;
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}
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inline Register VMRegImpl::as_Register() {
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assert(is_Register() && is_even(value()), "even-aligned GPR name");
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return ::as_Register(value()>>1);
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}
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inline FloatRegister VMRegImpl::as_FloatRegister() {
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assert(is_FloatRegister() && is_even(value()), "must be");
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return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
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}
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inline bool VMRegImpl::is_concrete() {
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assert(is_reg(), "must be");
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return is_even(value());
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}
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#endif // CPU_PPC_VM_VMREG_PPC_INLINE_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -31,7 +31,6 @@
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#include "oops/compiledICHolder.hpp"
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#include "oops/oop.inline.hpp"
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#include "prims/jvmtiExport.hpp"
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#include "register_sparc.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/signature.hpp"
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#include "runtime/vframeArray.hpp"
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@ -23,6 +23,7 @@
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*/
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#include "precompiled.hpp"
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#include "code/codeCache.hpp"
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#include "interpreter/interpreter.hpp"
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#include "memory/resourceArea.hpp"
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#include "oops/markOop.hpp"
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -26,6 +26,7 @@
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#define CPU_SPARC_VM_FRAME_SPARC_INLINE_HPP
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#include "asm/macroAssembler.hpp"
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#include "code/vmreg.inline.hpp"
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// Inline functions for SPARC frames:
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@ -23,6 +23,7 @@
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*/
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#include "precompiled.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "memory/allocation.inline.hpp"
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -28,6 +28,7 @@
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterGenerator.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/templateTable.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/methodData.hpp"
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@ -23,7 +23,7 @@
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*/
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#include "precompiled.hpp"
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#include "asm/assembler.inline.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "compiler/disassembler.hpp"
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#include "gc_interface/collectedHeap.inline.hpp"
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#include "interpreter/interpreter.hpp"
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -25,6 +25,7 @@
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#include "precompiled.hpp"
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#include "asm/macroAssembler.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "memory/allocation.inline.hpp"
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#include "prims/methodHandles.hpp"
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -26,7 +26,6 @@
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#define CPU_SPARC_VM_REGISTER_SPARC_HPP
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#include "asm/register.hpp"
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#include "vm_version_sparc.hpp"
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// forward declaration
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class Address;
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@ -65,7 +64,7 @@ class RegisterImpl: public AbstractRegisterImpl {
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friend Register as_oRegister(int number);
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friend Register as_gRegister(int number);
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VMReg as_VMReg();
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inline VMReg as_VMReg();
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// accessors
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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@ -234,7 +233,7 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
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};
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// construction
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VMReg as_VMReg( );
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inline VMReg as_VMReg( );
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// accessors
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int encoding() const { assert(is_valid(), "invalid register"); return value(); }
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -28,6 +28,7 @@
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterGenerator.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/templateTable.hpp"
|
||||
#include "oops/arrayOop.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -25,6 +25,7 @@
|
||||
#include "precompiled.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "memory/universe.inline.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -25,10 +25,35 @@
|
||||
#ifndef CPU_SPARC_VM_VMREG_SPARC_HPP
|
||||
#define CPU_SPARC_VM_VMREG_SPARC_HPP
|
||||
|
||||
bool is_Register();
|
||||
Register as_Register();
|
||||
inline bool is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
|
||||
inline bool is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
|
||||
value() < ConcreteRegisterImpl::max_fpr; }
|
||||
inline Register as_Register() {
|
||||
|
||||
bool is_FloatRegister();
|
||||
FloatRegister as_FloatRegister();
|
||||
assert( is_Register() && is_even(value()), "even-aligned GPR name" );
|
||||
// Yuk
|
||||
return ::as_Register(value()>>1);
|
||||
}
|
||||
|
||||
inline FloatRegister as_FloatRegister() {
|
||||
assert( is_FloatRegister(), "must be" );
|
||||
// Yuk
|
||||
return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
|
||||
}
|
||||
|
||||
inline bool is_concrete() {
|
||||
assert(is_reg(), "must be");
|
||||
int v = value();
|
||||
if ( v < ConcreteRegisterImpl::max_gpr ) {
|
||||
return is_even(v);
|
||||
}
|
||||
// F0..F31
|
||||
if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
|
||||
if ( v < ConcreteRegisterImpl::max_fpr) {
|
||||
return is_even(v);
|
||||
}
|
||||
assert(false, "what register?");
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif // CPU_SPARC_VM_VMREG_SPARC_HPP
|
||||
|
||||
@ -33,35 +33,5 @@ inline VMReg RegisterImpl::as_VMReg() {
|
||||
inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); }
|
||||
|
||||
|
||||
inline bool VMRegImpl::is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
|
||||
inline bool VMRegImpl::is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
|
||||
value() < ConcreteRegisterImpl::max_fpr; }
|
||||
inline Register VMRegImpl::as_Register() {
|
||||
|
||||
assert( is_Register() && is_even(value()), "even-aligned GPR name" );
|
||||
// Yuk
|
||||
return ::as_Register(value()>>1);
|
||||
}
|
||||
|
||||
inline FloatRegister VMRegImpl::as_FloatRegister() {
|
||||
assert( is_FloatRegister(), "must be" );
|
||||
// Yuk
|
||||
return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
|
||||
}
|
||||
|
||||
inline bool VMRegImpl::is_concrete() {
|
||||
assert(is_reg(), "must be");
|
||||
int v = value();
|
||||
if ( v < ConcreteRegisterImpl::max_gpr ) {
|
||||
return is_even(v);
|
||||
}
|
||||
// F0..F31
|
||||
if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
|
||||
if ( v < ConcreteRegisterImpl::max_fpr) {
|
||||
return is_even(v);
|
||||
}
|
||||
assert(false, "what register?");
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,6 +26,7 @@
|
||||
#define CPU_X86_VM_FRAME_X86_INLINE_HPP
|
||||
|
||||
#include "code/codeCache.hpp"
|
||||
#include "code/vmreg.inline.hpp"
|
||||
|
||||
// Inline functions for Intel frames:
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,6 +28,7 @@
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterGenerator.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "oops/arrayOop.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -28,6 +28,7 @@
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterGenerator.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "oops/arrayOop.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,7 +26,6 @@
|
||||
#define CPU_X86_VM_REGISTER_X86_HPP
|
||||
|
||||
#include "asm/register.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
class VMRegImpl;
|
||||
typedef VMRegImpl* VMReg;
|
||||
@ -59,7 +58,7 @@ class RegisterImpl: public AbstractRegisterImpl {
|
||||
// construction
|
||||
inline friend Register as_Register(int encoding);
|
||||
|
||||
VMReg as_VMReg();
|
||||
inline VMReg as_VMReg();
|
||||
|
||||
// accessors
|
||||
int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; }
|
||||
@ -110,9 +109,10 @@ class FloatRegisterImpl: public AbstractRegisterImpl {
|
||||
// construction
|
||||
inline friend FloatRegister as_FloatRegister(int encoding);
|
||||
|
||||
VMReg as_VMReg();
|
||||
inline VMReg as_VMReg();
|
||||
|
||||
// derived registers, offsets, and addresses
|
||||
|
||||
FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }
|
||||
|
||||
// accessors
|
||||
@ -152,7 +152,7 @@ class XMMRegisterImpl: public AbstractRegisterImpl {
|
||||
// construction
|
||||
friend XMMRegister as_XMMRegister(int encoding);
|
||||
|
||||
VMReg as_VMReg();
|
||||
inline VMReg as_VMReg();
|
||||
|
||||
// derived registers, offsets, and addresses
|
||||
XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 201,4 Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,6 +28,7 @@
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterGenerator.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "oops/arrayOop.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,6 +28,7 @@
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterGenerator.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "oops/arrayOop.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,6 +26,7 @@
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "memory/universe.inline.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,6 +26,7 @@
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "memory/universe.inline.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
|
||||
@ -25,13 +25,49 @@
|
||||
#ifndef CPU_X86_VM_VMREG_X86_HPP
|
||||
#define CPU_X86_VM_VMREG_X86_HPP
|
||||
|
||||
bool is_Register();
|
||||
Register as_Register();
|
||||
|
||||
bool is_FloatRegister();
|
||||
FloatRegister as_FloatRegister();
|
||||
|
||||
bool is_XMMRegister();
|
||||
XMMRegister as_XMMRegister();
|
||||
inline bool is_Register() {
|
||||
return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
|
||||
}
|
||||
|
||||
inline bool is_FloatRegister() {
|
||||
return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
|
||||
}
|
||||
|
||||
inline bool is_XMMRegister() {
|
||||
return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
|
||||
}
|
||||
|
||||
inline Register as_Register() {
|
||||
|
||||
assert( is_Register(), "must be");
|
||||
// Yuk
|
||||
#ifdef AMD64
|
||||
return ::as_Register(value() >> 1);
|
||||
#else
|
||||
return ::as_Register(value());
|
||||
#endif // AMD64
|
||||
}
|
||||
|
||||
inline FloatRegister as_FloatRegister() {
|
||||
assert( is_FloatRegister() && is_even(value()), "must be" );
|
||||
// Yuk
|
||||
return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
|
||||
}
|
||||
|
||||
inline XMMRegister as_XMMRegister() {
|
||||
assert( is_XMMRegister() && is_even(value()), "must be" );
|
||||
// Yuk
|
||||
return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3);
|
||||
}
|
||||
|
||||
inline bool is_concrete() {
|
||||
assert(is_reg(), "must be");
|
||||
#ifndef AMD64
|
||||
if (is_Register()) return true;
|
||||
#endif // AMD64
|
||||
return is_even(value());
|
||||
}
|
||||
|
||||
#endif // CPU_X86_VM_VMREG_X86_HPP
|
||||
|
||||
@ -42,48 +42,4 @@ inline VMReg XMMRegisterImpl::as_VMReg() {
|
||||
return VMRegImpl::as_VMReg((encoding() << 3) + ConcreteRegisterImpl::max_fpr);
|
||||
}
|
||||
|
||||
|
||||
inline bool VMRegImpl::is_Register() {
|
||||
return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
|
||||
}
|
||||
|
||||
inline bool VMRegImpl::is_FloatRegister() {
|
||||
return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
|
||||
}
|
||||
|
||||
inline bool VMRegImpl::is_XMMRegister() {
|
||||
return value() >= ConcreteRegisterImpl::max_fpr && value() < ConcreteRegisterImpl::max_xmm;
|
||||
}
|
||||
|
||||
inline Register VMRegImpl::as_Register() {
|
||||
|
||||
assert( is_Register(), "must be");
|
||||
// Yuk
|
||||
#ifdef AMD64
|
||||
return ::as_Register(value() >> 1);
|
||||
#else
|
||||
return ::as_Register(value());
|
||||
#endif // AMD64
|
||||
}
|
||||
|
||||
inline FloatRegister VMRegImpl::as_FloatRegister() {
|
||||
assert( is_FloatRegister() && is_even(value()), "must be" );
|
||||
// Yuk
|
||||
return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
|
||||
}
|
||||
|
||||
inline XMMRegister VMRegImpl::as_XMMRegister() {
|
||||
assert( is_XMMRegister() && is_even(value()), "must be" );
|
||||
// Yuk
|
||||
return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 3);
|
||||
}
|
||||
|
||||
inline bool VMRegImpl::is_concrete() {
|
||||
assert(is_reg(), "must be");
|
||||
#ifndef AMD64
|
||||
if (is_Register()) return true;
|
||||
#endif // AMD64
|
||||
return is_even(value());
|
||||
}
|
||||
|
||||
#endif // CPU_X86_VM_VMREG_X86_INLINE_HPP
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
//
|
||||
// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
// Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
//
|
||||
// This code is free software; you can redistribute it and/or modify it
|
||||
@ -487,6 +487,8 @@ source_hpp %{
|
||||
// To keep related declarations/definitions/uses close together,
|
||||
// we switch between source %{ }% and source_hpp %{ }% freely as needed.
|
||||
|
||||
class NativeJump;
|
||||
|
||||
class CallStubImpl {
|
||||
|
||||
//--------------------------------------------------------------
|
||||
|
||||
@ -66,6 +66,7 @@
|
||||
#include "runtime/thread.inline.hpp"
|
||||
#include "runtime/threadCritical.hpp"
|
||||
#include "runtime/timer.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "services/attachListener.hpp"
|
||||
#include "services/runtimeService.hpp"
|
||||
#include "utilities/decoder.hpp"
|
||||
|
||||
@ -59,6 +59,7 @@
|
||||
#include "runtime/thread.inline.hpp"
|
||||
#include "runtime/threadCritical.hpp"
|
||||
#include "runtime/timer.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "services/attachListener.hpp"
|
||||
#include "services/memTracker.hpp"
|
||||
#include "services/runtimeService.hpp"
|
||||
|
||||
@ -62,6 +62,7 @@
|
||||
#include "runtime/thread.inline.hpp"
|
||||
#include "runtime/threadCritical.hpp"
|
||||
#include "runtime/timer.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "services/attachListener.hpp"
|
||||
#include "services/memTracker.hpp"
|
||||
#include "services/runtimeService.hpp"
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2012, 2013 SAP AG. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2012, 2014, SAP AG. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,7 +28,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_ppc.hpp"
|
||||
|
||||
#ifndef _LP64
|
||||
#error "Atomic currently only impleneted for PPC64"
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2012, 2013 SAP AG. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2012, 2014, SAP AG. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
#define OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_ppc.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// Implementation of class atomic
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,7 +28,6 @@
|
||||
#include "runtime/atomic.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2008, 2011 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -28,7 +28,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_zero.hpp"
|
||||
|
||||
// Implementation of class atomic
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2008, 2009 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -27,7 +27,6 @@
|
||||
#define OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_zero.hpp"
|
||||
|
||||
#ifdef ARM
|
||||
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2012, 2013 SAP AG. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2012, 2014, SAP AG. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,7 +28,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_ppc.hpp"
|
||||
|
||||
#ifndef PPC64
|
||||
#error "Atomic currently only implemented for PPC64"
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2012, 2013 SAP AG. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2012, 2014, SAP AG. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
#define OS_CPU_LINUX_PPC_VM_ORDERACCESS_LINUX_PPC_INLINE_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_ppc.hpp"
|
||||
|
||||
#ifndef PPC64
|
||||
#error "OrderAccess currently only implemented for PPC64"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_sparc.hpp"
|
||||
|
||||
// Implementation of class atomic
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,7 +26,6 @@
|
||||
#define OS_CPU_LINUX_SPARC_VM_ORDERACCESS_LINUX_SPARC_INLINE_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_sparc.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// Implementation of class atomic
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,7 +28,6 @@
|
||||
#include "runtime/atomic.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2008, 2011 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -28,7 +28,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_zero.hpp"
|
||||
|
||||
// Implementation of class atomic
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2007, 2008, 2009 Red Hat, Inc.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
@ -27,7 +27,6 @@
|
||||
#define OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
|
||||
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_zero.hpp"
|
||||
|
||||
#ifdef ARM
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_sparc.hpp"
|
||||
|
||||
// Implementation of class atomic
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "vm_version_sparc.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -27,6 +27,7 @@
|
||||
#include "classfile/classLoader.hpp"
|
||||
#include "classfile/systemDictionary.hpp"
|
||||
#include "classfile/vmSymbols.hpp"
|
||||
#include "code/codeCache.hpp"
|
||||
#include "code/icBuffer.hpp"
|
||||
#include "code/vtableStubs.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
inline void Atomic::store (jbyte store_value, jbyte* dest) { *dest = store_value; }
|
||||
inline void Atomic::store (jshort store_value, jshort* dest) { *dest = store_value; }
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,7 +28,6 @@
|
||||
#include "runtime/atomic.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -27,7 +27,6 @@
|
||||
|
||||
#include "runtime/atomic.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// The following alternative implementations are needed because
|
||||
// Windows 95 doesn't support (some of) the corresponding Windows NT
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,7 +28,6 @@
|
||||
#include "runtime/atomic.inline.hpp"
|
||||
#include "runtime/orderAccess.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "vm_version_x86.hpp"
|
||||
|
||||
// Implementation of class OrderAccess.
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -213,7 +213,8 @@ int main(int argc, char *argv[])
|
||||
AD.addInclude(AD._CPP_file, "memory/allocation.inline.hpp");
|
||||
AD.addInclude(AD._CPP_file, "asm/macroAssembler.inline.hpp");
|
||||
AD.addInclude(AD._CPP_file, "code/compiledIC.hpp");
|
||||
AD.addInclude(AD._CPP_file, "code/vmreg.hpp");
|
||||
AD.addInclude(AD._CPP_file, "code/nativeInst.hpp");
|
||||
AD.addInclude(AD._CPP_file, "code/vmreg.inline.hpp");
|
||||
AD.addInclude(AD._CPP_file, "gc_interface/collectedHeap.inline.hpp");
|
||||
AD.addInclude(AD._CPP_file, "oops/compiledICHolder.hpp");
|
||||
AD.addInclude(AD._CPP_file, "oops/markOop.hpp");
|
||||
@ -230,23 +231,8 @@ int main(int argc, char *argv[])
|
||||
AD.addInclude(AD._CPP_file, "runtime/sharedRuntime.hpp");
|
||||
AD.addInclude(AD._CPP_file, "runtime/stubRoutines.hpp");
|
||||
AD.addInclude(AD._CPP_file, "utilities/growableArray.hpp");
|
||||
#ifdef TARGET_ARCH_x86
|
||||
AD.addInclude(AD._CPP_file, "nativeInst_x86.hpp");
|
||||
AD.addInclude(AD._CPP_file, "vmreg_x86.inline.hpp");
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
AD.addInclude(AD._CPP_file, "nativeInst_sparc.hpp");
|
||||
AD.addInclude(AD._CPP_file, "vmreg_sparc.inline.hpp");
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
AD.addInclude(AD._CPP_file, "nativeInst_arm.hpp");
|
||||
AD.addInclude(AD._CPP_file, "vmreg_arm.inline.hpp");
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
AD.addInclude(AD._CPP_file, "nativeInst_ppc.hpp");
|
||||
AD.addInclude(AD._CPP_file, "vmreg_ppc.inline.hpp");
|
||||
#endif
|
||||
AD.addInclude(AD._HPP_file, "memory/allocation.hpp");
|
||||
AD.addInclude(AD._HPP_file, "code/nativeInst.hpp");
|
||||
AD.addInclude(AD._HPP_file, "opto/machnode.hpp");
|
||||
AD.addInclude(AD._HPP_file, "opto/node.hpp");
|
||||
AD.addInclude(AD._HPP_file, "opto/regalloc.hpp");
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,34 +26,15 @@
|
||||
#define SHARE_VM_ASM_ASSEMBLER_HPP
|
||||
|
||||
#include "asm/codeBuffer.hpp"
|
||||
#include "asm/register.hpp"
|
||||
#include "code/oopRecorder.hpp"
|
||||
#include "code/relocInfo.hpp"
|
||||
#include "memory/allocation.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "utilities/debug.hpp"
|
||||
#include "utilities/growableArray.hpp"
|
||||
#include "utilities/top.hpp"
|
||||
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "register_x86.hpp"
|
||||
# include "vm_version_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "register_sparc.hpp"
|
||||
# include "vm_version_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "register_zero.hpp"
|
||||
# include "vm_version_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "register_arm.hpp"
|
||||
# include "vm_version_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "register_ppc.hpp"
|
||||
# include "vm_version_ppc.hpp"
|
||||
#endif
|
||||
|
||||
// This file contains platform-independent assembler declarations.
|
||||
|
||||
class MacroAssembler;
|
||||
|
||||
@ -28,6 +28,7 @@
|
||||
#include "memory/gcLocker.hpp"
|
||||
#include "oops/methodData.hpp"
|
||||
#include "oops/oop.inline.hpp"
|
||||
#include "runtime/icache.hpp"
|
||||
#include "utilities/copy.hpp"
|
||||
#include "utilities/xmlstream.hpp"
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -30,6 +30,7 @@
|
||||
#include "c1/c1_Instruction.hpp"
|
||||
#include "c1/c1_LIR.hpp"
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
#include "code/nativeInst.hpp"
|
||||
#include "utilities/array.hpp"
|
||||
#include "utilities/macros.hpp"
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,21 +26,7 @@
|
||||
#define SHARE_VM_C1_C1_DEFS_HPP
|
||||
|
||||
#include "utilities/globalDefinitions.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "register_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "register_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "register_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "register_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "register_ppc.hpp"
|
||||
#endif
|
||||
#include "asm/register.hpp"
|
||||
|
||||
// set frame size and return address offset to these values in blobs
|
||||
// (if the compiled frame uses ebp as link pointer on IA; otherwise,
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -25,24 +25,8 @@
|
||||
#include "precompiled.hpp"
|
||||
#include "c1/c1_FrameMap.hpp"
|
||||
#include "c1/c1_LIR.hpp"
|
||||
#include "code/vmreg.inline.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "vmreg_x86.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "vmreg_sparc.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "vmreg_zero.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "vmreg_arm.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "vmreg_ppc.inline.hpp"
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
//-----------------------------------------------------
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -36,6 +36,7 @@
|
||||
#include "interpreter/bytecode.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "runtime/compilationPolicy.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "utilities/bitMap.inline.hpp"
|
||||
|
||||
class BlockListBuilder VALUE_OBJ_CLASS_SPEC {
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -30,27 +30,6 @@
|
||||
#include "c1/c1_MacroAssembler.hpp"
|
||||
#include "c1/c1_ValueStack.hpp"
|
||||
#include "ci/ciInstance.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "nativeInst_x86.hpp"
|
||||
# include "vmreg_x86.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "nativeInst_sparc.hpp"
|
||||
# include "vmreg_sparc.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "nativeInst_zero.hpp"
|
||||
# include "vmreg_zero.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "nativeInst_arm.hpp"
|
||||
# include "vmreg_arm.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "nativeInst_ppc.hpp"
|
||||
# include "vmreg_ppc.inline.hpp"
|
||||
#endif
|
||||
|
||||
|
||||
void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
|
||||
// we must have enough patching space so that call can be inserted
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -34,6 +34,7 @@
|
||||
#include "ci/ciObjArray.hpp"
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "runtime/stubRoutines.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "utilities/bitMap.inline.hpp"
|
||||
#include "utilities/macros.hpp"
|
||||
#if INCLUDE_ALL_GCS
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -31,23 +31,8 @@
|
||||
#include "c1/c1_LIRGenerator.hpp"
|
||||
#include "c1/c1_LinearScan.hpp"
|
||||
#include "c1/c1_ValueStack.hpp"
|
||||
#include "code/vmreg.inline.hpp"
|
||||
#include "utilities/bitMap.inline.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "vmreg_x86.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "vmreg_sparc.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "vmreg_zero.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "vmreg_arm.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "vmreg_ppc.inline.hpp"
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef PRODUCT
|
||||
|
||||
|
||||
@ -56,6 +56,7 @@
|
||||
#include "runtime/threadCritical.hpp"
|
||||
#include "runtime/vframe.hpp"
|
||||
#include "runtime/vframeArray.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "utilities/copy.hpp"
|
||||
#include "utilities/events.hpp"
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2012, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2012, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,22 +28,7 @@
|
||||
#include "interpreter/bytecodes.hpp"
|
||||
#include "memory/oopFactory.hpp"
|
||||
#include "oops/constantPool.hpp"
|
||||
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
#include "utilities/bytes.hpp"
|
||||
|
||||
u2 BytecodeConstantPool::find_or_add(BytecodeCPEntry const& bcpe) {
|
||||
u2 index;
|
||||
|
||||
@ -25,22 +25,8 @@
|
||||
#ifndef SHARE_VM_CLASSFILE_CLASSFILESTREAM_HPP
|
||||
#define SHARE_VM_CLASSFILE_CLASSFILESTREAM_HPP
|
||||
|
||||
#include "utilities/bytes.hpp"
|
||||
#include "utilities/top.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
|
||||
// Input stream for reading .class file
|
||||
//
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -30,22 +30,8 @@
|
||||
#include "memory/allocation.hpp"
|
||||
#include "oops/constantPool.hpp"
|
||||
#include "oops/method.hpp"
|
||||
#include "utilities/bytes.hpp"
|
||||
#include "utilities/globalDefinitions.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
|
||||
class StackMapReader;
|
||||
|
||||
|
||||
@ -45,21 +45,7 @@
|
||||
#include "runtime/javaCalls.hpp"
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
#include "utilities/bytes.hpp"
|
||||
|
||||
#define NOFAILOVER_MAJOR_VERSION 51
|
||||
#define NONZERO_PADDING_BYTES_IN_SWITCH_MAJOR_VERSION 51
|
||||
|
||||
@ -39,21 +39,6 @@
|
||||
#include "runtime/sharedRuntime.hpp"
|
||||
#include "runtime/vframe.hpp"
|
||||
#include "services/memoryService.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "nativeInst_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "nativeInst_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "nativeInst_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "nativeInst_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "nativeInst_ppc.hpp"
|
||||
#endif
|
||||
#ifdef COMPILER1
|
||||
#include "c1/c1_Runtime1.hpp"
|
||||
#endif
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -25,23 +25,9 @@
|
||||
#ifndef SHARE_VM_CODE_COMPILEDIC_HPP
|
||||
#define SHARE_VM_CODE_COMPILEDIC_HPP
|
||||
|
||||
#include "code/nativeInst.hpp"
|
||||
#include "interpreter/linkResolver.hpp"
|
||||
#include "oops/compiledICHolder.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "nativeInst_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "nativeInst_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "nativeInst_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "nativeInst_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "nativeInst_ppc.hpp"
|
||||
#endif
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
// The CompiledIC represents a compiled inline cache.
|
||||
|
||||
44
hotspot/src/share/vm/code/nativeInst.hpp
Normal file
44
hotspot/src/share/vm/code/nativeInst.hpp
Normal file
@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 only, as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* version 2 for more details (a copy is included in the LICENSE file that
|
||||
* accompanied this code).
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License version
|
||||
* 2 along with this work; if not, write to the Free Software Foundation,
|
||||
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
* or visit www.oracle.com if you need additional information or have any
|
||||
* questions.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SHARE_VM_CODE_NATIVEINST_HPP
|
||||
#define SHARE_VM_CODE_NATIVEINST_HPP
|
||||
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "nativeInst_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "nativeInst_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "nativeInst_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "nativeInst_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "nativeInst_ppc.hpp"
|
||||
#endif
|
||||
|
||||
#endif // SHARE_VM_CODE_NATIVEINST_HPP
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1998, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -25,34 +25,13 @@
|
||||
#ifndef SHARE_VM_CODE_VMREG_HPP
|
||||
#define SHARE_VM_CODE_VMREG_HPP
|
||||
|
||||
#include "asm/register.hpp"
|
||||
#include "memory/allocation.hpp"
|
||||
#include "utilities/globalDefinitions.hpp"
|
||||
#include "asm/register.hpp"
|
||||
|
||||
#ifdef COMPILER2
|
||||
#include "opto/adlcVMDeps.hpp"
|
||||
#include "utilities/ostream.hpp"
|
||||
#ifdef TARGET_ARCH_MODEL_x86_32
|
||||
# include "adfiles/adGlobals_x86_32.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_x86_64
|
||||
# include "adfiles/adGlobals_x86_64.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_sparc
|
||||
# include "adfiles/adGlobals_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_zero
|
||||
# include "adfiles/adGlobals_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_arm
|
||||
# include "adfiles/adGlobals_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_32
|
||||
# include "adfiles/adGlobals_ppc_32.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_64
|
||||
# include "adfiles/adGlobals_ppc_64.hpp"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
//------------------------------VMReg------------------------------------------
|
||||
@ -107,7 +86,7 @@ public:
|
||||
// also a register you could use in the assembler. On machines with
|
||||
// 64bit registers only one half of the VMReg (and OptoReg) is considered
|
||||
// concrete.
|
||||
bool is_concrete();
|
||||
// bool is_concrete();
|
||||
|
||||
// VMRegs are 4 bytes wide on all platforms
|
||||
static const int stack_slot_size;
|
||||
|
||||
46
hotspot/src/share/vm/code/vmreg.inline.hpp
Normal file
46
hotspot/src/share/vm/code/vmreg.inline.hpp
Normal file
@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 only, as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* version 2 for more details (a copy is included in the LICENSE file that
|
||||
* accompanied this code).
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License version
|
||||
* 2 along with this work; if not, write to the Free Software Foundation,
|
||||
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
* or visit www.oracle.com if you need additional information or have any
|
||||
* questions.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SHARE_VM_CODE_VMREG_INLINE_HPP
|
||||
#define SHARE_VM_CODE_VMREG_INLINE_HPP
|
||||
|
||||
#include "asm/register.hpp"
|
||||
#include "code/vmreg.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "vmreg_x86.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "vmreg_sparc.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "vmreg_zero.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "vmreg_arm.inline.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "vmreg_ppc.inline.hpp"
|
||||
#endif
|
||||
|
||||
#endif // SHARE_VM_CODE_VMREG_INLINE_HPP
|
||||
@ -24,6 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "ci/ciMethod.hpp"
|
||||
#include "code/codeCache.hpp"
|
||||
#include "compiler/compileLog.hpp"
|
||||
#include "memory/allocation.inline.hpp"
|
||||
#include "oops/method.hpp"
|
||||
|
||||
@ -36,6 +36,9 @@
|
||||
#ifdef COMPILER1
|
||||
#include "c1/c1_Defs.hpp"
|
||||
#endif
|
||||
#ifdef COMPILER2
|
||||
#include "opto/optoreg.hpp"
|
||||
#endif
|
||||
|
||||
// OopMapStream
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -25,29 +25,12 @@
|
||||
#ifndef SHARE_VM_INTERPRETER_ABSTRACTINTERPRETER_HPP
|
||||
#define SHARE_VM_INTERPRETER_ABSTRACTINTERPRETER_HPP
|
||||
|
||||
#include "asm/macroAssembler.hpp"
|
||||
#include "code/stubs.hpp"
|
||||
#include "interpreter/bytecodes.hpp"
|
||||
#include "runtime/thread.inline.hpp"
|
||||
#include "runtime/vmThread.hpp"
|
||||
#include "utilities/top.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "interp_masm_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_sparc
|
||||
# include "interp_masm_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_zero
|
||||
# include "interp_masm_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_arm
|
||||
# include "interp_masm_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_32
|
||||
# include "interp_masm_ppc_32.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_64
|
||||
# include "interp_masm_ppc_64.hpp"
|
||||
#endif
|
||||
|
||||
// This file contains the platform-independent parts
|
||||
// of the abstract interpreter and the abstract interpreter generator.
|
||||
@ -75,6 +58,8 @@
|
||||
//------------------------------------------------------------------------------------------------------------------------
|
||||
// The C++ interface to the bytecode interpreter(s).
|
||||
|
||||
class InterpreterMacroAssembler;
|
||||
|
||||
class AbstractInterpreter: AllStatic {
|
||||
friend class VMStructs;
|
||||
friend class Interpreter;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,21 +28,7 @@
|
||||
#include "interpreter/bytecodes.hpp"
|
||||
#include "memory/allocation.hpp"
|
||||
#include "oops/method.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
#include "utilities/bytes.hpp"
|
||||
|
||||
class ciBytecodeStream;
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2002, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 2002, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -32,21 +32,6 @@
|
||||
#include "runtime/frame.hpp"
|
||||
#include "runtime/globals.hpp"
|
||||
#include "utilities/globalDefinitions.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
|
||||
#ifdef CC_INTERP
|
||||
|
||||
@ -56,6 +41,8 @@
|
||||
|
||||
// CVM definitions find hotspot equivalents...
|
||||
|
||||
class InterpreterMacroAssembler;
|
||||
|
||||
union VMJavaVal64 {
|
||||
jlong l;
|
||||
jdouble d;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -29,21 +29,7 @@
|
||||
#include "memory/allocation.hpp"
|
||||
#include "oops/method.hpp"
|
||||
#include "runtime/handles.inline.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
#include "utilities/bytes.hpp"
|
||||
|
||||
// A BytecodeStream is used for fast iteration over the bytecodes
|
||||
// of a Method*.
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -26,21 +26,7 @@
|
||||
#include "interpreter/bytecodes.hpp"
|
||||
#include "memory/resourceArea.hpp"
|
||||
#include "oops/method.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
#include "utilities/bytes.hpp"
|
||||
|
||||
|
||||
#if defined(WIN32) && (defined(_MSC_VER) && (_MSC_VER < 1600))
|
||||
|
||||
49
hotspot/src/share/vm/interpreter/interp_masm.hpp
Normal file
49
hotspot/src/share/vm/interpreter/interp_masm.hpp
Normal file
@ -0,0 +1,49 @@
|
||||
/*
|
||||
* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 only, as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* version 2 for more details (a copy is included in the LICENSE file that
|
||||
* accompanied this code).
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License version
|
||||
* 2 along with this work; if not, write to the Free Software Foundation,
|
||||
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
* or visit www.oracle.com if you need additional information or have any
|
||||
* questions.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SHARE_VM_INTERPRETER_INTERP_MASM_HPP
|
||||
#define SHARE_VM_INTERPRETER_INTERP_MASM_HPP
|
||||
|
||||
#include "asm/macroAssembler.hpp"
|
||||
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "interp_masm_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_sparc
|
||||
# include "interp_masm_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_zero
|
||||
# include "interp_masm_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_arm
|
||||
# include "interp_masm_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_32
|
||||
# include "interp_masm_ppc_32.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_64
|
||||
# include "interp_masm_ppc_64.hpp"
|
||||
#endif
|
||||
|
||||
#endif // SHARE_VM_INTERPRETER_INTERP_MASM_HPP
|
||||
@ -30,6 +30,7 @@
|
||||
#include "interpreter/bytecodeInterpreter.hpp"
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "memory/allocation.inline.hpp"
|
||||
#include "memory/resourceArea.hpp"
|
||||
@ -80,9 +81,35 @@ void InterpreterCodelet::print_on(outputStream* st) const {
|
||||
}
|
||||
}
|
||||
|
||||
CodeletMark::CodeletMark(InterpreterMacroAssembler*& masm,
|
||||
const char* description,
|
||||
Bytecodes::Code bytecode) :
|
||||
_clet((InterpreterCodelet*)AbstractInterpreter::code()->request(codelet_size())),
|
||||
_cb(_clet->code_begin(), _clet->code_size()) {
|
||||
// Request all space (add some slack for Codelet data).
|
||||
assert(_clet != NULL, "we checked not enough space already");
|
||||
|
||||
// Initialize Codelet attributes.
|
||||
_clet->initialize(description, bytecode);
|
||||
// Create assembler for code generation.
|
||||
masm = new InterpreterMacroAssembler(&_cb);
|
||||
_masm = &masm;
|
||||
}
|
||||
|
||||
CodeletMark::~CodeletMark() {
|
||||
// Align so printing shows nop's instead of random code at the end (Codelets are aligned).
|
||||
(*_masm)->align(wordSize);
|
||||
// Make sure all code is in code buffer.
|
||||
(*_masm)->flush();
|
||||
|
||||
// Commit Codelet.
|
||||
AbstractInterpreter::code()->commit((*_masm)->code()->pure_insts_size(), (*_masm)->code()->strings());
|
||||
// Make sure nobody can use _masm outside a CodeletMark lifespan.
|
||||
*_masm = NULL;
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------------------------------------------------
|
||||
// Implementation of platform independent aspects of Interpreter
|
||||
// Implementation of platform independent aspects of Interpreter
|
||||
|
||||
void AbstractInterpreter::initialize() {
|
||||
if (_code != NULL) return;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -37,6 +37,8 @@
|
||||
// This file contains the platform-independent parts
|
||||
// of the interpreter and the interpreter generator.
|
||||
|
||||
class InterpreterMacroAssembler;
|
||||
|
||||
//------------------------------------------------------------------------------------------------------------------------
|
||||
// An InterpreterCodelet is a piece of interpreter code. All
|
||||
// interpreter code is generated into little codelets which
|
||||
@ -99,42 +101,17 @@ class CodeletMark: ResourceMark {
|
||||
int codelet_size = AbstractInterpreter::code()->available_space() - 2*K;
|
||||
|
||||
// Guarantee there's a little bit of code space left.
|
||||
guarantee (codelet_size > 0 && (size_t)codelet_size > 2*K,
|
||||
"not enough space for interpreter generation");
|
||||
guarantee(codelet_size > 0 && (size_t)codelet_size > 2*K,
|
||||
"not enough space for interpreter generation");
|
||||
|
||||
return codelet_size;
|
||||
}
|
||||
|
||||
public:
|
||||
CodeletMark(
|
||||
InterpreterMacroAssembler*& masm,
|
||||
const char* description,
|
||||
Bytecodes::Code bytecode = Bytecodes::_illegal):
|
||||
_clet((InterpreterCodelet*)AbstractInterpreter::code()->request(codelet_size())),
|
||||
_cb(_clet->code_begin(), _clet->code_size())
|
||||
|
||||
{ // request all space (add some slack for Codelet data)
|
||||
assert (_clet != NULL, "we checked not enough space already");
|
||||
|
||||
// initialize Codelet attributes
|
||||
_clet->initialize(description, bytecode);
|
||||
// create assembler for code generation
|
||||
masm = new InterpreterMacroAssembler(&_cb);
|
||||
_masm = &masm;
|
||||
}
|
||||
|
||||
~CodeletMark() {
|
||||
// align so printing shows nop's instead of random code at the end (Codelets are aligned)
|
||||
(*_masm)->align(wordSize);
|
||||
// make sure all code is in code buffer
|
||||
(*_masm)->flush();
|
||||
|
||||
|
||||
// commit Codelet
|
||||
AbstractInterpreter::code()->commit((*_masm)->code()->pure_insts_size(), (*_masm)->code()->strings());
|
||||
// make sure nobody can use _masm outside a CodeletMark lifespan
|
||||
*_masm = NULL;
|
||||
}
|
||||
CodeletMark(InterpreterMacroAssembler*& masm,
|
||||
const char* description,
|
||||
Bytecodes::Code bytecode = Bytecodes::_illegal);
|
||||
~CodeletMark();
|
||||
};
|
||||
|
||||
// Wrapper classes to produce Interpreter/InterpreterGenerator from either
|
||||
@ -142,9 +119,10 @@ class CodeletMark: ResourceMark {
|
||||
|
||||
class Interpreter: public CC_INTERP_ONLY(CppInterpreter) NOT_CC_INTERP(TemplateInterpreter) {
|
||||
|
||||
public:
|
||||
public:
|
||||
// Debugging/printing
|
||||
static InterpreterCodelet* codelet_containing(address pc) { return (InterpreterCodelet*)_code->stub_containing(pc); }
|
||||
static InterpreterCodelet* codelet_containing(address pc) { return (InterpreterCodelet*)_code->stub_containing(pc); }
|
||||
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "interpreter_x86.hpp"
|
||||
#endif
|
||||
|
||||
@ -48,6 +48,7 @@
|
||||
#include "runtime/deoptimization.hpp"
|
||||
#include "runtime/fieldDescriptor.hpp"
|
||||
#include "runtime/handles.inline.hpp"
|
||||
#include "runtime/icache.hpp"
|
||||
#include "runtime/interfaceSupport.hpp"
|
||||
#include "runtime/java.hpp"
|
||||
#include "runtime/jfieldIDWorkaround.hpp"
|
||||
@ -57,21 +58,6 @@
|
||||
#include "runtime/synchronizer.hpp"
|
||||
#include "runtime/threadCritical.hpp"
|
||||
#include "utilities/events.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "vm_version_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "vm_version_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "vm_version_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "vm_version_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "vm_version_ppc.hpp"
|
||||
#endif
|
||||
#ifdef COMPILER2
|
||||
#include "opto/runtime.hpp"
|
||||
#endif
|
||||
|
||||
@ -26,6 +26,8 @@
|
||||
#include "interpreter/interpreter.hpp"
|
||||
#include "interpreter/interpreterGenerator.hpp"
|
||||
#include "interpreter/interpreterRuntime.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateInterpreter.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
|
||||
#ifndef CC_INTERP
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -33,6 +33,8 @@
|
||||
|
||||
#ifndef CC_INTERP
|
||||
|
||||
class InterpreterMacroAssembler;
|
||||
|
||||
//------------------------------------------------------------------------------------------------------------------------
|
||||
// A little wrapper class to group tosca-specific entry points into a unit.
|
||||
// (tosca = Top-Of-Stack CAche)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -24,6 +24,7 @@
|
||||
|
||||
#include "precompiled.hpp"
|
||||
#include "gc_interface/collectedHeap.hpp"
|
||||
#include "interpreter/interp_masm.hpp"
|
||||
#include "interpreter/templateTable.hpp"
|
||||
#include "runtime/timer.hpp"
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,24 +28,6 @@
|
||||
#include "interpreter/bytecodes.hpp"
|
||||
#include "memory/allocation.hpp"
|
||||
#include "runtime/frame.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "interp_masm_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_sparc
|
||||
# include "interp_masm_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_zero
|
||||
# include "interp_masm_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_arm
|
||||
# include "interp_masm_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_32
|
||||
# include "interp_masm_ppc_32.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_MODEL_ppc_64
|
||||
# include "interp_masm_ppc_64.hpp"
|
||||
#endif
|
||||
|
||||
#ifndef CC_INTERP
|
||||
// All the necessary definitions used for (bytecode) template generation. Instead of
|
||||
@ -53,6 +35,7 @@
|
||||
// and the snippet generator, a template is assigned to each bytecode which can be
|
||||
// used to generate the bytecode's implementation if needed.
|
||||
|
||||
class InterpreterMacroAssembler;
|
||||
|
||||
// A Template describes the properties of a code template for a given bytecode
|
||||
// and provides a generator to generate the code template.
|
||||
|
||||
@ -30,6 +30,7 @@
|
||||
#include "runtime/arguments.hpp"
|
||||
#include "runtime/java.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
#include "services/memTracker.hpp"
|
||||
#include "utilities/defaultStream.hpp"
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -28,6 +28,7 @@
|
||||
#include "gc_implementation/shared/gcUtil.hpp"
|
||||
#include "oops/typeArrayOop.hpp"
|
||||
#include "runtime/perfData.hpp"
|
||||
#include "runtime/vm_version.hpp"
|
||||
|
||||
class GlobalTLABStats;
|
||||
|
||||
|
||||
@ -31,22 +31,8 @@
|
||||
#include "oops/symbol.hpp"
|
||||
#include "oops/typeArrayOop.hpp"
|
||||
#include "runtime/handles.hpp"
|
||||
#include "utilities/bytes.hpp"
|
||||
#include "utilities/constantTag.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
|
||||
// A ConstantPool is an array containing class constants as described in the
|
||||
// class file.
|
||||
|
||||
@ -42,21 +42,6 @@
|
||||
#include "runtime/orderAccess.inline.hpp"
|
||||
#include "runtime/os.hpp"
|
||||
#include "utilities/macros.hpp"
|
||||
#ifdef TARGET_ARCH_x86
|
||||
# include "bytes_x86.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_sparc
|
||||
# include "bytes_sparc.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_zero
|
||||
# include "bytes_zero.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_arm
|
||||
# include "bytes_arm.hpp"
|
||||
#endif
|
||||
#ifdef TARGET_ARCH_ppc
|
||||
# include "bytes_ppc.hpp"
|
||||
#endif
|
||||
|
||||
// Implementation of all inlined member functions defined in oop.hpp
|
||||
// We need a separate file to avoid circular references
|
||||
|
||||
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Reference in New Issue
Block a user