diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp
index f7c9ebef3ef..32e6e33d133 100644
--- a/src/hotspot/cpu/x86/vm_version_x86.cpp
+++ b/src/hotspot/cpu/x86/vm_version_x86.cpp
@@ -3062,6 +3062,10 @@ uint64_t VM_Version::CpuidInfo::feature_flags() const {
     result |= CPU_TSCINV_BIT;
   if (std_cpuid1_ecx.bits.aes != 0)
     result |= CPU_AES;
+  if (ext_cpuid1_ecx.bits.lzcnt != 0)
+    result |= CPU_LZCNT;
+  if (ext_cpuid1_ecx.bits.prefetchw != 0)
+    result |= CPU_3DNOW_PREFETCH;
   if (sef_cpuid7_ebx.bits.erms != 0)
     result |= CPU_ERMS;
   if (sef_cpuid7_edx.bits.fast_short_rep_mov != 0)
@@ -3080,48 +3084,36 @@ uint64_t VM_Version::CpuidInfo::feature_flags() const {
     result |= CPU_FMA;
   if (sef_cpuid7_ebx.bits.clflushopt != 0)
     result |= CPU_FLUSHOPT;
+  if (sef_cpuid7_ebx.bits.clwb != 0)
+    result |= CPU_CLWB;
   if (ext_cpuid1_edx.bits.rdtscp != 0)
     result |= CPU_RDTSCP;
   if (sef_cpuid7_ecx.bits.rdpid != 0)
     result |= CPU_RDPID;
 
-  // AMD|Hygon features.
+  // AMD|Hygon additional features.
   if (is_amd_family()) {
-    if ((ext_cpuid1_edx.bits.tdnow != 0) ||
-        (ext_cpuid1_ecx.bits.prefetchw != 0))
+    // PREFETCHW was checked above, check TDNOW here.
+    if ((ext_cpuid1_edx.bits.tdnow != 0))
       result |= CPU_3DNOW_PREFETCH;
-    if (ext_cpuid1_ecx.bits.lzcnt != 0)
-      result |= CPU_LZCNT;
     if (ext_cpuid1_ecx.bits.sse4a != 0)
       result |= CPU_SSE4A;
   }
 
-  // Intel features.
+  // Intel additional features.
   if (is_intel()) {
-    if (ext_cpuid1_ecx.bits.lzcnt != 0) {
-      result |= CPU_LZCNT;
-    }
-    if (ext_cpuid1_ecx.bits.prefetchw != 0) {
-      result |= CPU_3DNOW_PREFETCH;
-    }
-    if (sef_cpuid7_ebx.bits.clwb != 0) {
-      result |= CPU_CLWB;
-    }
     if (sef_cpuid7_edx.bits.serialize != 0)
       result |= CPU_SERIALIZE;
-
     if (_cpuid_info.sef_cpuid7_edx.bits.avx512_fp16 != 0)
       result |= CPU_AVX512_FP16;
   }
 
-  // ZX features.
+  // ZX additional features.
   if (is_zx()) {
-    if (ext_cpuid1_ecx.bits.lzcnt != 0) {
-      result |= CPU_LZCNT;
-    }
-    if (ext_cpuid1_ecx.bits.prefetchw != 0) {
-      result |= CPU_3DNOW_PREFETCH;
-    }
+    // We do not know if these are supported by ZX, so we cannot trust
+    // common CPUID bit for them.
+    assert((result & CPU_CLWB) == 0, "Check if it is supported?");
+    result &= ~CPU_CLWB;
   }
 
   // Protection key features.