From 4594696f5462995ec58ca1d2c1bde7cc857c5caf Mon Sep 17 00:00:00 2001 From: Magnus Ihse Bursie Date: Tue, 19 Apr 2022 19:10:52 +0000 Subject: [PATCH] 8284903: Fix typos in hotspot Reviewed-by: cjplummer, coleenp, kvn, lucy, stefank --- src/hotspot/cpu/aarch64/aarch64.ad | 12 +++--- src/hotspot/cpu/aarch64/aarch64_neon.ad | 4 +- src/hotspot/cpu/aarch64/aarch64_neon_ad.m4 | 4 +- .../aarch64/abstractInterpreter_aarch64.cpp | 4 +- src/hotspot/cpu/aarch64/assembler_aarch64.hpp | 4 +- .../cpu/aarch64/c1_LIRAssembler_aarch64.cpp | 2 +- .../cpu/aarch64/c1_Runtime1_aarch64.cpp | 2 +- .../cpu/aarch64/c2_MacroAssembler_aarch64.cpp | 4 +- .../shenandoahBarrierSetAssembler_aarch64.cpp | 2 +- .../gc/z/zBarrierSetAssembler_aarch64.cpp | 2 +- .../cpu/aarch64/gc/z/zGlobals_aarch64.cpp | 6 +-- src/hotspot/cpu/aarch64/globals_aarch64.hpp | 2 +- src/hotspot/cpu/aarch64/immediate_aarch64.cpp | 2 +- .../cpu/aarch64/interp_masm_aarch64.cpp | 6 +-- .../cpu/aarch64/interp_masm_aarch64.hpp | 4 +- .../cpu/aarch64/macroAssembler_aarch64.cpp | 26 ++++++------ .../cpu/aarch64/macroAssembler_aarch64.hpp | 18 ++++----- .../aarch64/macroAssembler_aarch64_aes.cpp | 8 ++-- .../aarch64/macroAssembler_aarch64_trig.cpp | 14 +++---- src/hotspot/cpu/aarch64/matcher_aarch64.hpp | 4 +- .../cpu/aarch64/registerMap_aarch64.hpp | 4 +- .../cpu/aarch64/sharedRuntime_aarch64.cpp | 6 +-- .../cpu/aarch64/stubGenerator_aarch64.cpp | 22 +++++----- .../cpu/aarch64/stubRoutines_aarch64.cpp | 4 +- .../cpu/aarch64/templateTable_aarch64.cpp | 8 ++-- .../cpu/arm/abstractInterpreter_arm.cpp | 4 +- src/hotspot/cpu/arm/arm.ad | 12 +++--- src/hotspot/cpu/arm/arm_32.ad | 4 +- src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp | 4 +- src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp | 6 +-- src/hotspot/cpu/arm/c1_Runtime1_arm.cpp | 4 +- src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp | 4 +- src/hotspot/cpu/arm/compiledIC_arm.cpp | 4 +- src/hotspot/cpu/arm/interp_masm_arm.cpp | 4 +- src/hotspot/cpu/arm/interp_masm_arm.hpp | 4 +- src/hotspot/cpu/arm/macroAssembler_arm.cpp | 6 +-- src/hotspot/cpu/arm/macroAssembler_arm.hpp | 4 +- src/hotspot/cpu/arm/matcher_arm.hpp | 4 +- src/hotspot/cpu/arm/registerMap_arm.hpp | 4 +- src/hotspot/cpu/arm/sharedRuntime_arm.cpp | 6 +-- src/hotspot/cpu/arm/stubGenerator_arm.cpp | 6 +-- .../cpu/arm/stubRoutinesCrypto_arm.cpp | 14 +++---- .../arm/templateInterpreterGenerator_arm.cpp | 6 +-- src/hotspot/cpu/arm/templateTable_arm.cpp | 10 ++--- src/hotspot/cpu/ppc/assembler_ppc.cpp | 4 +- src/hotspot/cpu/ppc/assembler_ppc.hpp | 8 ++-- src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp | 2 +- src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp | 4 +- .../cpu/ppc/gc/z/zBarrierSetAssembler_ppc.cpp | 6 +-- src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.cpp | 4 +- src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp | 4 +- src/hotspot/cpu/ppc/macroAssembler_ppc.cpp | 10 ++--- src/hotspot/cpu/ppc/macroAssembler_ppc.hpp | 4 +- .../cpu/ppc/macroAssembler_ppc.inline.hpp | 4 +- .../cpu/ppc/macroAssembler_ppc_sha.cpp | 4 +- src/hotspot/cpu/ppc/matcher_ppc.hpp | 4 +- src/hotspot/cpu/ppc/methodHandles_ppc.cpp | 4 +- src/hotspot/cpu/ppc/ppc.ad | 20 +++++----- src/hotspot/cpu/ppc/registerMap_ppc.hpp | 4 +- src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp | 6 +-- src/hotspot/cpu/ppc/stubGenerator_ppc.cpp | 4 +- .../ppc/templateInterpreterGenerator_ppc.cpp | 6 +-- src/hotspot/cpu/ppc/templateTable_ppc_64.cpp | 10 ++--- src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp | 6 +-- .../cpu/riscv/abstractInterpreter_riscv.cpp | 4 +- src/hotspot/cpu/riscv/assembler_riscv.hpp | 4 +- .../cpu/riscv/c1_LIRAssembler_riscv.cpp | 8 ++-- .../cpu/riscv/c1_MacroAssembler_riscv.cpp | 6 +-- .../cpu/riscv/c2_MacroAssembler_riscv.cpp | 6 +-- .../shenandoahBarrierSetAssembler_riscv.cpp | 4 +- .../riscv/gc/z/zBarrierSetAssembler_riscv.cpp | 4 +- src/hotspot/cpu/riscv/gc/z/zGlobals_riscv.cpp | 6 +-- src/hotspot/cpu/riscv/interp_masm_riscv.cpp | 6 +-- src/hotspot/cpu/riscv/interp_masm_riscv.hpp | 4 +- .../cpu/riscv/macroAssembler_riscv.cpp | 26 ++++++------ .../cpu/riscv/macroAssembler_riscv.hpp | 12 +++--- src/hotspot/cpu/riscv/matcher_riscv.hpp | 4 +- src/hotspot/cpu/riscv/registerMap_riscv.hpp | 4 +- src/hotspot/cpu/riscv/riscv.ad | 8 ++-- src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp | 8 ++-- src/hotspot/cpu/riscv/stubGenerator_riscv.cpp | 10 ++--- src/hotspot/cpu/riscv/templateTable_riscv.cpp | 18 ++++----- src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp | 4 +- src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp | 6 +-- src/hotspot/cpu/s390/frame_s390.inline.hpp | 4 +- src/hotspot/cpu/s390/interp_masm_s390.cpp | 6 +-- src/hotspot/cpu/s390/interp_masm_s390.hpp | 6 +-- src/hotspot/cpu/s390/macroAssembler_s390.cpp | 20 +++++----- src/hotspot/cpu/s390/matcher_s390.hpp | 2 +- src/hotspot/cpu/s390/methodHandles_s390.cpp | 4 +- src/hotspot/cpu/s390/nativeInst_s390.cpp | 6 +-- src/hotspot/cpu/s390/s390.ad | 10 ++--- src/hotspot/cpu/s390/sharedRuntime_s390.cpp | 4 +- src/hotspot/cpu/s390/stubGenerator_s390.cpp | 6 +-- .../templateInterpreterGenerator_s390.cpp | 4 +- src/hotspot/cpu/s390/templateTable_s390.cpp | 4 +- .../cpu/x86/abstractInterpreter_x86.cpp | 4 +- src/hotspot/cpu/x86/assembler_x86.cpp | 16 ++++---- src/hotspot/cpu/x86/assembler_x86.hpp | 10 ++--- src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp | 6 +-- src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp | 3 +- src/hotspot/cpu/x86/c1_LinearScan_x86.cpp | 14 +++---- src/hotspot/cpu/x86/c1_Runtime1_x86.cpp | 6 +-- src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp | 4 +- src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp | 2 +- src/hotspot/cpu/x86/interp_masm_x86.cpp | 6 +-- src/hotspot/cpu/x86/interp_masm_x86.hpp | 4 +- src/hotspot/cpu/x86/macroAssembler_x86.cpp | 16 ++++---- src/hotspot/cpu/x86/macroAssembler_x86.hpp | 6 +-- .../cpu/x86/macroAssembler_x86_aes.cpp | 8 ++-- src/hotspot/cpu/x86/matcher_x86.hpp | 6 +-- src/hotspot/cpu/x86/methodHandles_x86.cpp | 4 +- src/hotspot/cpu/x86/nativeInst_x86.cpp | 12 +++--- src/hotspot/cpu/x86/registerMap_x86.hpp | 4 +- src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp | 4 +- src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp | 6 +-- src/hotspot/cpu/x86/stubGenerator_x86_32.cpp | 6 +-- src/hotspot/cpu/x86/stubGenerator_x86_64.cpp | 22 +++++----- .../x86/templateInterpreterGenerator_x86.cpp | 2 +- src/hotspot/cpu/x86/templateTable_x86.cpp | 8 ++-- src/hotspot/cpu/x86/vm_version_x86.cpp | 10 ++--- src/hotspot/cpu/x86/vm_version_x86.hpp | 2 +- src/hotspot/cpu/x86/x86.ad | 6 +-- src/hotspot/cpu/x86/x86_32.ad | 10 ++--- src/hotspot/cpu/x86/x86_64.ad | 12 +++--- src/hotspot/cpu/zero/interp_masm_zero.hpp | 4 +- src/hotspot/cpu/zero/interpreterRT_zero.cpp | 4 +- src/hotspot/cpu/zero/registerMap_zero.hpp | 4 +- src/hotspot/cpu/zero/zeroInterpreter_zero.cpp | 4 +- src/hotspot/os/aix/attachListener_aix.cpp | 2 +- src/hotspot/os/aix/libperfstat_aix.hpp | 40 +++++++++---------- src/hotspot/os/aix/os_aix.cpp | 6 +-- src/hotspot/os/aix/os_aix.inline.hpp | 4 +- src/hotspot/os/aix/porting_aix.cpp | 6 +-- src/hotspot/os/aix/porting_aix.hpp | 2 +- src/hotspot/os/bsd/attachListener_bsd.cpp | 2 +- src/hotspot/os/bsd/os_bsd.cpp | 8 ++-- src/hotspot/os/bsd/semaphore_bsd.cpp | 4 +- src/hotspot/os/linux/attachListener_linux.cpp | 2 +- .../os/linux/cgroupV2Subsystem_linux.cpp | 2 +- src/hotspot/os/linux/os_linux.cpp | 6 +-- src/hotspot/os/linux/os_perf_linux.cpp | 2 +- src/hotspot/os/posix/os_posix.cpp | 2 +- src/hotspot/os/posix/perfMemory_posix.cpp | 2 +- src/hotspot/os/posix/signals_posix.cpp | 2 +- src/hotspot/os/posix/vmError_posix.cpp | 4 +- .../os/windows/attachListener_windows.cpp | 2 +- .../os/windows/gc/z/zMapper_windows.cpp | 4 +- .../gc/z/zPhysicalMemoryBacking_windows.cpp | 4 +- src/hotspot/os/windows/iphlp_interface.cpp | 4 +- src/hotspot/os/windows/os_windows.cpp | 10 ++--- src/hotspot/os/windows/os_windows.hpp | 4 +- src/hotspot/os/windows/pdh_interface.cpp | 4 +- src/hotspot/os/windows/perfMemory_windows.cpp | 8 ++-- src/hotspot/os_cpu/aix_ppc/thread_aix_ppc.cpp | 4 +- .../bsd_aarch64/vm_version_bsd_aarch64.cpp | 4 +- .../linux_arm/macroAssembler_linux_arm_32.cpp | 8 ++-- src/hotspot/os_cpu/linux_arm/os_linux_arm.cpp | 4 +- src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp | 6 +-- .../os_cpu/linux_ppc/thread_linux_ppc.cpp | 2 +- .../os_cpu/linux_s390/thread_linux_s390.cpp | 2 +- .../os_cpu/windows_x86/os_windows_x86.cpp | 6 +-- src/hotspot/share/adlc/Doc/Syntax.doc | 4 +- src/hotspot/share/adlc/adlparse.cpp | 14 +++---- src/hotspot/share/adlc/adlparse.hpp | 6 +-- src/hotspot/share/adlc/archDesc.cpp | 6 +-- src/hotspot/share/adlc/archDesc.hpp | 12 +++--- src/hotspot/share/adlc/dfa.cpp | 2 +- src/hotspot/share/adlc/dict2.hpp | 2 +- src/hotspot/share/adlc/forms.hpp | 4 +- src/hotspot/share/adlc/formssel.cpp | 2 +- src/hotspot/share/adlc/formssel.hpp | 6 +-- src/hotspot/share/adlc/main.cpp | 4 +- src/hotspot/share/adlc/output_h.cpp | 8 ++-- src/hotspot/share/c1/c1_FrameMap.hpp | 4 +- src/hotspot/share/c1/c1_GraphBuilder.cpp | 4 +- src/hotspot/share/c1/c1_IR.cpp | 14 +++---- src/hotspot/share/c1/c1_Instruction.cpp | 6 +-- src/hotspot/share/c1/c1_Instruction.hpp | 2 +- src/hotspot/share/c1/c1_LIR.hpp | 6 +-- src/hotspot/share/c1/c1_LIRGenerator.cpp | 6 +-- src/hotspot/share/c1/c1_LIRGenerator.hpp | 4 +- src/hotspot/share/c1/c1_LinearScan.cpp | 32 +++++++-------- src/hotspot/share/c1/c1_Optimizer.cpp | 4 +- .../share/c1/c1_RangeCheckElimination.cpp | 4 +- src/hotspot/share/c1/c1_Runtime1.cpp | 6 +-- src/hotspot/share/c1/c1_globals.hpp | 6 +-- src/hotspot/share/cds/filemap.cpp | 2 +- src/hotspot/share/cds/heapShared.cpp | 8 ++-- src/hotspot/share/cds/metaspaceShared.cpp | 2 +- src/hotspot/share/cds/metaspaceShared.hpp | 2 +- src/hotspot/share/ci/ciEnv.cpp | 4 +- src/hotspot/share/ci/ciEnv.hpp | 4 +- src/hotspot/share/ci/ciMethodData.hpp | 4 +- src/hotspot/share/ci/ciReplay.cpp | 2 +- src/hotspot/share/ci/ciTypeFlow.hpp | 4 +- .../share/classfile/classFileParser.cpp | 8 ++-- src/hotspot/share/classfile/classLoader.cpp | 6 +-- src/hotspot/share/classfile/classLoader.hpp | 2 +- .../share/classfile/classLoaderData.hpp | 6 +-- .../classfile/classLoaderHierarchyDCmd.cpp | 6 +-- .../share/classfile/defaultMethods.cpp | 2 +- src/hotspot/share/classfile/dictionary.cpp | 6 +-- src/hotspot/share/classfile/javaClasses.cpp | 4 +- src/hotspot/share/classfile/moduleEntry.hpp | 4 +- .../share/classfile/systemDictionary.cpp | 2 +- .../classfile/systemDictionaryShared.cpp | 6 +-- .../share/classfile/verificationType.hpp | 8 ++-- src/hotspot/share/classfile/verifier.cpp | 4 +- src/hotspot/share/classfile/vmIntrinsics.hpp | 2 +- src/hotspot/share/code/codeHeapState.hpp | 4 +- src/hotspot/share/code/compiledIC.cpp | 4 +- src/hotspot/share/code/compiledMethod.cpp | 6 +-- src/hotspot/share/code/debugInfoRec.cpp | 4 +- src/hotspot/share/code/debugInfoRec.hpp | 4 +- src/hotspot/share/code/dependencyContext.cpp | 2 +- .../share/code/exceptionHandlerTable.cpp | 2 +- src/hotspot/share/code/nmethod.cpp | 4 +- src/hotspot/share/code/nmethod.hpp | 6 +-- src/hotspot/share/code/oopRecorder.hpp | 4 +- src/hotspot/share/code/relocInfo.cpp | 4 +- src/hotspot/share/code/relocInfo.hpp | 12 +++--- .../share/compiler/abstractCompiler.hpp | 4 +- .../share/compiler/compilationPolicy.cpp | 4 +- src/hotspot/share/compiler/compileBroker.cpp | 4 +- src/hotspot/share/compiler/compileBroker.hpp | 4 +- src/hotspot/share/compiler/methodLiveness.cpp | 20 +++++----- src/hotspot/share/gc/g1/g1AllocRegion.cpp | 6 +-- src/hotspot/share/gc/g1/g1AllocRegion.hpp | 4 +- src/hotspot/share/gc/g1/g1CardSet.inline.hpp | 4 +- .../share/gc/g1/g1CollectionSetCandidates.hpp | 4 +- src/hotspot/share/gc/g1/g1ConcurrentMark.cpp | 6 +-- .../share/gc/g1/g1MonitoringSupport.cpp | 4 +- src/hotspot/share/gc/g1/g1NUMA.cpp | 4 +- .../share/gc/g1/g1OldGenAllocationTracker.hpp | 2 +- .../share/gc/g1/g1ParScanThreadState.cpp | 4 +- src/hotspot/share/gc/g1/g1RemSet.cpp | 2 +- .../share/gc/g1/g1UncommitRegionTask.hpp | 4 +- .../gc/g1/g1YoungGCEvacFailureInjector.hpp | 4 +- src/hotspot/share/gc/g1/heapRegionManager.cpp | 4 +- src/hotspot/share/gc/parallel/psOldGen.hpp | 4 +- .../gc/parallel/psPromotionManager.inline.hpp | 4 +- .../share/gc/serial/tenuredGeneration.cpp | 4 +- .../share/gc/shared/c1/barrierSetC1.hpp | 4 +- .../share/gc/shared/c2/barrierSetC2.hpp | 6 +-- .../gc/shared/concurrentGCBreakpoints.hpp | 6 +-- src/hotspot/share/gc/shared/gcCause.hpp | 2 +- src/hotspot/share/gc/shared/gcConfig.cpp | 4 +- .../share/gc/shared/gcVMOperations.hpp | 4 +- .../share/gc/shared/genCollectedHeap.cpp | 4 +- .../shared/partialArrayTaskStepper.inline.hpp | 6 +-- src/hotspot/share/gc/shared/plab.cpp | 4 +- .../share/gc/shared/referenceProcessor.hpp | 4 +- .../gc/shared/stringdedup/stringDedup.hpp | 4 +- .../gc/shared/stringdedup/stringDedupStat.cpp | 4 +- .../shared/stringdedup/stringDedupTable.cpp | 4 +- .../gc/shenandoah/c2/shenandoahSupport.cpp | 2 +- .../gc/shenandoah/shenandoahBarrierSet.cpp | 2 +- .../gc/shenandoah/shenandoahHeap.inline.hpp | 2 +- .../shenandoahMarkBitMap.inline.hpp | 4 +- src/hotspot/share/gc/z/c2/zBarrierSetC2.cpp | 4 +- src/hotspot/share/gc/z/zResurrection.cpp | 4 +- src/hotspot/share/include/jvm.h | 2 +- src/hotspot/share/include/jvm_io.h | 4 +- .../share/interpreter/abstractInterpreter.cpp | 8 ++-- .../share/interpreter/bytecodeHistogram.hpp | 2 +- .../share/interpreter/bytecodeStream.hpp | 4 +- .../share/interpreter/bytecodeUtils.cpp | 6 +-- .../share/interpreter/interpreterRuntime.cpp | 10 ++--- .../share/interpreter/linkResolver.cpp | 4 +- src/hotspot/share/interpreter/oopMapCache.cpp | 2 +- src/hotspot/share/interpreter/oopMapCache.hpp | 4 +- .../share/interpreter/templateInterpreter.cpp | 2 +- .../interpreter/zero/bytecodeInterpreter.cpp | 14 +++---- src/hotspot/share/jfr/dcmd/jfrDcmds.cpp | 4 +- .../jfrEventClassTransformer.cpp | 4 +- .../jfr/leakprofiler/chains/dfsClosure.cpp | 4 +- .../checkpoint/objectSampleWriter.cpp | 2 +- .../leakprofiler/sampling/objectSampler.hpp | 4 +- src/hotspot/share/jfr/metadata/metadata.xml | 20 +++++----- .../checkpoint/types/jfrTypeSetUtils.hpp | 4 +- .../jfr/recorder/repository/jfrRepository.hpp | 4 +- .../share/jfr/recorder/service/jfrEvent.hpp | 6 +-- .../recorder/service/jfrEventThrottler.cpp | 4 +- .../jfr/recorder/service/jfrOptionSet.cpp | 6 +-- .../jfr/recorder/storage/jfrMemorySpace.hpp | 4 +- .../share/jfr/support/jfrAdaptiveSampler.cpp | 4 +- .../share/jfr/support/jfrAdaptiveSampler.hpp | 4 +- .../jfrConcurrentLinkedListHost.inline.hpp | 4 +- .../share/jfr/utilities/jfrVersionSystem.hpp | 4 +- .../share/jfr/writers/jfrStorageAdapter.hpp | 4 +- src/hotspot/share/jvmci/jvmciEnv.hpp | 2 +- src/hotspot/share/jvmci/jvmciExceptions.hpp | 4 +- src/hotspot/share/jvmci/jvmciRuntime.cpp | 4 +- src/hotspot/share/jvmci/jvmciRuntime.hpp | 4 +- src/hotspot/share/libadt/dict.hpp | 4 +- src/hotspot/share/logging/logAsyncWriter.cpp | 2 +- src/hotspot/share/logging/logAsyncWriter.hpp | 2 +- src/hotspot/share/memory/allocation.hpp | 4 +- src/hotspot/share/memory/heapInspection.cpp | 6 +-- src/hotspot/share/memory/iterator.hpp | 4 +- src/hotspot/share/memory/memRegion.cpp | 4 +- src/hotspot/share/memory/memRegion.hpp | 4 +- src/hotspot/share/memory/metaspace.cpp | 8 ++-- .../share/memory/metaspace/chunkManager.cpp | 2 +- .../share/memory/metaspace/commitMask.hpp | 2 +- .../share/memory/metaspace/freeChunkList.hpp | 4 +- .../share/memory/metaspace/metachunk.cpp | 4 +- .../share/memory/metaspace/metachunk.hpp | 6 +-- .../share/memory/metaspace/metaspaceArena.cpp | 4 +- .../share/memory/metaspace/metaspaceArena.hpp | 4 +- .../memory/metaspace/metaspaceSettings.cpp | 4 +- .../share/memory/metaspace/testHelpers.hpp | 4 +- .../memory/metaspace/virtualSpaceNode.hpp | 4 +- src/hotspot/share/memory/metaspaceStats.hpp | 4 +- src/hotspot/share/memory/universe.cpp | 2 +- .../share/metaprogramming/enableIf.hpp | 4 +- src/hotspot/share/oops/accessDecorators.hpp | 2 +- src/hotspot/share/oops/arrayKlass.cpp | 4 +- src/hotspot/share/oops/compressedOops.cpp | 4 +- src/hotspot/share/oops/constantPool.cpp | 6 +-- src/hotspot/share/oops/constantPool.hpp | 6 +-- src/hotspot/share/oops/fieldInfo.hpp | 4 +- src/hotspot/share/oops/generateOopMap.cpp | 14 +++---- src/hotspot/share/oops/generateOopMap.hpp | 16 ++++---- src/hotspot/share/oops/instanceKlass.cpp | 2 +- src/hotspot/share/oops/instanceKlass.hpp | 4 +- src/hotspot/share/oops/klass.cpp | 4 +- src/hotspot/share/oops/klassVtable.cpp | 4 +- src/hotspot/share/oops/klassVtable.hpp | 4 +- src/hotspot/share/oops/method.cpp | 6 +-- src/hotspot/share/oops/methodData.cpp | 4 +- src/hotspot/share/oops/methodData.hpp | 8 ++-- src/hotspot/share/oops/oop.inline.hpp | 6 +-- src/hotspot/share/oops/symbol.hpp | 6 +-- src/hotspot/share/opto/arraycopynode.cpp | 4 +- src/hotspot/share/opto/block.cpp | 4 +- src/hotspot/share/opto/bytecodeInfo.cpp | 4 +- src/hotspot/share/opto/c2_globals.hpp | 8 ++-- src/hotspot/share/opto/callGenerator.cpp | 2 +- src/hotspot/share/opto/callnode.cpp | 4 +- src/hotspot/share/opto/callnode.hpp | 2 +- src/hotspot/share/opto/cfgnode.cpp | 2 +- src/hotspot/share/opto/cfgnode.hpp | 4 +- src/hotspot/share/opto/chaitin.cpp | 6 +-- src/hotspot/share/opto/chaitin.hpp | 6 +-- src/hotspot/share/opto/coalesce.cpp | 4 +- src/hotspot/share/opto/compile.cpp | 6 +-- src/hotspot/share/opto/domgraph.cpp | 4 +- src/hotspot/share/opto/escape.cpp | 6 +-- src/hotspot/share/opto/escape.hpp | 4 +- src/hotspot/share/opto/gcm.cpp | 4 +- src/hotspot/share/opto/graphKit.cpp | 6 +-- src/hotspot/share/opto/graphKit.hpp | 6 +-- src/hotspot/share/opto/idealKit.cpp | 4 +- src/hotspot/share/opto/ifnode.cpp | 4 +- src/hotspot/share/opto/lcm.cpp | 6 +-- src/hotspot/share/opto/library_call.cpp | 14 +++---- src/hotspot/share/opto/locknode.hpp | 6 +-- src/hotspot/share/opto/loopPredicate.cpp | 4 +- src/hotspot/share/opto/loopnode.cpp | 10 ++--- src/hotspot/share/opto/loopopts.cpp | 4 +- src/hotspot/share/opto/machnode.hpp | 6 +-- src/hotspot/share/opto/macro.cpp | 12 +++--- src/hotspot/share/opto/matcher.cpp | 2 +- src/hotspot/share/opto/memnode.cpp | 6 +-- src/hotspot/share/opto/memnode.hpp | 10 ++--- src/hotspot/share/opto/node.hpp | 2 +- src/hotspot/share/opto/optoreg.hpp | 4 +- src/hotspot/share/opto/parse1.cpp | 6 +-- src/hotspot/share/opto/parse2.cpp | 2 +- src/hotspot/share/opto/reg_split.cpp | 10 ++--- src/hotspot/share/opto/regmask.cpp | 4 +- src/hotspot/share/opto/replacednodes.cpp | 4 +- src/hotspot/share/opto/stringopts.cpp | 6 +-- src/hotspot/share/opto/subnode.hpp | 4 +- src/hotspot/share/opto/superword.cpp | 4 +- src/hotspot/share/opto/superword.hpp | 2 +- src/hotspot/share/opto/type.cpp | 14 +++---- src/hotspot/share/opto/vectorIntrinsics.cpp | 2 +- src/hotspot/share/opto/vectornode.cpp | 2 +- src/hotspot/share/prims/forte.cpp | 4 +- src/hotspot/share/prims/jni.cpp | 6 +-- src/hotspot/share/prims/jniCheck.cpp | 4 +- src/hotspot/share/prims/jvm.cpp | 2 +- src/hotspot/share/prims/jvmti.xml | 20 +++++----- .../prims/jvmtiClassFileReconstituter.cpp | 2 +- src/hotspot/share/prims/jvmtiEnvFill.java | 4 +- .../share/prims/jvmtiEnvThreadState.cpp | 4 +- src/hotspot/share/prims/jvmtiExport.cpp | 6 +-- src/hotspot/share/prims/jvmtiExport.hpp | 4 +- src/hotspot/share/prims/jvmtiRawMonitor.hpp | 4 +- .../share/prims/jvmtiRedefineClasses.cpp | 4 +- src/hotspot/share/prims/jvmtiTagMap.cpp | 4 +- src/hotspot/share/prims/jvmtiThreadState.hpp | 4 +- src/hotspot/share/prims/nativeLookup.cpp | 8 ++-- .../share/prims/scopedMemoryAccess.cpp | 4 +- src/hotspot/share/prims/whitebox.cpp | 2 +- src/hotspot/share/runtime/deoptimization.cpp | 4 +- src/hotspot/share/runtime/globals_shared.hpp | 4 +- src/hotspot/share/runtime/javaCalls.cpp | 4 +- src/hotspot/share/runtime/jniHandles.cpp | 2 +- .../share/runtime/notificationThread.hpp | 4 +- src/hotspot/share/runtime/orderAccess.hpp | 2 +- src/hotspot/share/runtime/os.cpp | 4 +- src/hotspot/share/runtime/os.hpp | 2 +- src/hotspot/share/runtime/serviceThread.hpp | 4 +- src/hotspot/share/runtime/sharedRuntime.cpp | 4 +- src/hotspot/share/runtime/sharedRuntime.hpp | 2 +- .../share/runtime/sharedRuntimeTrig.cpp | 6 +-- src/hotspot/share/runtime/statSampler.cpp | 4 +- src/hotspot/share/runtime/task.hpp | 4 +- src/hotspot/share/runtime/thread.hpp | 2 +- src/hotspot/share/runtime/vframe.cpp | 6 +-- src/hotspot/share/runtime/vframe.inline.hpp | 6 +-- src/hotspot/share/runtime/vframe_hp.cpp | 4 +- .../share/services/diagnosticCommand.cpp | 2 +- src/hotspot/share/services/heapDumper.cpp | 6 +-- .../share/services/mallocSiteTable.cpp | 4 +- .../share/services/mallocSiteTable.hpp | 2 +- src/hotspot/share/services/memReporter.cpp | 4 +- src/hotspot/share/services/memReporter.hpp | 2 +- src/hotspot/share/services/memTracker.hpp | 2 +- src/hotspot/share/services/threadIdTable.cpp | 6 +-- src/hotspot/share/utilities/bitMap.cpp | 4 +- src/hotspot/share/utilities/bitMap.hpp | 8 ++-- src/hotspot/share/utilities/bitMap.inline.hpp | 4 +- .../share/utilities/concurrentHashTable.hpp | 4 +- src/hotspot/share/utilities/debug.cpp | 4 +- .../share/utilities/dtrace_disabled.hpp | 4 +- src/hotspot/share/utilities/elfFile.cpp | 2 +- .../share/utilities/elfSymbolTable.cpp | 4 +- src/hotspot/share/utilities/events.hpp | 4 +- src/hotspot/share/utilities/exceptions.cpp | 4 +- src/hotspot/share/utilities/globalCounter.hpp | 2 +- .../share/utilities/globalDefinitions.hpp | 8 ++-- .../share/utilities/globalDefinitions_xlc.hpp | 2 +- src/hotspot/share/utilities/json.cpp | 4 +- src/hotspot/share/utilities/lockFreeStack.hpp | 4 +- src/hotspot/share/utilities/macros.hpp | 2 +- .../share/utilities/population_count.hpp | 4 +- src/hotspot/share/utilities/quickSort.hpp | 2 +- src/hotspot/share/utilities/utf8.hpp | 4 +- .../share/utilities/virtualizationSupport.hpp | 4 +- src/hotspot/share/utilities/vmError.hpp | 4 +- src/hotspot/share/utilities/xmlstream.cpp | 4 +- 446 files changed, 1196 insertions(+), 1197 deletions(-) diff --git a/src/hotspot/cpu/aarch64/aarch64.ad b/src/hotspot/cpu/aarch64/aarch64.ad index 7ceeef099a1..0c19b7b44c7 100644 --- a/src/hotspot/cpu/aarch64/aarch64.ad +++ b/src/hotspot/cpu/aarch64/aarch64.ad @@ -28,7 +28,7 @@ //----------REGISTER DEFINITION BLOCK------------------------------------------ // This information is used by the matcher and the register allocator to // describe individual registers and classes of registers within the target -// archtecture. +// architecture. register %{ //----------Architecture Description Register Definitions---------------------- @@ -488,7 +488,7 @@ reg_def R31_H ( NS, NS, Op_RegI, 31, r31_sp->as_VMReg()->next()); // Special Registers // ---------------------------- -// the AArch64 CSPR status flag register is not directly acessible as +// the AArch64 CSPR status flag register is not directly accessible as // instruction operand. the FPSR status flag register is a system // register which can be written/read using MSR/MRS but again does not // appear as an operand (a code identifying the FSPR occurs as an @@ -1508,7 +1508,7 @@ source %{ // node sequence to a normal volatile get because of the // introduction of some CPUOrder memory barriers to bracket the // Load. However, but the same basic skeleton of a LoadX feeding a - // MemBarAcquire, possibly thorugh an optional DecodeN, is still + // MemBarAcquire, possibly through an optional DecodeN, is still // present // // MemBarCPUOrder @@ -4117,10 +4117,10 @@ encode %{ // Region 6-7 is determined per call site. // Note 2: If the calling convention leaves holes in the incoming argument // area, those holes are owned by SELF. Holes in the outgoing area -// are owned by the CALLEE. Holes should not be nessecary in the +// are owned by the CALLEE. Holes should not be necessary in the // incoming area, as the Java calling convention is completely under // the control of the AD file. Doubles can be sorted and packed to -// avoid holes. Holes in the outgoing arguments may be nessecary for +// avoid holes. Holes in the outgoing arguments may be necessary for // varargs C calling conventions. // Note 3: Region 0-3 is even aligned, with pad2 as needed. Region 3-5 is // even aligned with pad0 as needed. @@ -17344,7 +17344,7 @@ instruct tlsLoadP(thread_RegP dst) // // // Change (inc mov) to lea // peephole %{ -// // increment preceeded by register-register move +// // increment preceded by register-register move // peepmatch ( incI_iReg movI ); // // require that the destination register of the increment // // match the destination register of the move diff --git a/src/hotspot/cpu/aarch64/aarch64_neon.ad b/src/hotspot/cpu/aarch64/aarch64_neon.ad index beeae22a8eb..b8b6a0f7bcf 100644 --- a/src/hotspot/cpu/aarch64/aarch64_neon.ad +++ b/src/hotspot/cpu/aarch64/aarch64_neon.ad @@ -5844,7 +5844,7 @@ instruct vmask_lasttrue8B(iRegINoSp dst, vecD src) %{ // bytes with 0x00/0x01 as element values. // // Computed by counting the leading zero bytes and - // substracting it by 7 (VLENGTH - 1). + // subtracting it by 7 (VLENGTH - 1). __ fmovd($dst$$Register, as_FloatRegister($src$$reg)); __ clz($dst$$Register, $dst$$Register); __ movw(rscratch1, 7); @@ -5876,7 +5876,7 @@ instruct vmask_lasttrue16B(iRegINoSp dst, vecX src) %{ __ fmovd($dst$$Register, as_FloatRegister($src$$reg)); __ movw(rscratch1, 8 - 1); - // Count the leading zero bytes and substract it by 15 (VLENGTH - 1). + // Count the leading zero bytes and subtract it by 15 (VLENGTH - 1). __ bind(LAST_TRUE_INDEX); __ clz($dst$$Register, $dst$$Register); __ subw($dst$$Register, rscratch1, $dst$$Register, Assembler::LSR, 3); diff --git a/src/hotspot/cpu/aarch64/aarch64_neon_ad.m4 b/src/hotspot/cpu/aarch64/aarch64_neon_ad.m4 index 212b9a118fd..73078b2da82 100644 --- a/src/hotspot/cpu/aarch64/aarch64_neon_ad.m4 +++ b/src/hotspot/cpu/aarch64/aarch64_neon_ad.m4 @@ -2548,7 +2548,7 @@ instruct vmask_lasttrue8B(iRegINoSp dst, vecD src) %{ // bytes with 0x00/0x01 as element values. // // Computed by counting the leading zero bytes and - // substracting it by 7 (VLENGTH - 1). + // subtracting it by 7 (VLENGTH - 1). __ fmovd($dst$$Register, as_FloatRegister($src$$reg)); __ clz($dst$$Register, $dst$$Register); __ movw(rscratch1, 7); @@ -2580,7 +2580,7 @@ instruct vmask_lasttrue16B(iRegINoSp dst, vecX src) %{ __ fmovd($dst$$Register, as_FloatRegister($src$$reg)); __ movw(rscratch1, 8 - 1); - // Count the leading zero bytes and substract it by 15 (VLENGTH - 1). + // Count the leading zero bytes and subtract it by 15 (VLENGTH - 1). __ bind(LAST_TRUE_INDEX); __ clz($dst$$Register, $dst$$Register); __ subw($dst$$Register, rscratch1, $dst$$Register, Assembler::LSR, 3); diff --git a/src/hotspot/cpu/aarch64/abstractInterpreter_aarch64.cpp b/src/hotspot/cpu/aarch64/abstractInterpreter_aarch64.cpp index 2a608df2e84..61630e37b6b 100644 --- a/src/hotspot/cpu/aarch64/abstractInterpreter_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/abstractInterpreter_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -86,7 +86,7 @@ int AbstractInterpreter::size_activation(int max_stack, int overhead = frame::sender_sp_offset - frame::interpreter_frame_initial_sp_offset; // Our locals were accounted for by the caller (or last_frame_adjust - // on the transistion) Since the callee parameters already account + // on the transition) Since the callee parameters already account // for the callee's params we only need to account for the extra // locals. int size = overhead + diff --git a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp index e162465aaf7..94676069d34 100644 --- a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp @@ -36,7 +36,7 @@ #elif defined(_MSC_VER) -// Use MSVC instrinsic: https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=vs-2019#I +// Use MSVC intrinsic: https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=vs-2019#I #define NOP() __nop(); #endif @@ -593,7 +593,7 @@ class Address { } }; -// Convience classes +// Convenience classes class RuntimeAddress: public Address { public: diff --git a/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp index b7e6ccc28d9..5b0952b2604 100644 --- a/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp @@ -433,7 +433,7 @@ int LIR_Assembler::emit_unwind_handler() { __ mov(r19, r0); // Preserve the exception } - // Preform needed unlocking + // Perform needed unlocking MonitorExitStub* stub = NULL; if (method()->is_synchronized()) { monitor_address(0, FrameMap::r0_opr); diff --git a/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp index 342aa87a620..4b9ffaa6866 100644 --- a/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp @@ -692,7 +692,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { } #endif // ASSERT - // get the instance size (size is postive so movl is fine for 64bit) + // get the instance size (size is positive so movl is fine for 64bit) __ ldrw(obj_size, Address(klass, Klass::layout_helper_offset())); __ eden_allocate(obj, obj_size, 0, t1, slow_path); diff --git a/src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp index 53ee3d71bc7..c76f262aabd 100644 --- a/src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -80,7 +80,7 @@ void C2_MacroAssembler::string_indexof(Register str2, Register str1, // if (substr.count == 0) return 0; // We have two strings, a source string in str2, cnt2 and a pattern string - // in str1, cnt1. Find the 1st occurence of pattern in source or return -1. + // in str1, cnt1. Find the 1st occurrence of pattern in source or return -1. // For larger pattern and source we use a simplified Boyer Moore algorithm. // With a small pattern and source we use linear scan. diff --git a/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp index bcabb40e63c..1ca4f13406a 100644 --- a/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp @@ -186,7 +186,7 @@ void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm __ bind(is_null); } -// IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitely +// IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitly // passed in. void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) { assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled"); diff --git a/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp index 6820be15950..c3b5b6c7d60 100644 --- a/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp @@ -237,7 +237,7 @@ void ZBarrierSetAssembler::generate_c1_load_barrier_stub(LIR_Assembler* ce, assert_different_registers(ref, ref_addr, noreg); // Save r0 unless it is the result or tmp register - // Set up SP to accomodate parameters and maybe r0.. + // Set up SP to accommodate parameters and maybe r0.. if (ref != r0 && tmp != r0) { __ sub(sp, sp, 32); __ str(r0, Address(sp, 16)); diff --git a/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.cpp index 6aa6d41fee7..5ee7c2b231c 100644 --- a/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/gc/z/zGlobals_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -154,12 +154,12 @@ static size_t probe_valid_max_address_bit() { for (size_t i = DEFAULT_MAX_ADDRESS_BIT; i > MINIMUM_MAX_ADDRESS_BIT; --i) { const uintptr_t base_addr = ((uintptr_t) 1U) << i; if (msync((void*)base_addr, page_size, MS_ASYNC) == 0) { - // msync suceeded, the address is valid, and maybe even already mapped. + // msync succeeded, the address is valid, and maybe even already mapped. max_address_bit = i; break; } if (errno != ENOMEM) { - // Some error occured. This should never happen, but msync + // Some error occurred. This should never happen, but msync // has some undefined behavior, hence ignore this bit. #ifdef ASSERT fatal("Received '%s' while probing the address space for the highest valid bit", os::errno_name(errno)); diff --git a/src/hotspot/cpu/aarch64/globals_aarch64.hpp b/src/hotspot/cpu/aarch64/globals_aarch64.hpp index 443eb46b720..56fc873267d 100644 --- a/src/hotspot/cpu/aarch64/globals_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/globals_aarch64.hpp @@ -91,7 +91,7 @@ define_pd_global(intx, InlineSmallCode, 1000); product(bool, UseSIMDForArrayEquals, true, \ "Use SIMD instructions in generated array equals code") \ product(bool, UseSimpleArrayEquals, false, \ - "Use simpliest and shortest implementation for array equals") \ + "Use simplest and shortest implementation for array equals") \ product(bool, UseSIMDForBigIntegerShiftIntrinsics, true, \ "Use SIMD instructions for left/right shift of BigInteger") \ product(bool, AvoidUnalignedAccesses, false, \ diff --git a/src/hotspot/cpu/aarch64/immediate_aarch64.cpp b/src/hotspot/cpu/aarch64/immediate_aarch64.cpp index 916494605bc..96e55f500bb 100644 --- a/src/hotspot/cpu/aarch64/immediate_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/immediate_aarch64.cpp @@ -257,7 +257,7 @@ int expandLogicalImmediate(uint32_t immN, uint32_t immr, // constructor to initialise the lookup tables static void initLITables(); -// Use an empty struct with a construtor as MSVC doesn't support `__attribute__ ((constructor))` +// Use an empty struct with a constructor as MSVC doesn't support `__attribute__ ((constructor))` // See https://stackoverflow.com/questions/1113409/attribute-constructor-equivalent-in-vc static struct initLITables_t { initLITables_t(void) { initLITables(); } } _initLITables; static void initLITables() diff --git a/src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp b/src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp index 47449cca6f7..fa0a1c0eded 100644 --- a/src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -523,7 +523,7 @@ void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) { // // Apply stack watermark barrier. // Unlock the receiver if this is a synchronized method. -// Unlock any Java monitors from syncronized blocks. +// Unlock any Java monitors from synchronized blocks. // Remove the activation from the stack. // // If there are locked Java monitors @@ -1748,7 +1748,7 @@ void InterpreterMacroAssembler::profile_return_type(Register mdp, Register ret, // If we don't profile all invoke bytecodes we must make sure // it's a bytecode we indeed profile. We can't go back to the - // begining of the ProfileData we intend to update to check its + // beginning of the ProfileData we intend to update to check its // type because we're right after it and we don't known its // length Label do_profile; diff --git a/src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp b/src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp index f8d0b4adf92..f40eea674b4 100644 --- a/src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -30,7 +30,7 @@ #include "interpreter/invocationCounter.hpp" #include "runtime/frame.hpp" -// This file specializes the assember with interpreter-specific macros +// This file specializes the assembler with interpreter-specific macros typedef ByteSize (*OffsetFunction)(uint); diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp index fdfe079e04f..00b893d3a7d 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp @@ -196,7 +196,7 @@ int MacroAssembler::patch_oop(address insn_addr, address o) { } int MacroAssembler::patch_narrow_klass(address insn_addr, narrowKlass n) { - // Metatdata pointers are either narrow (32 bits) or wide (48 bits). + // Metadata pointers are either narrow (32 bits) or wide (48 bits). // We encode narrow ones by setting the upper 16 bits in the first // instruction. NativeInstruction *insn = nativeInstruction_at(insn_addr); @@ -993,7 +993,7 @@ void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass, // These two are taken from x86, but they look generally useful -// scans count pointer sized words at [addr] for occurence of value, +// scans count pointer sized words at [addr] for occurrence of value, // generic void MacroAssembler::repne_scan(Register addr, Register value, Register count, Register scratch) { @@ -1008,7 +1008,7 @@ void MacroAssembler::repne_scan(Register addr, Register value, Register count, bind(Lexit); } -// scans count 4 byte words at [addr] for occurence of value, +// scans count 4 byte words at [addr] for occurrence of value, // generic void MacroAssembler::repne_scanw(Register addr, Register value, Register count, Register scratch) { @@ -1581,7 +1581,7 @@ void MacroAssembler::atomic_incw(Register counter_addr, Register tmp, Register t // flush and load exclusive from the memory location ldxrw(tmp, counter_addr); addw(tmp, tmp, 1); - // if we store+flush with no intervening write tmp wil be zero + // if we store+flush with no intervening write tmp will be zero stxrw(tmp2, tmp, counter_addr); cbnzw(tmp2, retry_load); } @@ -1889,7 +1889,7 @@ int MacroAssembler::push(unsigned int bitset, Register stack) { bitset >>= 1; } regs[count++] = zr->encoding_nocheck(); - count &= ~1; // Only push an even nuber of regs + count &= ~1; // Only push an even number of regs if (count) { stp(as_Register(regs[0]), as_Register(regs[1]), @@ -2210,7 +2210,7 @@ void MacroAssembler::wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned im } } -// Seperate vsn which sets the flags. Optimisations are more restricted +// Separate vsn which sets the flags. Optimisations are more restricted // because we must set the flags correctly. void MacroAssembler::wrap_adds_subs_imm_insn(Register Rd, Register Rn, unsigned imm, add_sub_imm_insn insn1, @@ -2305,7 +2305,7 @@ void MacroAssembler::cmpxchgptr(Register oldv, Register newv, Register addr, Reg ldaxr(tmp, addr); cmp(tmp, oldv); br(Assembler::NE, nope); - // if we store+flush with no intervening write tmp wil be zero + // if we store+flush with no intervening write tmp will be zero stlxr(tmp, newv, addr); cbzw(tmp, succeed); // retry so we only ever return after a load fails to compare @@ -2348,7 +2348,7 @@ void MacroAssembler::cmpxchgw(Register oldv, Register newv, Register addr, Regis ldaxrw(tmp, addr); cmp(tmp, oldv); br(Assembler::NE, nope); - // if we store+flush with no intervening write tmp wil be zero + // if we store+flush with no intervening write tmp will be zero stlxrw(tmp, newv, addr); cbzw(tmp, succeed); // retry so we only ever return after a load fails to compare @@ -3024,7 +3024,7 @@ void MacroAssembler::multiply_128_x_128_loop(Register y, Register z, } /** - * Code for BigInteger::multiplyToLen() instrinsic. + * Code for BigInteger::multiplyToLen() intrinsic. * * r0: x * r1: xlen @@ -3159,7 +3159,7 @@ void MacroAssembler::multiply_to_len(Register x, Register xlen, Register y, Regi bind(L_done); } -// Code for BigInteger::mulAdd instrinsic +// Code for BigInteger::mulAdd intrinsic // out = r0 // in = r1 // offset = r2 (already out.length-offset) @@ -4835,7 +4835,7 @@ void MacroAssembler::zero_words(Register base, uint64_t cnt) // Zero blocks of memory by using DC ZVA. // -// Aligns the base address first sufficently for DC ZVA, then uses +// Aligns the base address first sufficiently for DC ZVA, then uses // DC ZVA repeatedly for every full block. cnt is the size to be // zeroed in HeapWords. Returns the count of words left to be zeroed // in cnt. @@ -5332,7 +5332,7 @@ void MacroAssembler::protect_return_address() { } } -// Sign the return value in the given register. Use before updating the LR in the exisiting stack +// Sign the return value in the given register. Use before updating the LR in the existing stack // frame for the current function. // Uses the FP from the start of the function as the modifier - which is stored at the address of // the current FP. @@ -5355,7 +5355,7 @@ void MacroAssembler::authenticate_return_address(Register return_reg) { } } -// Authenticate the return value in the given register. Use before updating the LR in the exisiting +// Authenticate the return value in the given register. Use before updating the LR in the existing // stack frame for the current function. // Uses the FP from the start of the function as the modifier - which is stored at the address of // the current FP. diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp index 8f50de6b88d..2fa2ef61f36 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp @@ -476,7 +476,7 @@ public: // Push and pop everything that might be clobbered by a native // runtime call except rscratch1 and rscratch2. (They are always // scratch, so we don't have to protect them.) Only save the lower - // 64 bits of each vector register. Additonal registers can be excluded + // 64 bits of each vector register. Additional registers can be excluded // in a passed RegSet. void push_call_clobbered_registers_except(RegSet exclude); void pop_call_clobbered_registers_except(RegSet exclude); @@ -657,7 +657,7 @@ public: // incrementl/decrementl // for aarch64 the proper convention would be to use - // increment/decrement for 64 bit operatons and + // increment/decrement for 64 bit operations and // incrementw/decrementw for 32 bit operations. so when porting // x86_64 code we can leave calls to increment/decrement as is, // replace incrementq/decrementq with increment/decrement and @@ -1011,12 +1011,12 @@ public: // Various forms of CAS void cmpxchg_obj_header(Register oldv, Register newv, Register obj, Register tmp, - Label &suceed, Label *fail); + Label &succeed, Label *fail); void cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp, - Label &suceed, Label *fail); + Label &succeed, Label *fail); void cmpxchgw(Register oldv, Register newv, Register addr, Register tmp, - Label &suceed, Label *fail); + Label &succeed, Label *fail); void atomic_add(Register prev, RegisterOrConstant incr, Register addr); void atomic_addw(Register prev, RegisterOrConstant incr, Register addr); @@ -1103,11 +1103,11 @@ public: void movoop(Register dst, jobject obj, bool immediate = false); - // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic. + // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic. void kernel_crc32(Register crc, Register buf, Register len, Register table0, Register table1, Register table2, Register table3, Register tmp, Register tmp2, Register tmp3); - // CRC32 code for java.util.zip.CRC32C::updateBytes() instrinsic. + // CRC32 code for java.util.zip.CRC32C::updateBytes() intrinsic. void kernel_crc32c(Register crc, Register buf, Register len, Register table0, Register table1, Register table2, Register table3, Register tmp, Register tmp2, Register tmp3); @@ -1129,7 +1129,7 @@ public: void wrap_add_sub_imm_insn(Register Rd, Register Rn, unsigned imm, add_sub_imm_insn insn1, add_sub_reg_insn insn2); - // Seperate vsn which sets the flags + // Separate vsn which sets the flags void wrap_adds_subs_imm_insn(Register Rd, Register Rn, unsigned imm, add_sub_imm_insn insn1, add_sub_reg_insn insn2); @@ -1233,7 +1233,7 @@ public: address read_polling_page(Register r, relocInfo::relocType rtype); void get_polling_page(Register dest, relocInfo::relocType rtype); - // CRC32 code for java.util.zip.CRC32::updateBytes() instrinsic. + // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic. void update_byte_crc32(Register crc, Register val, Register table); void update_word_crc32(Register crc, Register v, Register tmp, Register table0, Register table1, Register table2, Register table3, diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64_aes.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64_aes.cpp index bf2b8768e11..a4f34c229d4 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64_aes.cpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64_aes.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -359,7 +359,7 @@ public: FloatRegister b, /* non-offsetted (shared) registers */ FloatRegister a, FloatRegister a1_xor_a0, FloatRegister p, FloatRegister vzr, - /* offseted (temp) registers */ + /* offsetted (temp) registers */ FloatRegister tmp1, FloatRegister tmp2, FloatRegister tmp3) : KernelGenerator(as, unrolls), _result_lo(result_lo), _result_hi(result_hi), _b(b), @@ -436,7 +436,7 @@ public: FloatRegister result, FloatRegister lo, FloatRegister hi, /* non-offsetted (shared) registers */ FloatRegister p, FloatRegister vzr, FloatRegister data, - /* offseted (temp) registers */ + /* offsetted (temp) registers */ FloatRegister t1) : KernelGenerator(as, unrolls), _result(result), _lo(lo), _hi(hi), @@ -521,7 +521,7 @@ void MacroAssembler::ghash_processBlocks_wide(address field_polynomial, Register // everything big-endian or reverse the bits in each byte and do // it little-endian. On AArch64 it's more idiomatic to reverse // the bits in each byte (we have an instruction, RBIT, to do - // that) and keep the data in little-endian bit order throught the + // that) and keep the data in little-endian bit order through the // calculation, bit-reversing the inputs and outputs. assert(unrolls * register_stride < 32, "out of registers"); diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64_trig.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64_trig.cpp index 1136b30595c..91226dc78eb 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64_trig.cpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64_trig.cpp @@ -1,4 +1,4 @@ -/* Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. +/* Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2018, Cavium. All rights reserved. (By BELLSOFT) * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -431,7 +431,7 @@ void MacroAssembler::generate__ieee754_rem_pio2(address npio2_hw, // * z = (z-x[i])*2**24 // * // * -// * y[] ouput result in an array of double precision numbers. +// * y[] output result in an array of double precision numbers. // * The dimension of y[] is: // * 24-bit precision 1 // * 53-bit precision 2 @@ -450,7 +450,7 @@ void MacroAssembler::generate__ieee754_rem_pio2(address npio2_hw, // * // * nx dimension of x[] // * -// * prec an interger indicating the precision: +// * prec an integer indicating the precision: // * 0 24 bits (single) // * 1 53 bits (double) // * 2 64 bits (extended) @@ -667,7 +667,7 @@ void MacroAssembler::generate__ieee754_rem_pio2(address npio2_hw, // Changes between fdlibm and intrinsic: // 1. One loop is unrolled and vectorized (see comments in code) // 2. One loop is split into 2 loops (see comments in code) -// 3. Non-double code is removed(last switch). Sevaral variables became +// 3. Non-double code is removed(last switch). Several variables became // constants because of that (see comments in code) // 4. Use of jx, which is nx-1 instead of nx // Assumptions: @@ -999,7 +999,7 @@ void MacroAssembler::generate__kernel_rem_pio2(address two_over_pi, address pio2 block_comment("else block of if(z==0.0) {"); { bind(RECOMP_CHECK_DONE_NOT_ZERO); fmuld(v18, v18, v22); - fcmpd(v18, v24); // v24 is stil two24A + fcmpd(v18, v24); // v24 is still two24A br(LT, Z_IS_LESS_THAN_TWO24B); fmuld(v1, v18, v17); // twon24*z frintzd(v1, v1); // v1 = (double)(int)(v1) @@ -1180,7 +1180,7 @@ void MacroAssembler::generate__kernel_rem_pio2(address two_over_pi, address pio2 // 3. C code parameter "int iy" was modified to "bool iyIsOne", because // iy is always 0 or 1. Also, iyIsOne branch was moved into // generation phase instead of taking it during code execution -// Input ans output: +// Input and output: // 1. Input for generated function: X argument = x // 2. Input for generator: x = register to read argument from, iyIsOne // = flag to use low argument low part or not, dsin_coef = coefficients @@ -1405,7 +1405,7 @@ void MacroAssembler::generate_kernel_cos(FloatRegister x, address dcos_coef) { // Changes between fdlibm and intrinsic: // 1. Moved ix < 2**27 from kernel_sin/kernel_cos into dsin/dcos // 2. Final switch use equivalent bit checks(tbz/tbnz) -// Input ans output: +// Input and output: // 1. Input for generated function: X = r0 // 2. Input for generator: isCos = generate sin or cos, npio2_hw = address // of npio2_hw table, two_over_pi = address of two_over_pi table, diff --git a/src/hotspot/cpu/aarch64/matcher_aarch64.hpp b/src/hotspot/cpu/aarch64/matcher_aarch64.hpp index c2f801f408a..ad522b72d8b 100644 --- a/src/hotspot/cpu/aarch64/matcher_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/matcher_aarch64.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -154,7 +154,7 @@ return UseSVE > 0; } - // true means we have fast l2f convers + // true means we have fast l2f conversion // false means that conversion is done by runtime call static constexpr bool convL2FSupported(void) { return true; diff --git a/src/hotspot/cpu/aarch64/registerMap_aarch64.hpp b/src/hotspot/cpu/aarch64/registerMap_aarch64.hpp index 1f84b4d2d3e..f7d70e70342 100644 --- a/src/hotspot/cpu/aarch64/registerMap_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/registerMap_aarch64.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -26,7 +26,7 @@ #ifndef CPU_AARCH64_REGISTERMAP_AARCH64_HPP #define CPU_AARCH64_REGISTERMAP_AARCH64_HPP -// machine-dependent implemention for register maps +// machine-dependent implementation for register maps friend class frame; private: diff --git a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp index 18c6d227823..35710f020dc 100644 --- a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp @@ -762,7 +762,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm // require some stack space. We grow the current (compiled) stack, then repack // the args. We finally end in a jump to the generic interpreter entry point. // On exit from the interpreter, the interpreter will restore our SP (lest the - // compiled code, which relys solely on SP and not FP, get sick). + // compiled code, which relies solely on SP and not FP, get sick). { __ block_comment("c2i_unverified_entry {"); @@ -2628,7 +2628,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t bool cause_return = (poll_type == POLL_AT_RETURN); RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */); - // When the signal occured, the LR was either signed and stored on the stack (in which + // When the signal occurred, the LR was either signed and stored on the stack (in which // case it will be restored from the stack before being used) or unsigned and not stored // on the stack. Stipping ensures we get the right value. __ strip_return_address(); @@ -2638,7 +2638,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t // The following is basically a call_VM. However, we need the precise // address of the call in order to generate an oopmap. Hence, we do all the - // work outselves. + // work ourselves. Label retaddr; __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); diff --git a/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp b/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp index 8f2d9ecf343..1ac852c92c0 100644 --- a/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp @@ -453,7 +453,7 @@ class StubGenerator: public StubCodeGenerator { // NOTE: At entry of this stub, exception-pc must be in LR !! // NOTE: this is always used as a jump target within generated code - // so it just needs to be generated code wiht no x86 prolog + // so it just needs to be generated code with no x86 prolog address generate_forward_exception() { StubCodeMark mark(this, "StubRoutines", "forward exception"); @@ -859,7 +859,7 @@ class StubGenerator: public StubCodeGenerator { // or -1. // // when forward copying we need to store 1 word, 3 pairs and - // then 1 word at offsets {0, 1, 3, 5, 7}. Rather thna use a + // then 1 word at offsets {0, 1, 3, 5, 7}. Rather than use a // zero offset We adjust the destination by -1 which means we // have to use offsets { 1, 2, 4, 6, 8} * unit for the stores. // @@ -985,13 +985,13 @@ class StubGenerator: public StubCodeGenerator { } // now we need to copy any remaining part block which may // include a 4 word block subblock and/or a 2 word subblock. - // bits 2 and 1 in the count are the tell-tale for whetehr we + // bits 2 and 1 in the count are the tell-tale for whether we // have each such subblock { Label L1, L2; __ tbz(count, exact_log2(4), L1); // this is the same as above but copying only 4 longs hence - // with ony one intervening stp between the str instructions + // with only one intervening stp between the str instructions // but note that the offsets and registers still follow the // same pattern __ ldp(t0, t1, Address(s, 2 * unit)); @@ -3994,7 +3994,7 @@ class StubGenerator: public StubCodeGenerator { * c_rarg1 - byte* buf * c_rarg2 - int length * - * Ouput: + * Output: * rax - int crc result */ address generate_updateBytesCRC32() { @@ -4035,7 +4035,7 @@ class StubGenerator: public StubCodeGenerator { * c_rarg2 - int length * c_rarg3 - int* table * - * Ouput: + * Output: * r0 - int crc result */ address generate_updateBytesCRC32C() { @@ -4296,7 +4296,7 @@ class StubGenerator: public StubCodeGenerator { * c_rarg0 - x address * c_rarg1 - x length * c_rarg2 - y address - * c_rarg3 - y lenth + * c_rarg3 - y length * c_rarg4 - z address * c_rarg5 - z length */ @@ -5695,7 +5695,7 @@ class StubGenerator: public StubCodeGenerator { // everything big-endian or reverse the bits in each byte and do // it little-endian. On AArch64 it's more idiomatic to reverse // the bits in each byte (we have an instruction, RBIT, to do - // that) and keep the data in little-endian bit order throught the + // that) and keep the data in little-endian bit order through the // calculation, bit-reversing the inputs and outputs. StubCodeMark mark(this, "StubRoutines", "ghash_processBlocks"); @@ -5883,7 +5883,7 @@ class StubGenerator: public StubCodeGenerator { Register send = c_rarg2; // source end offset Register dst = c_rarg3; // dest array Register doff = c_rarg4; // position for writing to dest array - Register isURL = c_rarg5; // Base64 or URL chracter set + Register isURL = c_rarg5; // Base64 or URL character set // c_rarg6 and c_rarg7 are free to use as temps Register codec = c_rarg6; @@ -5969,7 +5969,7 @@ class StubGenerator: public StubCodeGenerator { __ ld4(in0, in1, in2, in3, arrangement, __ post(src, 4 * size)); - // we need unsigned saturating substract, to make sure all input values + // we need unsigned saturating subtract, to make sure all input values // in range [0, 63] will have 0U value in the higher half lookup __ uqsubv(decH0, __ T16B, in0, v27); __ uqsubv(decH1, __ T16B, in1, v27); @@ -6073,7 +6073,7 @@ class StubGenerator: public StubCodeGenerator { // titled "Base64 decoding". // Non-SIMD lookup tables are mostly dumped from fromBase64 array used in java.util.Base64, - // except the trailing character '=' is also treated illegal value in this instrinsic. That + // except the trailing character '=' is also treated illegal value in this intrinsic. That // is java.util.Base64.fromBase64['='] = -2, while fromBase(URL)64ForNoSIMD['='] = 255 here. static const uint8_t fromBase64ForNoSIMD[256] = { 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, 255u, diff --git a/src/hotspot/cpu/aarch64/stubRoutines_aarch64.cpp b/src/hotspot/cpu/aarch64/stubRoutines_aarch64.cpp index 2e1c4b69542..76b2f28cbc6 100644 --- a/src/hotspot/cpu/aarch64/stubRoutines_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/stubRoutines_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -300,7 +300,7 @@ ATTRIBUTE_ALIGNED(64) jubyte StubRoutines::aarch64::_adler_table[] = { ATTRIBUTE_ALIGNED(64) juint StubRoutines::aarch64::_npio2_hw[] = { // first, various coefficient values: 0.5, invpio2, pio2_1, pio2_1t, pio2_2, // pio2_2t, pio2_3, pio2_3t - // This is a small optimization wich keeping double[8] values in int[] table + // This is a small optimization which keeping double[8] values in int[] table // to have less address calculation instructions // // invpio2: 53 bits of 2/pi (enough for cases when trigonometric argument is small) diff --git a/src/hotspot/cpu/aarch64/templateTable_aarch64.cpp b/src/hotspot/cpu/aarch64/templateTable_aarch64.cpp index 39e99bdd5ed..981296b5fc2 100644 --- a/src/hotspot/cpu/aarch64/templateTable_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/templateTable_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -137,7 +137,7 @@ static Assembler::Condition j_not(TemplateTable::Condition cc) { } -// Miscelaneous helper routines +// Miscellaneous helper routines // Store an oop (or NULL) at the Address described by obj. // If val == noreg this means store a NULL static void do_oop_store(InterpreterMacroAssembler* _masm, @@ -2230,7 +2230,7 @@ void TemplateTable::_return(TosState state) // // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. ALSO reads & -// writes act as aquire & release, so: +// writes act as acquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that // happen after the read float up to before the read. It's OK for // non-volatile memory refs that happen before the volatile read to @@ -3854,7 +3854,7 @@ void TemplateTable::monitorenter() // Increment bcp to point to the next bytecode, so exception // handling for async. exceptions work correctly. - // The object has already been poped from the stack, so the + // The object has already been popped from the stack, so the // expression stack looks correct. __ increment(rbcp); diff --git a/src/hotspot/cpu/arm/abstractInterpreter_arm.cpp b/src/hotspot/cpu/arm/abstractInterpreter_arm.cpp index 120a0414f76..53e557fad86 100644 --- a/src/hotspot/cpu/arm/abstractInterpreter_arm.cpp +++ b/src/hotspot/cpu/arm/abstractInterpreter_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -86,7 +86,7 @@ int AbstractInterpreter::size_activation(int max_stack, // fixed size of an interpreter frame: int overhead = frame::sender_sp_offset - frame::interpreter_frame_initial_sp_offset; - // Our locals were accounted for by the caller (or last_frame_adjust on the transistion) + // Our locals were accounted for by the caller (or last_frame_adjust on the transition) // Since the callee parameters already account for the callee's params we only need to account for // the extra locals. diff --git a/src/hotspot/cpu/arm/arm.ad b/src/hotspot/cpu/arm/arm.ad index f2ac7b58e73..a801ff1217c 100644 --- a/src/hotspot/cpu/arm/arm.ad +++ b/src/hotspot/cpu/arm/arm.ad @@ -1569,10 +1569,10 @@ encode %{ // Region 6-7 is determined per call site. // Note 2: If the calling convention leaves holes in the incoming argument // area, those holes are owned by SELF. Holes in the outgoing area -// are owned by the CALLEE. Holes should not be nessecary in the +// are owned by the CALLEE. Holes should not be necessary in the // incoming area, as the Java calling convention is completely under // the control of the AD file. Doubles can be sorted and packed to -// avoid holes. Holes in the outgoing arguments may be nessecary for +// avoid holes. Holes in the outgoing arguments may be necessary for // varargs C calling conventions. // Note 3: Region 0-3 is even aligned, with pad2 as needed. Region 3-5 is // even aligned with pad0 as needed. @@ -2776,7 +2776,7 @@ pipe_class ialu_reg_reg_2_dep(iRegL dst, iRegL src1, iRegL src2, flagsReg cr) %{ IALU : R(2); %} -// Integer ALU reg-imm operaion +// Integer ALU reg-imm operation pipe_class ialu_reg_imm(iRegI dst, iRegI src1) %{ single_instruction; dst : E(write); @@ -9063,7 +9063,7 @@ instruct CallLeafDirect(method meth) %{ effect(USE meth); ins_cost(CALL_COST); format %{ "CALL,runtime leaf" %} - // TODO: ned save_last_PC here? + // TODO: need save_last_PC here? ins_encode( Java_To_Runtime( meth ), call_epilog ); ins_pipe(simple_call); @@ -9075,7 +9075,7 @@ instruct CallLeafNoFPDirect(method meth) %{ effect(USE meth); ins_cost(CALL_COST); format %{ "CALL,runtime leaf nofp" %} - // TODO: ned save_last_PC here? + // TODO: need save_last_PC here? ins_encode( Java_To_Runtime( meth ), call_epilog ); ins_pipe(simple_call); @@ -11798,7 +11798,7 @@ instruct vxorX(vecX dst, vecX src1, vecX src2) %{ // // // Change (inc mov) to lea // peephole %{ -// // increment preceeded by register-register move +// // increment preceded by register-register move // peepmatch ( incI_eReg movI ); // // require that the destination register of the increment // // match the destination register of the move diff --git a/src/hotspot/cpu/arm/arm_32.ad b/src/hotspot/cpu/arm/arm_32.ad index 6bd28f8f960..e8ec725414c 100644 --- a/src/hotspot/cpu/arm/arm_32.ad +++ b/src/hotspot/cpu/arm/arm_32.ad @@ -1,5 +1,5 @@ // -// Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This code is free software; you can redistribute it and/or modify it @@ -26,7 +26,7 @@ //----------REGISTER DEFINITION BLOCK------------------------------------------ // This information is used by the matcher and the register allocator to // describe individual registers and classes of registers within the target -// archtecture. +// architecture. register %{ //----------Architecture Description Register Definitions---------------------- // General Registers diff --git a/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp b/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp index b92167fb6a0..4e32679b4bc 100644 --- a/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp +++ b/src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp @@ -242,7 +242,7 @@ int LIR_Assembler::emit_unwind_handler() { __ bind(_unwind_handler_entry); __ verify_not_null_oop(Rexception_obj); - // Preform needed unlocking + // Perform needed unlocking MonitorExitStub* stub = NULL; if (method()->is_synchronized()) { monitor_address(0, FrameMap::R0_opr); @@ -641,7 +641,7 @@ void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) { case T_ARRAY: case T_ADDRESS: case T_METADATA: __ ldr(dest->as_register(), addr); break; - case T_FLOAT: // used in floatToRawIntBits intrinsic implemenation + case T_FLOAT: // used in floatToRawIntBits intrinsic implementation case T_INT: __ ldr_u32(dest->as_register(), addr); break; default: ShouldNotReachHere(); diff --git a/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp b/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp index 1bf3ce5c23d..bc96d18e60f 100644 --- a/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp +++ b/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -189,7 +189,7 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr const Register tmp2 = Rtemp; // Rtemp should be free at c1 LIR level assert_different_registers(hdr, obj, disp_hdr, tmp2); - assert(BasicObjectLock::lock_offset_in_bytes() == 0, "ajust this code"); + assert(BasicObjectLock::lock_offset_in_bytes() == 0, "adjust this code"); const int obj_offset = BasicObjectLock::obj_offset_in_bytes(); const int mark_offset = BasicLock::displaced_header_offset_in_bytes(); @@ -247,7 +247,7 @@ void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_ assert_different_registers(hdr, obj, disp_hdr, Rtemp); Register tmp2 = Rtemp; - assert(BasicObjectLock::lock_offset_in_bytes() == 0, "ajust this code"); + assert(BasicObjectLock::lock_offset_in_bytes() == 0, "adjust this code"); const int obj_offset = BasicObjectLock::obj_offset_in_bytes(); const int mark_offset = BasicLock::displaced_header_offset_in_bytes(); diff --git a/src/hotspot/cpu/arm/c1_Runtime1_arm.cpp b/src/hotspot/cpu/arm/c1_Runtime1_arm.cpp index 0e6eec195ed..f4f3490e555 100644 --- a/src/hotspot/cpu/arm/c1_Runtime1_arm.cpp +++ b/src/hotspot/cpu/arm/c1_Runtime1_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -336,7 +336,7 @@ OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) { // Note: the restore live registers includes the jump to LR (patched to R0) break; case handle_exception_from_callee_id: - restore_live_registers_without_return(sasm); // must not jump immediatly to handler + restore_live_registers_without_return(sasm); // must not jump immediately to handler restore_sp_for_method_handle(sasm); __ ret(); break; diff --git a/src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp b/src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp index 07d22a1fce9..e1fdf0279c6 100644 --- a/src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp +++ b/src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -57,7 +57,7 @@ void C2_MacroAssembler::char_arrays_equals(Register ary1, Register ary2, mov(result, 1, eq); b(Ldone, eq); - // word by word compare, dont't need alignment check + // word by word compare, don't need alignment check bind(Lvector); // Shift ary1 and ary2 to the end of the arrays, negate limit diff --git a/src/hotspot/cpu/arm/compiledIC_arm.cpp b/src/hotspot/cpu/arm/compiledIC_arm.cpp index f0272db02ff..386defba499 100644 --- a/src/hotspot/cpu/arm/compiledIC_arm.cpp +++ b/src/hotspot/cpu/arm/compiledIC_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -96,7 +96,7 @@ int CompiledStaticCall::to_trampoline_stub_size() { return 0; } -// size of C2 call stub, compiled java to interpretor +// size of C2 call stub, compiled java to interpreter int CompiledStaticCall::to_interp_stub_size() { return 8 * NativeInstruction::instruction_size; } diff --git a/src/hotspot/cpu/arm/interp_masm_arm.cpp b/src/hotspot/cpu/arm/interp_masm_arm.cpp index 2562f51f6fe..f5bc1396a51 100644 --- a/src/hotspot/cpu/arm/interp_masm_arm.cpp +++ b/src/hotspot/cpu/arm/interp_masm_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -682,7 +682,7 @@ void InterpreterMacroAssembler::narrow(Register result) { // remove activation // // Unlock the receiver if this is a synchronized method. -// Unlock any Java monitors from syncronized blocks. +// Unlock any Java monitors from synchronized blocks. // Remove the activation from the stack. // // If there are locked Java monitors diff --git a/src/hotspot/cpu/arm/interp_masm_arm.hpp b/src/hotspot/cpu/arm/interp_masm_arm.hpp index 7361d289cfe..54710cd24c6 100644 --- a/src/hotspot/cpu/arm/interp_masm_arm.hpp +++ b/src/hotspot/cpu/arm/interp_masm_arm.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -31,7 +31,7 @@ #include "runtime/frame.hpp" #include "prims/jvmtiExport.hpp" -// This file specializes the assember with interpreter-specific macros +// This file specializes the assembler with interpreter-specific macros class InterpreterMacroAssembler: public MacroAssembler { diff --git a/src/hotspot/cpu/arm/macroAssembler_arm.cpp b/src/hotspot/cpu/arm/macroAssembler_arm.cpp index 12dfc1adf0d..2c418c33eae 100644 --- a/src/hotspot/cpu/arm/macroAssembler_arm.cpp +++ b/src/hotspot/cpu/arm/macroAssembler_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1144,7 +1144,7 @@ FixedSizeCodeBlock::~FixedSizeCodeBlock() { // Serializes memory. Potentially blows flags and reg. -// tmp is a scratch for v6 co-processor write op (could be noreg for other architecure versions) +// tmp is a scratch for v6 co-processor write op (could be noreg for other architecture versions) // preserve_flags takes a longer path in LoadStore case (dmb rather then control dependency) to preserve status flags. Optional. // load_tgt is an ordered load target in a LoadStore case only, to create dependency between the load operation and conditional branch. Optional. void MacroAssembler::membar(Membar_mask_bits order_constraint, @@ -1254,7 +1254,7 @@ void MacroAssembler::cas_for_lock_release(Register oldval, Register newval, #ifndef PRODUCT // Preserves flags and all registers. -// On SMP the updated value might not be visible to external observers without a sychronization barrier +// On SMP the updated value might not be visible to external observers without a synchronization barrier void MacroAssembler::cond_atomic_inc32(AsmCondition cond, int* counter_addr) { if (counter_addr != NULL) { InlinedAddress counter_addr_literal((address)counter_addr); diff --git a/src/hotspot/cpu/arm/macroAssembler_arm.hpp b/src/hotspot/cpu/arm/macroAssembler_arm.hpp index b07782332db..8ddcc399f16 100644 --- a/src/hotspot/cpu/arm/macroAssembler_arm.hpp +++ b/src/hotspot/cpu/arm/macroAssembler_arm.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -998,7 +998,7 @@ public: #ifndef PRODUCT // Preserves flags and all registers. - // On SMP the updated value might not be visible to external observers without a sychronization barrier + // On SMP the updated value might not be visible to external observers without a synchronization barrier void cond_atomic_inc32(AsmCondition cond, int* counter_addr); #endif // !PRODUCT diff --git a/src/hotspot/cpu/arm/matcher_arm.hpp b/src/hotspot/cpu/arm/matcher_arm.hpp index 496ea27c086..7ea3292a0f2 100644 --- a/src/hotspot/cpu/arm/matcher_arm.hpp +++ b/src/hotspot/cpu/arm/matcher_arm.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -146,7 +146,7 @@ return false; } - // true means we have fast l2f convers + // true means we have fast l2f conversion // false means that conversion is done by runtime call static constexpr bool convL2FSupported(void) { return false; diff --git a/src/hotspot/cpu/arm/registerMap_arm.hpp b/src/hotspot/cpu/arm/registerMap_arm.hpp index 9f7631244b3..cf81f8d0e1f 100644 --- a/src/hotspot/cpu/arm/registerMap_arm.hpp +++ b/src/hotspot/cpu/arm/registerMap_arm.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -25,7 +25,7 @@ #ifndef CPU_ARM_REGISTERMAP_ARM_HPP #define CPU_ARM_REGISTERMAP_ARM_HPP -// machine-dependent implemention for register maps +// machine-dependent implementation for register maps friend class frame; private: diff --git a/src/hotspot/cpu/arm/sharedRuntime_arm.cpp b/src/hotspot/cpu/arm/sharedRuntime_arm.cpp index d9bb8ab9cc4..b63838ddf02 100644 --- a/src/hotspot/cpu/arm/sharedRuntime_arm.cpp +++ b/src/hotspot/cpu/arm/sharedRuntime_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -102,11 +102,11 @@ public: }; // all regs but Rthread (R10), FP (R7 or R11), SP and PC - // (altFP_7_11 is the one amoung R7 and R11 which is not FP) + // (altFP_7_11 is the one among R7 and R11 which is not FP) #define SAVED_BASE_REGS (RegisterSet(R0, R6) | RegisterSet(R8, R9) | RegisterSet(R12) | R14 | altFP_7_11) - // When LR may be live in the nmethod from which we are comming + // When LR may be live in the nmethod from which we are coming // then lr_saved is true, the return address is saved before the // call to save_live_register by the caller and LR contains the // live value. diff --git a/src/hotspot/cpu/arm/stubGenerator_arm.cpp b/src/hotspot/cpu/arm/stubGenerator_arm.cpp index 60cc825cb25..a0b4bf620b6 100644 --- a/src/hotspot/cpu/arm/stubGenerator_arm.cpp +++ b/src/hotspot/cpu/arm/stubGenerator_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -138,7 +138,7 @@ static arraycopy_platform_config arraycopy_configurations[] = { // - prefetch after gives 40% gain on backward copies on tegra2-4, // resulting in better number than the operating system // copy. However, this can lead to a 300% loss on nv-tegra and has - // more impact on the cache (fetches futher than what is + // more impact on the cache (fetches further than what is // copied). Use this configuration with care, in case it improves // reference benchmarks. {-256, true, true }, // forward aligned @@ -1773,7 +1773,7 @@ class StubGenerator: public StubCodeGenerator { } } - // Aligns 'to' by reading one word from 'from' and writting its part to 'to'. + // Aligns 'to' by reading one word from 'from' and writing its part to 'to'. // // Arguments: // to: beginning (if forward) or upper bound (if !forward) of the region to be written diff --git a/src/hotspot/cpu/arm/stubRoutinesCrypto_arm.cpp b/src/hotspot/cpu/arm/stubRoutinesCrypto_arm.cpp index b4e58e81944..350636fbe93 100644 --- a/src/hotspot/cpu/arm/stubRoutinesCrypto_arm.cpp +++ b/src/hotspot/cpu/arm/stubRoutinesCrypto_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -33,8 +33,8 @@ // Only the first table reference is passed to AES methods below. The other 3 tables // in ecryption and decryption are calculated in runtime by rotating the T1 result accordingly. // It is a free operation on ARM with embedded register-shifted-register EOR capability. -// The table reference is passed in a form of a last argument on the parametes list. -// The tables lookup method proves to perform better then a runtime Galois Field caclulation, +// The table reference is passed in a form of a last argument on the parameters list. +// The tables lookup method proves to perform better than a runtime Galois Field calculation, // due to a lack of HW acceleration for the later. unsigned char * SBox; @@ -372,7 +372,7 @@ address generate_aescrypt_decryptBlock() { Label round; __ bind(round); - // each sub-block is treated similary: + // each sub-block is treated similarly: // combine SubBytes|ShiftRows|MixColumn through a precalculated set of tables // Utilize a Transposition Box lookup along with subsequent shift and EOR with a round key. @@ -592,7 +592,7 @@ address generate_cipherBlockChaining_encryptAESCrypt() { // The CBC decryption could benefit from parallel processing as the blocks could be -// decrypted separatly from each other. +// decrypted separately from each other. // NEON is utilized (if available) to perform parallel execution on 8 blocks at a time. // Since Transposition Box (tbox) is used the parallel execution will only apply to an // Initial Round and the last round. It's not practical to use NEON for a table lookup @@ -642,7 +642,7 @@ address generate_cipherBlockChaining_decryptAESCrypt() { // near call is sufficient as the method is part of the StubGenerator __ bl((address)StubRoutines::_aescrypt_decryptBlock); - // check remainig cipher size (for individual block processing) + // check remaining cipher size (for individual block processing) __ subs(R4, R4, 16); if (VM_Version::has_simd()) { __ tst(R4, 0x7f); @@ -756,7 +756,7 @@ address generate_cipherBlockChaining_decryptAESCrypt() { // Local frame map: - // sp+20 - ouput buffer pointer + // sp+20 - output buffer pointer // sp+28 - key pointer // sp+32 - original source // sp+36 - block counter diff --git a/src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp b/src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp index fa8d9e7fb58..f95ea39d3b2 100644 --- a/src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp +++ b/src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -929,7 +929,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) { __ sub(SP, SP, AsmOperand(Rsize_of_params, lsl, LogBytesPerLong)); #ifdef __ABI_HARD__ - // Allocate more stack space to accomodate all GP as well as FP registers: + // Allocate more stack space to accommodate all GP as well as FP registers: // 4 * wordSize // 8 * BytesPerLong int reg_arguments = align_up((4*wordSize) + (8*BytesPerLong), StackAlignmentInBytes); @@ -1456,7 +1456,7 @@ void TemplateInterpreterGenerator::generate_throw_exception() { // restore exception __ get_vm_result(Rexception_obj, Rtemp); - // Inbetween activations - previous activation type unknown yet + // In between activations - previous activation type unknown yet // compute continuation point - the continuation point expects // the following registers set up: // diff --git a/src/hotspot/cpu/arm/templateTable_arm.cpp b/src/hotspot/cpu/arm/templateTable_arm.cpp index 125a82181d9..1c46ec1e93d 100644 --- a/src/hotspot/cpu/arm/templateTable_arm.cpp +++ b/src/hotspot/cpu/arm/templateTable_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -164,7 +164,7 @@ AsmCondition convNegCond(TemplateTable::Condition cc) { } //---------------------------------------------------------------------------------------------------- -// Miscelaneous helper routines +// Miscellaneous helper routines // Store an oop (or NULL) at the address described by obj. // Blows all volatile registers R0-R3, Rtemp, LR). @@ -2041,7 +2041,7 @@ void TemplateTable::branch(bool is_jsr, bool is_wide) { // Handle all the JSR stuff here, then exit. // It's much shorter and cleaner than intermingling with the - // non-JSR normal-branch stuff occuring below. + // non-JSR normal-branch stuff occurring below. if (is_jsr) { // compute return address as bci in R1 const Register Rret_addr = R1_tmp; @@ -2525,7 +2525,7 @@ void TemplateTable::_return(TosState state) { // // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. -// ALSO reads & writes act as aquire & release, so: +// ALSO reads & writes act as acquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that happen after // the read float up to before the read. It's OK for non-volatile memory refs // that happen before the volatile read to float down below it. @@ -4330,7 +4330,7 @@ void TemplateTable::monitorenter() { __ bind(allocated); // Increment bcp to point to the next bytecode, so exception handling for async. exceptions work correctly. - // The object has already been poped from the stack, so the expression stack looks correct. + // The object has already been popped from the stack, so the expression stack looks correct. __ add(Rbcp, Rbcp, 1); __ str(Robj, Address(Rentry, BasicObjectLock::obj_offset_in_bytes())); // store object diff --git a/src/hotspot/cpu/ppc/assembler_ppc.cpp b/src/hotspot/cpu/ppc/assembler_ppc.cpp index ff6788f6241..ff98e2e51d7 100644 --- a/src/hotspot/cpu/ppc/assembler_ppc.cpp +++ b/src/hotspot/cpu/ppc/assembler_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2015 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -343,7 +343,7 @@ void Assembler::load_const(Register d, long x, Register tmp) { } } -// Load a 64 bit constant, optimized, not identifyable. +// Load a 64 bit constant, optimized, not identifiable. // Tmp can be used to increase ILP. Set return_simm16_rest=true to get a // 16 bit immediate offset. int Assembler::load_const_optimized(Register d, long x, Register tmp, bool return_simm16_rest) { diff --git a/src/hotspot/cpu/ppc/assembler_ppc.hpp b/src/hotspot/cpu/ppc/assembler_ppc.hpp index 2f4287a9553..616b3fba3b5 100644 --- a/src/hotspot/cpu/ppc/assembler_ppc.hpp +++ b/src/hotspot/cpu/ppc/assembler_ppc.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -1585,7 +1585,7 @@ class Assembler : public AbstractAssembler { inline void xoris( Register a, Register s, int ui16); inline void andr( Register a, Register s, Register b); // suffixed by 'r' as 'and' is C++ keyword inline void and_( Register a, Register s, Register b); - // Turn or0(rx,rx,rx) into a nop and avoid that we accidently emit a + // Turn or0(rx,rx,rx) into a nop and avoid that we accidentally emit a // SMT-priority change instruction (see SMT instructions below). inline void or_unchecked(Register a, Register s, Register b); inline void orr( Register a, Register s, Register b); // suffixed by 'r' as 'or' is C++ keyword @@ -2531,7 +2531,7 @@ class Assembler : public AbstractAssembler { inline void lvsl( VectorRegister d, Register s2); inline void lvsr( VectorRegister d, Register s2); - // Endianess specific concatenation of 2 loaded vectors. + // Endianness specific concatenation of 2 loaded vectors. inline void load_perm(VectorRegister perm, Register addr); inline void vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm); inline void vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm); @@ -2570,7 +2570,7 @@ class Assembler : public AbstractAssembler { inline void load_const(Register d, AddressLiteral& a, Register tmp = noreg); inline void load_const32(Register d, int i); // load signed int (patchable) - // Load a 64 bit constant, optimized, not identifyable. + // Load a 64 bit constant, optimized, not identifiable. // Tmp can be used to increase ILP. Set return_simm16_rest = true to get a // 16 bit immediate offset. This is useful if the offset can be encoded in // a succeeding instruction. diff --git a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp index 16da2d374c9..022b90b0e6b 100644 --- a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp +++ b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp @@ -3097,7 +3097,7 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) { } else { __ cmpdi(CCR0, obj, 0); __ bne(CCR0, Lupdate); - __ stop("unexpect null obj"); + __ stop("unexpected null obj"); #endif } diff --git a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp index 1cb40d63fdd..e4de2eb5c46 100644 --- a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp +++ b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2015 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -31,7 +31,7 @@ ////////////////////////////////////////////////////////////////////////////// // PPC64 load/store emission // - // The PPC ld/st instructions cannot accomodate displacements > 16 bits long. + // The PPC ld/st instructions cannot accommodate displacements > 16 bits long. // The following "pseudo" instructions (load/store) make it easier to // use the indexed addressing mode by allowing 32 bit displacements: // diff --git a/src/hotspot/cpu/ppc/gc/z/zBarrierSetAssembler_ppc.cpp b/src/hotspot/cpu/ppc/gc/z/zBarrierSetAssembler_ppc.cpp index 26c3bf371f3..798fd5dbf2a 100644 --- a/src/hotspot/cpu/ppc/gc/z/zBarrierSetAssembler_ppc.cpp +++ b/src/hotspot/cpu/ppc/gc/z/zBarrierSetAssembler_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -270,7 +270,7 @@ void ZBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, R assert_different_registers(jni_env, obj, tmp); - // Resolve the pointer using the standard implementation for weak tag handling and pointer verfication. + // Resolve the pointer using the standard implementation for weak tag handling and pointer verification. BarrierSetAssembler::try_resolve_jobject_in_native(masm, dst, jni_env, obj, tmp, slowpath); // Check whether pointer is dirty. @@ -526,7 +526,7 @@ class ZSetupArguments { __ mr_if_needed(R3_ARG1, _ref); } else if (_ref_addr.base() != R3_ARG1) { __ mr(R3_ARG1, _ref); - __ add(R4_ARG2, (intptr_t) _ref_addr.disp(), _ref_addr.base()); // Cloberring _ref + __ add(R4_ARG2, (intptr_t) _ref_addr.disp(), _ref_addr.base()); // Clobbering _ref } else { // Arguments are provided in inverse order (i.e. _ref == R4_ARG2, _ref_addr == R3_ARG1) __ mr(R0, _ref); diff --git a/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.cpp b/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.cpp index 93c2f9b4dc4..1e6c2040490 100644 --- a/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.cpp +++ b/src/hotspot/cpu/ppc/gc/z/zGlobals_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -42,7 +42,7 @@ // addressable heap address space are adjusted accordingly. // // The following memory schema shows an exemplary layout in which bit '45' is the highest addressable bit. -// It is assumed that this virtual memroy address space layout is predominant on the power platform. +// It is assumed that this virtual memory address space layout is predominant on the power platform. // // Standard Address Space & Pointer Layout // --------------------------------------- diff --git a/src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp b/src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp index bda15e426ae..46476dbb79c 100644 --- a/src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp +++ b/src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -1838,7 +1838,7 @@ void InterpreterMacroAssembler::profile_return_type(Register ret, Register tmp1, if (MethodData::profile_return_jsr292_only()) { // If we don't profile all invoke bytecodes we must make sure // it's a bytecode we indeed profile. We can't go back to the - // begining of the ProfileData we intend to update to check its + // beginning of the ProfileData we intend to update to check its // type because we're right after it and we don't known its // length. lbz(tmp1, 0, R14_bcp); diff --git a/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp b/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp index d8397ed6fa5..1918c7c56fb 100644 --- a/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp +++ b/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp @@ -1460,7 +1460,7 @@ void MacroAssembler::atomic_get_and_modify_generic(Register dest_current_value, modval = tmp1; shift_amount = tmp2; val32 = tmp3; - // Need some preperation: Compute shift amount, align address. Note: shorts must be 2 byte aligned. + // Need some preparation: Compute shift amount, align address. Note: shorts must be 2 byte aligned. #ifdef VM_LITTLE_ENDIAN rldic(shift_amount, addr_base, 3, 64-5); // (dest & 3) * 8; clrrdi(addr_base, addr_base, 2); @@ -1537,7 +1537,7 @@ void MacroAssembler::cmpxchg_loop_body(ConditionRegister flag, Register dest_cur shift_amount = tmp1; val32 = tmp2; modval = tmp2; - // Need some preperation: Compute shift amount, align address. Note: shorts must be 2 byte aligned. + // Need some preparation: Compute shift amount, align address. Note: shorts must be 2 byte aligned. #ifdef VM_LITTLE_ENDIAN rldic(shift_amount, addr_base, 3, 64-5); // (dest & 3) * 8; clrrdi(addr_base, addr_base, 2); @@ -1669,7 +1669,7 @@ void MacroAssembler::cmpxchg_generic(ConditionRegister flag, Register dest_curre // (flag == eq) => (dest_current_value == compare_value), ( swapped) } -// Preforms atomic compare exchange: +// Performs atomic compare exchange: // if (compare_value == *addr_base) // *addr_base = exchange_value // int_flag_success = 1; @@ -2275,7 +2275,7 @@ void MacroAssembler::rtm_counters_update(Register abort_status, Register rtm_cou if (failure_bit[nbit] == tm_transaction_level) { // Don't check outer transaction, TL = 1 (bit 63). Hence only // 11 bits in the TL field are checked to find out if failure - // occured in a nested transaction. This check also matches + // occurred in a nested transaction. This check also matches // the case when nesting_of = 1 (nesting overflow). rldicr_(temp_Reg, abort_status_R0, failure_bit[nbit], 10); } else if (failure_bit[nbit] == tm_failure_code) { @@ -2414,7 +2414,7 @@ void MacroAssembler::rtm_retry_lock_on_abort(Register retry_count_Reg, Register // transactional state, like for instance trying to write the TFHAR after a // transaction is started; or when there is (B) a Nesting Overflow (too many // nested transactions); or when (C) the Footprint overflows (too many - // addressess touched in TM state so there is no more space in the footprint + // addresses touched in TM state so there is no more space in the footprint // area to track them); or in case of (D) a Self-Induced Conflict, i.e. a // store is performed to a given address in TM state, then once in suspended // state the same address is accessed. Failure (A) is very unlikely to occur diff --git a/src/hotspot/cpu/ppc/macroAssembler_ppc.hpp b/src/hotspot/cpu/ppc/macroAssembler_ppc.hpp index 5c53beede16..c9b455377d7 100644 --- a/src/hotspot/cpu/ppc/macroAssembler_ppc.hpp +++ b/src/hotspot/cpu/ppc/macroAssembler_ppc.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -908,7 +908,7 @@ class MacroAssembler: public Assembler { void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line) {} // Convenience method returning function entry. For the ELFv1 case - // creates function descriptor at the current address and returs + // creates function descriptor at the current address and returns // the pointer to it. For the ELFv2 case returns the current address. inline address function_entry(); diff --git a/src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp b/src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp index 8c578e82509..760ab28f47e 100644 --- a/src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp +++ b/src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -241,7 +241,7 @@ inline bool MacroAssembler::is_bc_far_variant3_at(address instruction_addr) { // if CCR0bi is "equal", dst is set to 0, otherwise it's set to -1. inline void MacroAssembler::set_cmp3(Register dst) { assert_different_registers(dst, R0); - // P10, prefer using setbc intructions + // P10, prefer using setbc instructions if (VM_Version::has_brw()) { setbc(R0, CCR0, Assembler::greater); // Set 1 to R0 if CCR0bi is "greater than", otherwise 0 setnbc(dst, CCR0, Assembler::less); // Set -1 to dst if CCR0bi is "less than", otherwise 0 diff --git a/src/hotspot/cpu/ppc/macroAssembler_ppc_sha.cpp b/src/hotspot/cpu/ppc/macroAssembler_ppc_sha.cpp index 7a82ed3f99d..c965c488683 100644 --- a/src/hotspot/cpu/ppc/macroAssembler_ppc_sha.cpp +++ b/src/hotspot/cpu/ppc/macroAssembler_ppc_sha.cpp @@ -468,7 +468,7 @@ void MacroAssembler::sha256(bool multi_block) { #endif // Load 16 elements from w out of the loop. - // Order of the int values is Endianess specific. + // Order of the int values is Endianness specific. VectorRegister w0 = VR17; VectorRegister w1 = VR18; VectorRegister w2 = VR19; @@ -1021,7 +1021,7 @@ void MacroAssembler::sha512(bool multi_block) { } // Load 16 elements from w out of the loop. - // Order of the long values is Endianess specific. + // Order of the long values is Endianness specific. VectorRegister w0 = VR10; VectorRegister w1 = VR11; VectorRegister w2 = VR12; diff --git a/src/hotspot/cpu/ppc/matcher_ppc.hpp b/src/hotspot/cpu/ppc/matcher_ppc.hpp index 069c40485fe..8bc3f2892f9 100644 --- a/src/hotspot/cpu/ppc/matcher_ppc.hpp +++ b/src/hotspot/cpu/ppc/matcher_ppc.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -153,7 +153,7 @@ return false; } - // true means we have fast l2f convers + // true means we have fast l2f conversion // false means that conversion is done by runtime call static const bool convL2FSupported(void) { // fcfids can do the conversion (>= Power7). diff --git a/src/hotspot/cpu/ppc/methodHandles_ppc.cpp b/src/hotspot/cpu/ppc/methodHandles_ppc.cpp index 65dae893df6..3a525ea9de9 100644 --- a/src/hotspot/cpu/ppc/methodHandles_ppc.cpp +++ b/src/hotspot/cpu/ppc/methodHandles_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -534,7 +534,7 @@ void trace_method_handle_stub(const char* adaptername, // Current C frame frame cur_frame = os::current_frame(); - // Robust search of trace_calling_frame (independant of inlining). + // Robust search of trace_calling_frame (independent of inlining). assert(cur_frame.sp() <= saved_regs, "registers not saved on stack ?"); frame trace_calling_frame = os::get_sender_for_C_frame(&cur_frame); while (trace_calling_frame.fp() < saved_regs) { diff --git a/src/hotspot/cpu/ppc/ppc.ad b/src/hotspot/cpu/ppc/ppc.ad index b41c72ab449..d94daeb0f36 100644 --- a/src/hotspot/cpu/ppc/ppc.ad +++ b/src/hotspot/cpu/ppc/ppc.ad @@ -1,5 +1,5 @@ // -// Copyright (c) 2011, 2021, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved. // Copyright (c) 2012, 2021 SAP SE. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // @@ -4136,7 +4136,7 @@ operand immP_NM() %{ interface(CONST_INTER); %} -// costant 'pointer 0'. +// constant 'pointer 0'. operand immP_0() %{ predicate(n->get_ptr() == 0); match(ConP); @@ -4911,7 +4911,7 @@ operand cmpOp() %{ //----------OPERAND CLASSES---------------------------------------------------- // Operand Classes are groups of operands that are used to simplify // instruction definitions by not requiring the AD writer to specify -// seperate instructions for every form of operand when the +// separate instructions for every form of operand when the // instruction accepts multiple operand types with the same basic // encoding and format. The classic case of this is memory operands. // Indirect is not included since its use is limited to Compare & Swap. @@ -12133,7 +12133,7 @@ instruct cmpFastLock(flagsReg crx, iRegPdst oop, iRegPdst box, iRegPdst tmp1, iR ins_encode %{ __ compiler_fast_lock_object($crx$$CondRegister, $oop$$Register, $box$$Register, $tmp1$$Register, $tmp2$$Register, /*tmp3*/ R0); - // If locking was successfull, crx should indicate 'EQ'. + // If locking was successful, crx should indicate 'EQ'. // The compiler generates a branch to the runtime call to // _complete_monitor_locking_Java for the case where crx is 'NE'. %} @@ -12153,7 +12153,7 @@ instruct cmpFastLock_tm(flagsReg crx, iRegPdst oop, rarg2RegP box, iRegPdst tmp1 _rtm_counters, _stack_rtm_counters, ((Method*)(ra_->C->method()->constant_encoding()))->method_data(), /*RTM*/ true, ra_->C->profile_rtm()); - // If locking was successfull, crx should indicate 'EQ'. + // If locking was successful, crx should indicate 'EQ'. // The compiler generates a branch to the runtime call to // _complete_monitor_locking_Java for the case where crx is 'NE'. %} @@ -12170,7 +12170,7 @@ instruct cmpFastUnlock(flagsReg crx, iRegPdst oop, iRegPdst box, iRegPdst tmp1, __ compiler_fast_unlock_object($crx$$CondRegister, $oop$$Register, $box$$Register, $tmp1$$Register, $tmp2$$Register, $tmp3$$Register, false); - // If unlocking was successfull, crx should indicate 'EQ'. + // If unlocking was successful, crx should indicate 'EQ'. // The compiler generates a branch to the runtime call to // _complete_monitor_unlocking_Java for the case where crx is 'NE'. %} @@ -12187,7 +12187,7 @@ instruct cmpFastUnlock_tm(flagsReg crx, iRegPdst oop, iRegPdst box, iRegPdst tmp __ compiler_fast_unlock_object($crx$$CondRegister, $oop$$Register, $box$$Register, $tmp1$$Register, $tmp2$$Register, $tmp3$$Register, /*RTM*/ true); - // If unlocking was successfull, crx should indicate 'EQ'. + // If unlocking was successful, crx should indicate 'EQ'. // The compiler generates a branch to the runtime call to // _complete_monitor_unlocking_Java for the case where crx is 'NE'. %} @@ -14474,7 +14474,7 @@ instruct CallLeafDirect(method meth) %{ %} // postalloc expand of CallLeafDirect. -// Load adress to call from TOC, then bl to it. +// Load address to call from TOC, then bl to it. instruct CallLeafDirect_Ex(method meth) %{ match(CallLeaf); effect(USE meth); @@ -14490,7 +14490,7 @@ instruct CallLeafDirect_Ex(method meth) %{ // Call runtime without safepoint - same as CallLeaf. // postalloc expand of CallLeafNoFPDirect. -// Load adress to call from TOC, then bl to it. +// Load address to call from TOC, then bl to it. instruct CallLeafNoFPDirect_Ex(method meth) %{ match(CallLeafNoFP); effect(USE meth); @@ -14790,7 +14790,7 @@ instruct cacheWBPostSync() // // // Change (inc mov) to lea // peephole %{ -// // increment preceeded by register-register move +// // increment preceded by register-register move // peepmatch ( incI_eReg movI ); // // require that the destination register of the increment // // match the destination register of the move diff --git a/src/hotspot/cpu/ppc/registerMap_ppc.hpp b/src/hotspot/cpu/ppc/registerMap_ppc.hpp index 567028fa3e8..40b026e926f 100644 --- a/src/hotspot/cpu/ppc/registerMap_ppc.hpp +++ b/src/hotspot/cpu/ppc/registerMap_ppc.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2013 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -26,7 +26,7 @@ #ifndef CPU_PPC_REGISTERMAP_PPC_HPP #define CPU_PPC_REGISTERMAP_PPC_HPP -// machine-dependent implemention for register maps +// machine-dependent implementation for register maps friend class frame; private: diff --git a/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp b/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp index f930cb99cf4..b147992329e 100644 --- a/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp +++ b/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp @@ -260,7 +260,7 @@ OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssemble // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment. // Updated return pc is returned in R31 (if not return_pc_is_pre_saved). - // calcualte frame size + // calculate frame size const int regstosave_num = sizeof(RegisterSaver_LiveRegs) / sizeof(RegisterSaver::LiveRegType); const int vsregstosave_num = save_vectors ? (sizeof(RegisterSaver_LiveVSRegs) / @@ -1852,7 +1852,7 @@ nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, __ verify_thread(); - // Native nmethod wrappers never take possesion of the oop arguments. + // Native nmethod wrappers never take possession of the oop arguments. // So the caller will gc the arguments. // The only thing we need an oopMap for is if the call is static. // @@ -2870,7 +2870,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t // The following is basically a call_VM. However, we need the precise // address of the call in order to generate an oopmap. Hence, we do all the - // work outselves. + // work ourselves. __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg); // The return address must always be correct so that the frame constructor diff --git a/src/hotspot/cpu/ppc/stubGenerator_ppc.cpp b/src/hotspot/cpu/ppc/stubGenerator_ppc.cpp index 78c3fa0dd0e..e942ec11408 100644 --- a/src/hotspot/cpu/ppc/stubGenerator_ppc.cpp +++ b/src/hotspot/cpu/ppc/stubGenerator_ppc.cpp @@ -3510,7 +3510,7 @@ class StubGenerator: public StubCodeGenerator { * scratch: * R2, R6-R12 * - * Ouput: + * Output: * R3_RET - int crc result */ // Compute CRC32 function. @@ -3958,7 +3958,7 @@ class StubGenerator: public StubCodeGenerator { // Each element of non_match correspond to one each of the 16 input // characters. Those elements that become 0x00 after the xxland - // instuction are invalid Base64 characters. + // instruction are invalid Base64 characters. __ xxland(non_match->to_vsr(), M, bit); // Compare each element to zero diff --git a/src/hotspot/cpu/ppc/templateInterpreterGenerator_ppc.cpp b/src/hotspot/cpu/ppc/templateInterpreterGenerator_ppc.cpp index 548c0c8d2f3..ca91e78dd30 100644 --- a/src/hotspot/cpu/ppc/templateInterpreterGenerator_ppc.cpp +++ b/src/hotspot/cpu/ppc/templateInterpreterGenerator_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2015, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -81,7 +81,7 @@ address TemplateInterpreterGenerator::generate_slow_signature_handler() { // first C-argument and to return the result_handler in // R3_RET. Since native_entry will copy the jni-pointer to the // first C-argument slot later on, it is OK to occupy this slot - // temporarilly. Then we copy the argument list on the java + // temporarily. Then we copy the argument list on the java // expression stack into native varargs format on the native stack // and load arguments into argument registers. Integer arguments in // the varargs vector will be sign-extended to 8 bytes. @@ -2030,7 +2030,7 @@ void TemplateInterpreterGenerator::generate_throw_exception() { __ stw(R11_scratch1, in_bytes(JavaThread::popframe_condition_offset()), R16_thread); // Return from the current method into the deoptimization blob. Will eventually - // end up in the deopt interpeter entry, deoptimization prepared everything that + // end up in the deopt interpreter entry, deoptimization prepared everything that // we will reexecute the call that called us. __ merge_frames(/*top_frame_sp*/ R21_sender_SP, /*reload return_pc*/ return_pc, R11_scratch1, R12_scratch2); __ mtlr(return_pc); diff --git a/src/hotspot/cpu/ppc/templateTable_ppc_64.cpp b/src/hotspot/cpu/ppc/templateTable_ppc_64.cpp index 71361f983e9..1ea0114d5ea 100644 --- a/src/hotspot/cpu/ppc/templateTable_ppc_64.cpp +++ b/src/hotspot/cpu/ppc/templateTable_ppc_64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2013, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -1456,7 +1456,7 @@ void TemplateTable::wide_iinc() { } void TemplateTable::convert() { - // %%%%% Factor this first part accross platforms + // %%%%% Factor this first part across platforms #ifdef ASSERT TosState tos_in = ilgl; TosState tos_out = ilgl; @@ -2334,7 +2334,7 @@ void TemplateTable::load_invoke_cp_cache_entry(int byte_no, // // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. ALSO reads & -// writes act as aquire & release, so: +// writes act as acquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that // happen after the read float up to before the read. It's OK for // non-volatile memory refs that happen before the volatile read to @@ -4033,7 +4033,7 @@ void TemplateTable::athrow() { // ============================================================================= // Synchronization // Searches the basic object lock list on the stack for a free slot -// and uses it to lock the obect in tos. +// and uses it to lock the object in tos. // // Recursive locking is enabled by exiting the search if the same // object is already found in the list. Thus, a new basic lock obj lock @@ -4120,7 +4120,7 @@ void TemplateTable::monitorenter() { __ bind(Lfound); // Increment bcp to point to the next bytecode, so exception handling for async. exceptions work correctly. - // The object has already been poped from the stack, so the expression stack looks correct. + // The object has already been popped from the stack, so the expression stack looks correct. __ addi(R14_bcp, R14_bcp, 1); __ std(Robj_to_lock, 0, Rcurrent_obj_addr); diff --git a/src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp b/src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp index eb2f5310c42..c57090078c9 100644 --- a/src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp +++ b/src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2018 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -28,12 +28,12 @@ inline VMReg RegisterImpl::as_VMReg() { if (this == noreg) return VMRegImpl::Bad(); - // Two halfs, multiply by 2. + // Two halves, multiply by 2. return VMRegImpl::as_VMReg(encoding() << 1); } inline VMReg FloatRegisterImpl::as_VMReg() { - // Two halfs, multiply by 2. + // Two halves, multiply by 2. return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); } diff --git a/src/hotspot/cpu/riscv/abstractInterpreter_riscv.cpp b/src/hotspot/cpu/riscv/abstractInterpreter_riscv.cpp index 31c63abe71d..0fd3e406678 100644 --- a/src/hotspot/cpu/riscv/abstractInterpreter_riscv.cpp +++ b/src/hotspot/cpu/riscv/abstractInterpreter_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -87,7 +87,7 @@ int AbstractInterpreter::size_activation(int max_stack, int overhead = frame::sender_sp_offset - frame::interpreter_frame_initial_sp_offset; // Our locals were accounted for by the caller (or last_frame_adjust - // on the transistion) Since the callee parameters already account + // on the transition) Since the callee parameters already account // for the callee's params we only need to account for the extra // locals. int size = overhead + diff --git a/src/hotspot/cpu/riscv/assembler_riscv.hpp b/src/hotspot/cpu/riscv/assembler_riscv.hpp index c1e7b1c54c2..8fa9d23aca3 100644 --- a/src/hotspot/cpu/riscv/assembler_riscv.hpp +++ b/src/hotspot/cpu/riscv/assembler_riscv.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -222,7 +222,7 @@ class Address { } }; -// Convience classes +// Convenience classes class RuntimeAddress: public Address { public: diff --git a/src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp b/src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp index 742c2126e60..41d01b65b01 100644 --- a/src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -359,10 +359,10 @@ int LIR_Assembler::emit_unwind_handler() { __ bind(_unwind_handler_entry); __ verify_not_null_oop(x10); if (method()->is_synchronized() || compilation()->env()->dtrace_method_probes()) { - __ mv(x9, x10); // Perserve the exception + __ mv(x9, x10); // Preserve the exception } - // Preform needed unlocking + // Perform needed unlocking MonitorExitStub* stub = NULL; if (method()->is_synchronized()) { monitor_address(0, FrameMap::r10_opr); @@ -399,7 +399,7 @@ int LIR_Assembler::emit_unwind_handler() { } int LIR_Assembler::emit_deopt_handler() { - // if the last instruciton is a call (typically to do a throw which + // if the last instruction is a call (typically to do a throw which // is coming at the end after block reordering) the return address // must still point into the code area in order to avoid assertion // failures when searching for the corresponding bck => add a nop diff --git a/src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp index 6f656c8c533..eb1db2231a2 100644 --- a/src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -205,7 +205,7 @@ void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) { // clear rest of allocated space const Register index = tmp2; - // 16: multipler for threshold + // 16: multiplier for threshold const int threshold = 16 * BytesPerWord; // approximate break even point for code size (see comments below) if (var_size_in_bytes != noreg) { mv(index, var_size_in_bytes); @@ -213,7 +213,7 @@ void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register } else if (con_size_in_bytes <= threshold) { // use explicit null stores int i = hdr_size_in_bytes; - if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multipler for BytesPerWord + if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multiplier for BytesPerWord sd(zr, Address(obj, i)); i += BytesPerWord; } diff --git a/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp index 5340656f1c6..24ee64ad41d 100644 --- a/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -284,7 +284,7 @@ void C2_MacroAssembler::string_indexof(Register haystack, Register needle, // if (pattern.count == 0) return 0; // We have two strings, a source string in haystack, haystack_len and a pattern string - // in needle, needle_len. Find the first occurence of pattern in source or return -1. + // in needle, needle_len. Find the first occurrence of pattern in source or return -1. // For larger pattern and source we use a simplified Boyer Moore algorithm. // With a small pattern and source we use linear scan. @@ -1430,7 +1430,7 @@ void C2_MacroAssembler::string_compare_v(Register str1, Register str2, Register BLOCK_COMMENT("string_compare {"); - // for Lating strings, 1 byte for 1 character + // for Latin strings, 1 byte for 1 character // for UTF16 strings, 2 bytes for 1 character if (!str1_isL) sraiw(cnt1, cnt1, 1); diff --git a/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp b/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp index d0ac6e52436..ed6fcb7b807 100644 --- a/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp @@ -187,7 +187,7 @@ void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm __ bind(is_null); } -// IMPORTANT: This must preserve all registers, even t0 and t1, except those explicitely +// IMPORTANT: This must preserve all registers, even t0 and t1, except those explicitly // passed in. void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) { assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled"); @@ -499,7 +499,7 @@ void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm, // If success, then we are done. __ beq(expected, t1, success); - // Step2: CAS failed, check the forwared pointer. + // Step2: CAS failed, check the forwarded pointer. __ mv(t0, t1); if (is_narrow) { diff --git a/src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp b/src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp index 3d3f4d4d774..3c865a642f9 100644 --- a/src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -382,7 +382,7 @@ void ZBarrierSetAssembler::generate_c1_load_barrier_stub(LIR_Assembler* ce, assert_different_registers(ref, ref_addr, noreg); // Save x10 unless it is the result or tmp register - // Set up SP to accomodate parameters and maybe x10. + // Set up SP to accommodate parameters and maybe x10. if (ref != x10 && tmp != x10) { __ sub(sp, sp, 32); __ sd(x10, Address(sp, 16)); diff --git a/src/hotspot/cpu/riscv/gc/z/zGlobals_riscv.cpp b/src/hotspot/cpu/riscv/gc/z/zGlobals_riscv.cpp index d14997790af..ddf88da646a 100644 --- a/src/hotspot/cpu/riscv/gc/z/zGlobals_riscv.cpp +++ b/src/hotspot/cpu/riscv/gc/z/zGlobals_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -156,12 +156,12 @@ static size_t probe_valid_max_address_bit() { for (size_t i = DEFAULT_MAX_ADDRESS_BIT; i > MINIMUM_MAX_ADDRESS_BIT; --i) { const uintptr_t base_addr = ((uintptr_t) 1U) << i; if (msync((void*)base_addr, page_size, MS_ASYNC) == 0) { - // msync suceeded, the address is valid, and maybe even already mapped. + // msync succeeded, the address is valid, and maybe even already mapped. max_address_bit = i; break; } if (errno != ENOMEM) { - // Some error occured. This should never happen, but msync + // Some error occurred. This should never happen, but msync // has some undefined behavior, hence ignore this bit. #ifdef ASSERT fatal("Received '%s' while probing the address space for the highest valid bit", os::errno_name(errno)); diff --git a/src/hotspot/cpu/riscv/interp_masm_riscv.cpp b/src/hotspot/cpu/riscv/interp_masm_riscv.cpp index d12dcb2af19..d2dcc178ba1 100644 --- a/src/hotspot/cpu/riscv/interp_masm_riscv.cpp +++ b/src/hotspot/cpu/riscv/interp_masm_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -572,7 +572,7 @@ void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) { // // Apply stack watermark barrier. // Unlock the receiver if this is a synchronized method. -// Unlock any Java monitors from syncronized blocks. +// Unlock any Java monitors from synchronized blocks. // Remove the activation from the stack. // // If there are locked Java monitors @@ -1827,7 +1827,7 @@ void InterpreterMacroAssembler::profile_return_type(Register mdp, Register ret, // If we don't profile all invoke bytecodes we must make sure // it's a bytecode we indeed profile. We can't go back to the - // begining of the ProfileData we intend to update to check its + // beginning of the ProfileData we intend to update to check its // type because we're right after it and we don't known its // length Label do_profile; diff --git a/src/hotspot/cpu/riscv/interp_masm_riscv.hpp b/src/hotspot/cpu/riscv/interp_masm_riscv.hpp index 4d8cb086f82..bb92cf950a8 100644 --- a/src/hotspot/cpu/riscv/interp_masm_riscv.hpp +++ b/src/hotspot/cpu/riscv/interp_masm_riscv.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -31,7 +31,7 @@ #include "interpreter/invocationCounter.hpp" #include "runtime/frame.hpp" -// This file specializes the assember with interpreter-specific macros +// This file specializes the assembler with interpreter-specific macros typedef ByteSize (*OffsetFunction)(uint); diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp index d830405db21..3710f1c2cb7 100644 --- a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -1391,7 +1391,7 @@ void MacroAssembler::mv(Register Rd, Address dest) { } void MacroAssembler::mv(Register Rd, address addr) { - // Here in case of use with relocation, use fix length instruciton + // Here in case of use with relocation, use fix length instruction // movptr instead of li movptr(Rd, addr); } @@ -2107,7 +2107,7 @@ void MacroAssembler::lookup_interface_method(Register recv_klass, beq(intf_klass, method_result, found_method); bind(search); // Check that the previous entry is non-null. A null entry means that - // the receiver class doens't implement the interface, and wasn't the + // the receiver class doesn't implement the interface, and wasn't the // same as when the caller was compiled. beqz(method_result, L_no_such_interface, /* is_far */ true); addi(scan_tmp, scan_tmp, scan_step); @@ -2163,9 +2163,9 @@ void MacroAssembler::membar(uint32_t order_constraint) { } } -// Form an addres from base + offset in Rd. Rd my or may not +// Form an address from base + offset in Rd. Rd my or may not // actually be used: you must use the Address that is returned. It -// is up to you to ensure that the shift provided mathces the size +// is up to you to ensure that the shift provided matches the size // of your data. Address MacroAssembler::form_address(Register Rd, Register base, long byte_offset) { if (is_offset_in_range(byte_offset, 12)) { // 12: imm in range 2^12 @@ -2551,7 +2551,7 @@ void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass, // This self-check enables sharing of secondary supertype arrays among // non-primary types such as array-of-interface. Otherwise, each such // type would need its own customized SSA. - // We move this check to the front fo the fast path because many + // We move this check to the front of the fast path because many // type checks are in fact trivially successful in this manner, // so we get a nicely predicted branch right at the start of the check. beq(sub_klass, super_klass, *L_success); @@ -2565,11 +2565,11 @@ void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass, Address super_check_addr(t0); ld(t0, super_check_addr); // load displayed supertype - // Ths check has worked decisively for primary supers. + // This check has worked decisively for primary supers. // Secondary supers are sought in the super_cache ('super_cache_addr'). // (Secondary supers are interfaces and very deeply nested subtypes.) // This works in the same check above because of a tricky aliasing - // between the super_Cache and the primary super dispaly elements. + // between the super_Cache and the primary super display elements. // (The 'super_check_addr' can address either, as the case requires.) // Note that the cache is updated below if it does not help us find // what we need immediately. @@ -2590,7 +2590,7 @@ void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass, #undef final_jmp } -// Scans count pointer sized words at [addr] for occurence of value, +// Scans count pointer sized words at [addr] for occurrence of value, // generic void MacroAssembler::repne_scan(Register addr, Register value, Register count, Register tmp) { @@ -2624,7 +2624,7 @@ void MacroAssembler::check_klass_subtype_slow_path(Register sub_klass, assert(label_nulls <= 1, "at most one NULL in the batch"); - // A couple of usefule fields in sub_klass: + // A couple of useful fields in sub_klass: int ss_offset = in_bytes(Klass::secondary_supers_offset()); int sc_offset = in_bytes(Klass::secondary_super_cache_offset()); Address secondary_supers_addr(sub_klass, ss_offset); @@ -2635,7 +2635,7 @@ void MacroAssembler::check_klass_subtype_slow_path(Register sub_klass, // Do a linear scan of the secondary super-klass chain. // This code is rarely used, so simplicity is a virtue here. // The repne_scan instruction uses fixed registers, which we must spill. - // Don't worry too much about pre-existing connecitons with the input regs. + // Don't worry too much about pre-existing connections with the input regs. assert(sub_klass != x10, "killed reg"); // killed by mv(x10, super) assert(sub_klass != x12, "killed reg"); // killed by la(x12, &pst_counter) @@ -2941,7 +2941,7 @@ address MacroAssembler::emit_trampoline_stub(int insts_call_instruction_offset, // instructions code-section. // make sure 4 byte aligned here, so that the destination address would be - // 8 byte aligned after 3 intructions + // 8 byte aligned after 3 instructions // when we reach here we may get a 2-byte alignment so need to align it align(wordSize, NativeCallTrampolineStub::data_offset); @@ -3053,7 +3053,7 @@ void MacroAssembler::compute_match_mask(Register src, Register pattern, Register } #ifdef COMPILER2 -// Code for BigInteger::mulAdd instrinsic +// Code for BigInteger::mulAdd intrinsic // out = x10 // in = x11 // offset = x12 (already out.length-offset) diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp index 23e09475be1..02ee4479ecc 100644 --- a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp +++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -225,7 +225,7 @@ class MacroAssembler: public Assembler { void store_heap_oop_null(Address dst); // This dummy is to prevent a call to store_heap_oop from - // converting a zero (linke NULL) into a Register by giving + // converting a zero (linked NULL) into a Register by giving // the compiler two choices it can't resolve void store_heap_oop(Address dst, void* dummy); @@ -262,9 +262,9 @@ class MacroAssembler: public Assembler { RegisterOrConstant vtable_index, Register method_result); - // Form an addres from base + offset in Rd. Rd my or may not + // Form an address from base + offset in Rd. Rd my or may not // actually be used: you must use the Address that is returned. It - // is up to you to ensure that the shift provided mathces the size + // is up to you to ensure that the shift provided matches the size // of your data. Address form_address(Register Rd, Register base, long byte_offset); @@ -302,9 +302,9 @@ class MacroAssembler: public Assembler { Label* L_slow_path, Register super_check_offset = noreg); - // The reset of the type cehck; must be wired to a corresponding fast path. + // The reset of the type check; must be wired to a corresponding fast path. // It does not repeat the fast path logic, so don't use it standalone. - // The tmp1_reg and tmp2_reg can be noreg, if no temps are avaliable. + // The tmp1_reg and tmp2_reg can be noreg, if no temps are available. // Updates the sub's secondary super cache as necessary. void check_klass_subtype_slow_path(Register sub_klass, Register super_klass, diff --git a/src/hotspot/cpu/riscv/matcher_riscv.hpp b/src/hotspot/cpu/riscv/matcher_riscv.hpp index 23a75d20502..8e1235471b4 100644 --- a/src/hotspot/cpu/riscv/matcher_riscv.hpp +++ b/src/hotspot/cpu/riscv/matcher_riscv.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2021, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -152,7 +152,7 @@ return false; } - // true means we have fast l2f convers + // true means we have fast l2f conversion // false means that conversion is done by runtime call static constexpr bool convL2FSupported(void) { return true; diff --git a/src/hotspot/cpu/riscv/registerMap_riscv.hpp b/src/hotspot/cpu/riscv/registerMap_riscv.hpp index f34349811a9..1115d7d7180 100644 --- a/src/hotspot/cpu/riscv/registerMap_riscv.hpp +++ b/src/hotspot/cpu/riscv/registerMap_riscv.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -26,7 +26,7 @@ #ifndef CPU_RISCV_REGISTERMAP_RISCV_HPP #define CPU_RISCV_REGISTERMAP_RISCV_HPP -// machine-dependent implemention for register maps +// machine-dependent implementation for register maps friend class frame; private: diff --git a/src/hotspot/cpu/riscv/riscv.ad b/src/hotspot/cpu/riscv/riscv.ad index e31f8dece1c..518e6853126 100644 --- a/src/hotspot/cpu/riscv/riscv.ad +++ b/src/hotspot/cpu/riscv/riscv.ad @@ -1,5 +1,5 @@ // -// Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. // Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. // Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -29,7 +29,7 @@ //----------REGISTER DEFINITION BLOCK------------------------------------------ // This information is used by the matcher and the register allocator to // describe individual registers and classes of registers within the target -// archtecture. +// architecture. register %{ //----------Architecture Description Register Definitions---------------------- @@ -2591,10 +2591,10 @@ encode %{ // Region 6-7 is determined per call site. // Note 2: If the calling convention leaves holes in the incoming argument // area, those holes are owned by SELF. Holes in the outgoing area -// are owned by the CALLEE. Holes should not be nessecary in the +// are owned by the CALLEE. Holes should not be necessary in the // incoming area, as the Java calling convention is completely under // the control of the AD file. Doubles can be sorted and packed to -// avoid holes. Holes in the outgoing arguments may be nessecary for +// avoid holes. Holes in the outgoing arguments may be necessary for // varargs C calling conventions. // Note 3: Region 0-3 is even aligned, with pad2 as needed. Region 3-5 is // even aligned with pad0 as needed. diff --git a/src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp b/src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp index f85d4b25a76..24db5feb277 100644 --- a/src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp +++ b/src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -624,7 +624,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm // require some stack space. We grow the current (compiled) stack, then repack // the args. We finally end in a jump to the generic interpreter entry point. // On exit from the interpreter, the interpreter will restore our SP (lest the - // compiled code, which relys solely on SP and not FP, get sick). + // compiled code, which relies solely on SP and not FP, get sick). { __ block_comment("c2i_unverified_entry {"); @@ -1129,7 +1129,7 @@ static void gen_special_dispatch(MacroAssembler* masm, // They are roughly structured like this: // if (GCLocker::needs_gc()) SharedRuntime::block_for_jni_critical() // tranistion to thread_in_native -// unpack arrray arguments and call native entry point +// unpack array arguments and call native entry point // check for safepoint in progress // check if any thread suspend flags are set // call into JVM and possible unlock the JNI critical @@ -2430,7 +2430,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t // The following is basically a call_VM. However, we need the precise // address of the call in order to generate an oopmap. Hence, we do all the - // work outselves. + // work ourselves. Label retaddr; __ set_last_Java_frame(sp, noreg, retaddr, t0); diff --git a/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp b/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp index 90fd4683099..15d9f737f7f 100644 --- a/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp +++ b/src/hotspot/cpu/riscv/stubGenerator_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -1022,7 +1022,7 @@ class StubGenerator: public StubCodeGenerator { // // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let // the hardware handle it. The two dwords within qwords that span - // cache line boundaries will still be loaded and stored atomicly. + // cache line boundaries will still be loaded and stored atomically. // // Side Effects: // disjoint_int_copy_entry is set to the no-overlap entry point @@ -1094,7 +1094,7 @@ class StubGenerator: public StubCodeGenerator { // // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let // the hardware handle it. The two dwords within qwords that span - // cache line boundaries will still be loaded and stored atomicly. + // cache line boundaries will still be loaded and stored atomically. // address generate_conjoint_copy(size_t size, bool aligned, bool is_oop, address nooverlap_target, address* entry, const char* name, @@ -1262,7 +1262,7 @@ class StubGenerator: public StubCodeGenerator { // // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let // the hardware handle it. The two dwords within qwords that span - // cache line boundaries will still be loaded and stored atomicly. + // cache line boundaries will still be loaded and stored atomically. // // Side Effects: // disjoint_int_copy_entry is set to the no-overlap entry point @@ -1286,7 +1286,7 @@ class StubGenerator: public StubCodeGenerator { // // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let // the hardware handle it. The two dwords within qwords that span - // cache line boundaries will still be loaded and stored atomicly. + // cache line boundaries will still be loaded and stored atomically. // address generate_conjoint_int_copy(bool aligned, address nooverlap_target, address* entry, const char* name, diff --git a/src/hotspot/cpu/riscv/templateTable_riscv.cpp b/src/hotspot/cpu/riscv/templateTable_riscv.cpp index d2a301c6e74..01cf9ee2f2c 100644 --- a/src/hotspot/cpu/riscv/templateTable_riscv.cpp +++ b/src/hotspot/cpu/riscv/templateTable_riscv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, Red Hat Inc. All rights reserved. * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -126,7 +126,7 @@ static inline Address at_tos_p5() { return Address(esp, Interpreter::expr_offset_in_bytes(5)); } -// Miscelaneous helper routines +// Miscellaneous helper routines // Store an oop (or NULL) at the Address described by obj. // If val == noreg this means store a NULL static void do_oop_store(InterpreterMacroAssembler* _masm, @@ -2221,7 +2221,7 @@ void TemplateTable::_return(TosState state) // // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. ALSO reads & -// writes act as aquire & release, so: +// writes act as acquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that // happen after the read float up to before the read. It's OK for // non-volatile memory refs that happen before the volatile read to @@ -2352,7 +2352,7 @@ void TemplateTable::load_invoke_cp_cache_entry(int byte_no, void TemplateTable::jvmti_post_field_access(Register cache, Register index, bool is_static, bool has_tos) { // do the JVMTI work here to avoid disturbing the register state below - // We use c_rarg registers here beacause we want to use the register used in + // We use c_rarg registers here because we want to use the register used in // the call to the VM if (JvmtiExport::can_post_field_access()) { // Check to see if a field access watch has been set before we @@ -2424,7 +2424,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr assert(btos == 0, "change code, btos != 0"); __ bnez(flags, notByte); - // Dont't rewrite getstatic, only getfield + // Don't rewrite getstatic, only getfield if (is_static) { rc = may_not_rewrite; } @@ -2445,7 +2445,7 @@ void TemplateTable::getfield_or_static(int byte_no, bool is_static, RewriteContr // ztos (same code as btos) __ access_load_at(T_BOOLEAN, IN_HEAP, x10, field, noreg, noreg); __ push(ztos); - // Rewirte bytecode to be faster + // Rewrite bytecode to be faster if (rc == may_rewrite) { // uses btos rewriting, no truncating to t/f bit is needed for getfield patch_bytecode(Bytecodes::_fast_bgetfield, bc, x11); @@ -3287,7 +3287,7 @@ void TemplateTable::invokespecial(int byte_no) void TemplateTable::invokestatic(int byte_no) { transition(vtos, vtos); - assert(byte_no == f1_byte, "use this arugment"); + assert(byte_no == f1_byte, "use this argument"); prepare_invoke(byte_no, xmethod); // get f1 Method* // do the call @@ -3546,7 +3546,7 @@ void TemplateTable::_new() { __ sub(x13, x13, sizeof(oopDesc)); __ beqz(x13, initialize_header); - // Initialize obejct fields + // Initialize object fields { __ add(x12, x10, sizeof(oopDesc)); Label loop; @@ -3859,7 +3859,7 @@ void TemplateTable::monitorenter() // Increment bcp to point to the next bytecode, so exception // handling for async. exceptions work correctly. - // The object has already been poped from the stack, so the + // The object has already been popped from the stack, so the // expression stack looks correct. __ addi(xbcp, xbcp, 1); diff --git a/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp b/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp index 03bcc8fa264..4bbb7cfecf0 100644 --- a/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp +++ b/src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp @@ -219,7 +219,7 @@ int LIR_Assembler::emit_unwind_handler() { __ lgr_if_needed(exception_oop_callee_saved, Z_EXC_OOP); // Preserve the exception. } - // Preform needed unlocking. + // Perform needed unlocking. MonitorExitStub* stub = NULL; if (method()->is_synchronized()) { // Runtime1::monitorexit_id expects lock address in Z_R1_scratch. @@ -2992,7 +2992,7 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) { __ z_bru(next); } } else { - __ asm_assert_ne("unexpect null obj", __LINE__); + __ asm_assert_ne("unexpected null obj", __LINE__); } __ bind(update); diff --git a/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp b/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp index 69b0a5f185c..3b07f0e2315 100644 --- a/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp +++ b/src/hotspot/cpu/s390/c1_LIRGenerator_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2017 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -339,7 +339,7 @@ void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { // for _ladd, _lmul, _lsub, _ldiv, _lrem void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) { - // Use shifts if divisior is a power of 2 otherwise use DSGR instruction. + // Use shifts if divisor is a power of 2 otherwise use DSGR instruction. // Instruction: DSGR R1, R2 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even) // R2: divisor @@ -415,7 +415,7 @@ void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { // for: _iadd, _imul, _isub, _idiv, _irem void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { - // Use shifts if divisior is a power of 2 otherwise use DSGFR instruction. + // Use shifts if divisor is a power of 2 otherwise use DSGFR instruction. // Instruction: DSGFR R1, R2 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even) // R2: divisor diff --git a/src/hotspot/cpu/s390/frame_s390.inline.hpp b/src/hotspot/cpu/s390/frame_s390.inline.hpp index 5574e6384e2..ca36b4730ea 100644 --- a/src/hotspot/cpu/s390/frame_s390.inline.hpp +++ b/src/hotspot/cpu/s390/frame_s390.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -93,7 +93,7 @@ inline BasicObjectLock** frame::interpreter_frame_monitors_addr() const { return (BasicObjectLock**) &(ijava_state()->monitors); } -// The next two funcions read and write z_ijava_state.monitors. +// The next two functions read and write z_ijava_state.monitors. inline BasicObjectLock* frame::interpreter_frame_monitors() const { return *interpreter_frame_monitors_addr(); } diff --git a/src/hotspot/cpu/s390/interp_masm_s390.cpp b/src/hotspot/cpu/s390/interp_masm_s390.cpp index 2a804f928c8..9c184d9f264 100644 --- a/src/hotspot/cpu/s390/interp_masm_s390.cpp +++ b/src/hotspot/cpu/s390/interp_masm_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -750,7 +750,7 @@ void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rta // Unlock if synchronized method. // // Unlock the receiver if this is a synchronized method. -// Unlock any Java monitors from syncronized blocks. +// Unlock any Java monitors from synchronized blocks. // // If there are locked Java monitors // If throw_monitor_exception @@ -910,7 +910,7 @@ void InterpreterMacroAssembler::narrow(Register result, Register ret_type) { // remove activation // // Unlock the receiver if this is a synchronized method. -// Unlock any Java monitors from syncronized blocks. +// Unlock any Java monitors from synchronized blocks. // Remove the activation from the stack. // // If there are locked Java monitors diff --git a/src/hotspot/cpu/s390/interp_masm_s390.hpp b/src/hotspot/cpu/s390/interp_masm_s390.hpp index de2f0a319e7..ab4664a9524 100644 --- a/src/hotspot/cpu/s390/interp_masm_s390.hpp +++ b/src/hotspot/cpu/s390/interp_masm_s390.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2017 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -29,7 +29,7 @@ #include "asm/macroAssembler.hpp" #include "interpreter/invocationCounter.hpp" -// This file specializes the assember with interpreter-specific macros. +// This file specializes the assembler with interpreter-specific macros. class InterpreterMacroAssembler: public MacroAssembler { @@ -72,7 +72,7 @@ class InterpreterMacroAssembler: public MacroAssembler { // Helper routine for frame allocation/deallocation. // Compute the delta by which the caller's SP has to - // be adjusted to accomodate for the non-argument locals. + // be adjusted to accommodate for the non-argument locals. void compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta); // dispatch routines diff --git a/src/hotspot/cpu/s390/macroAssembler_s390.cpp b/src/hotspot/cpu/s390/macroAssembler_s390.cpp index 06567a511ed..8301ca44b32 100644 --- a/src/hotspot/cpu/s390/macroAssembler_s390.cpp +++ b/src/hotspot/cpu/s390/macroAssembler_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2019 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -1241,7 +1241,7 @@ bool MacroAssembler::is_compare_immediate_narrow_klass(address pos) { // patch the load_constant //----------------------------------- -// CPU-version dependend patching of load_const. +// CPU-version dependent patching of load_const. void MacroAssembler::patch_const(address a, long x) { assert(is_load_const(a), "not a load of a constant"); // Note: Right shift is only cleanly defined for unsigned types @@ -1427,7 +1427,7 @@ int MacroAssembler::store_const(const Address &dest, long imm, //=== N O T P A T CH A B L E C O N S T A N T S === //=================================================================== -// Load constant x into register t with a fast instrcution sequence +// Load constant x into register t with a fast instruction sequence // depending on the bits in x. Preserves CC under all circumstances. int MacroAssembler::load_const_optimized_rtn_len(Register t, long x, bool emit) { if (x == 0) { @@ -2423,7 +2423,7 @@ bool MacroAssembler::is_call_far_patchable_variant2_at(address instruction_addr) // // A call_far_patchable comes in different flavors: // - LARL(CP) / LG(CP) / BR (address in constant pool, access via CP register) -// - LGRL(CP) / BR (address in constant pool, pc-relative accesss) +// - LGRL(CP) / BR (address in constant pool, pc-relative access) // - BRASL (relative address of call target coded in instruction) // All flavors occupy the same amount of space. Length differences are compensated // by leading nops, such that the instruction sequence always ends at the same @@ -2844,7 +2844,7 @@ void MacroAssembler::lookup_virtual_method(Register recv_klass, // trapMarker - Marking byte for the generated illtrap instructions (if any). // Any value except 0x00 is supported. // = 0x00 - do not generate illtrap instructions. -// use nops to fill ununsed space. +// use nops to fill unused space. // requiredSize - required size of the generated code. If the actually // generated code is smaller, use padding instructions to fill up. // = 0 - no size requirement, no padding. @@ -3009,7 +3009,7 @@ void MacroAssembler::check_klass_subtype_slow_path(Register Rsubklass, Label* L_success, Label* L_failure) { // Input registers must not overlap. - // Also check for R1 which is explicitely used here. + // Also check for R1 which is explicitly used here. assert_different_registers(Z_R1, Rsubklass, Rsuperklass, Rarray_ptr, Rlength); NearLabel L_fallthrough; int label_nulls = 0; @@ -3417,7 +3417,7 @@ void MacroAssembler::encode_klass_not_null(Register dst, Register src) { z_tmll(current, KlassAlignmentInBytes-1); // Check alignment. z_brc(Assembler::bcondAllZero, ok); // The plain disassembler does not recognize illtrap. It instead displays - // a 32-bit value. Issueing two illtraps assures the disassembler finds + // a 32-bit value. Issuing two illtraps assures the disassembler finds // the proper beginning of the next instruction. z_illtrap(0xee); z_illtrap(0xee); @@ -3561,7 +3561,7 @@ void MacroAssembler::decode_klass_not_null(Register dst) { z_tmll(dst, KlassAlignmentInBytes-1); // Check alignment. z_brc(Assembler::bcondAllZero, ok); // The plain disassembler does not recognize illtrap. It instead displays - // a 32-bit value. Issueing two illtraps assures the disassembler finds + // a 32-bit value. Issuing two illtraps assures the disassembler finds // the proper beginning of the next instruction. z_illtrap(0xd1); z_illtrap(0xd1); @@ -3608,7 +3608,7 @@ void MacroAssembler::decode_klass_not_null(Register dst, Register src) { z_tmll(dst, KlassAlignmentInBytes-1); // Check alignment. z_brc(Assembler::bcondAllZero, ok); // The plain disassembler does not recognize illtrap. It instead displays - // a 32-bit value. Issueing two illtraps assures the disassembler finds + // a 32-bit value. Issuing two illtraps assures the disassembler finds // the proper beginning of the next instruction. z_illtrap(0xd2); z_illtrap(0xd2); @@ -5493,7 +5493,7 @@ void MacroAssembler::stop(int type, const char* msg, int id) { push_frame_abi160(0); call_VM_leaf(CAST_FROM_FN_PTR(address, stop_on_request), Z_ARG1, Z_ARG2); // The plain disassembler does not recognize illtrap. It instead displays - // a 32-bit value. Issueing two illtraps assures the disassembler finds + // a 32-bit value. Issuing two illtraps assures the disassembler finds // the proper beginning of the next instruction. z_illtrap(); // Illegal instruction. z_illtrap(); // Illegal instruction. diff --git a/src/hotspot/cpu/s390/matcher_s390.hpp b/src/hotspot/cpu/s390/matcher_s390.hpp index 5c56ec5373b..a2bd6a97584 100644 --- a/src/hotspot/cpu/s390/matcher_s390.hpp +++ b/src/hotspot/cpu/s390/matcher_s390.hpp @@ -144,7 +144,7 @@ return false; } - // true means we have fast l2f convers + // true means we have fast l2f conversion // false means that conversion is done by runtime call static constexpr bool convL2FSupported(void) { return true; diff --git a/src/hotspot/cpu/s390/methodHandles_s390.cpp b/src/hotspot/cpu/s390/methodHandles_s390.cpp index 5ec0ae77ac6..7c4251de983 100644 --- a/src/hotspot/cpu/s390/methodHandles_s390.cpp +++ b/src/hotspot/cpu/s390/methodHandles_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2017 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -591,7 +591,7 @@ void trace_method_handle_stub(const char* adaptername, intptr_t *dump_sp = cur_frame.sender_sp(); intptr_t *dump_fp = cur_frame.link(); - bool walkable = has_mh; // Whether the traced frame shoud be walkable. + bool walkable = has_mh; // Whether the traced frame should be walkable. // The sender for cur_frame is the caller of trace_method_handle. if (walkable) { diff --git a/src/hotspot/cpu/s390/nativeInst_s390.cpp b/src/hotspot/cpu/s390/nativeInst_s390.cpp index 79fb7b61c57..60d17a8a6f1 100644 --- a/src/hotspot/cpu/s390/nativeInst_s390.cpp +++ b/src/hotspot/cpu/s390/nativeInst_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -277,7 +277,7 @@ void NativeFarCall::set_destination(address dest, int toc_offset) { // Here, we have a pc-relative call (brasl). // Be aware: dest may have moved in this case, so really patch the displacement, // when necessary! - // This while loop will also consume the nop which always preceeds a call_far_pcrelative. + // This while loop will also consume the nop which always precedes a call_far_pcrelative. // We need to revert this after the loop. Pc-relative calls are always assumed to have a leading nop. unsigned int nop_sz = MacroAssembler::nop_size(); unsigned int nop_bytes = 0; @@ -306,7 +306,7 @@ void NativeFarCall::set_destination(address dest, int toc_offset) { void NativeMovConstReg::verify() { address loc = addr_at(0); - // This while loop will also consume the nop which always preceeds a + // This while loop will also consume the nop which always precedes a // call_far_pcrelative. We need to revert this after the // loop. Pc-relative calls are always assumed to have a leading nop. unsigned int nop_sz = MacroAssembler::nop_size(); diff --git a/src/hotspot/cpu/s390/s390.ad b/src/hotspot/cpu/s390/s390.ad index f603c5fa00a..b3ad4afe979 100644 --- a/src/hotspot/cpu/s390/s390.ad +++ b/src/hotspot/cpu/s390/s390.ad @@ -39,7 +39,7 @@ // On more recent models (from z9 on), I-fetch is done on a Octoword // (32 bytes at a time) basis. To avoid I-fetching unnecessary // instructions, branch targets should be 32-byte aligend. If this -// exact alingment cannot be achieved, having the branch target in +// exact alignment cannot be achieved, having the branch target in // the first doubleword still provides some benefit. // - Avoid branch targets at the end of cache lines (> 64 bytes distance). // Sequential instruction prefetching after the branch target starts @@ -47,7 +47,7 @@ // branch target. When I-fetching crosses a cache line, there may be // a small stall. The worst case: the branch target (at the end of // a cache line) is a L1 I-cache miss and the next line as well. -// Then, the entire target line must be filled first (to contine at the +// Then, the entire target line must be filled first (to continue at the // branch target). Only then can the next sequential line be filled. // - Avoid multiple poorly predicted branches in a row. // @@ -3663,7 +3663,7 @@ operand cmpOp() %{ //----------OPERAND CLASSES---------------------------------------------------- // Operand Classes are groups of operands that are used to simplify // instruction definitions by not requiring the AD writer to specify -// seperate instructions for every form of operand when the +// separate instructions for every form of operand when the // instruction accepts multiple operand types with the same basic // encoding and format. The classic case of this is memory operands. // Indirect is not included since its use is limited to Compare & Swap @@ -10339,7 +10339,7 @@ instruct encode_ascii_array(iRegP src, iRegP dst, iRegI result, iRegI len, iRegI // // // Change (inc mov) to lea // peephole %{ -// // increment preceeded by register-register move +// // increment preceded by register-register move // peepmatch (incI_eReg movI); // // require that the destination register of the increment // // match the destination register of the move @@ -10755,7 +10755,7 @@ instruct bytes_reverse_long(iRegL dst, iRegL src) %{ // returns the bit position of the leftmost 1 in the 64bit source register. // As the bits are numbered from left to right (0..63), the returned // position index is equivalent to the number of leading zeroes. -// If no 1-bit is found (i.e. the regsiter contains zero), the instruction +// If no 1-bit is found (i.e. the register contains zero), the instruction // returns position 64. That's exactly what we need. instruct countLeadingZerosI(revenRegI dst, iRegI src, roddRegI tmp, flagsReg cr) %{ diff --git a/src/hotspot/cpu/s390/sharedRuntime_s390.cpp b/src/hotspot/cpu/s390/sharedRuntime_s390.cpp index ca38806f613..dee6464e7a6 100644 --- a/src/hotspot/cpu/s390/sharedRuntime_s390.cpp +++ b/src/hotspot/cpu/s390/sharedRuntime_s390.cpp @@ -1266,7 +1266,7 @@ static void move32_64(MacroAssembler *masm, if (src.first()->is_stack()) { Address memaddr(Z_SP, reg2offset(src.first()) + frame_offset); if (dst.first()->is_stack()) { - // stack -> stack. MVC not posible due to sign extension. + // stack -> stack. MVC not possible due to sign extension. Address firstaddr(Z_SP, reg2offset(dst.first())); __ mem2reg_signed_opt(Z_R0_scratch, memaddr); __ reg2mem_opt(Z_R0_scratch, firstaddr); @@ -2881,7 +2881,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t // The following is basically a call_VM. However, we need the precise // address of the call in order to generate an oopmap. Hence, we do all the - // work outselves. + // work ourselves. __ set_last_Java_frame(Z_SP, noreg); // call into the runtime to handle the safepoint poll diff --git a/src/hotspot/cpu/s390/stubGenerator_s390.cpp b/src/hotspot/cpu/s390/stubGenerator_s390.cpp index e15b2e04638..2aac33e983a 100644 --- a/src/hotspot/cpu/s390/stubGenerator_s390.cpp +++ b/src/hotspot/cpu/s390/stubGenerator_s390.cpp @@ -1924,7 +1924,7 @@ class StubGenerator: public StubCodeGenerator { if (multiBlock) { // Process everything from offset to limit. // The following description is valid if we get a raw (unpimped) source data buffer, - // spanning the range between [srcOff(Z_ARG3), srcLimit(Z_ARG4)). As detailled above, + // spanning the range between [srcOff(Z_ARG3), srcLimit(Z_ARG4)). As detailed above, // the calling convention for these stubs is different. We leave the description in // to inform the reader what must be happening hidden in the calling code. // @@ -2004,7 +2004,7 @@ class StubGenerator: public StubCodeGenerator { if (multiBlock) { // Process everything from offset to limit. // The following description is valid if we get a raw (unpimped) source data buffer, - // spanning the range between [srcOff(Z_ARG3), srcLimit(Z_ARG4)). As detailled above, + // spanning the range between [srcOff(Z_ARG3), srcLimit(Z_ARG4)). As detailed above, // the calling convention for these stubs is different. We leave the description in // to inform the reader what must be happening hidden in the calling code. // @@ -2084,7 +2084,7 @@ class StubGenerator: public StubCodeGenerator { if (multiBlock) { // Process everything from offset to limit. // The following description is valid if we get a raw (unpimped) source data buffer, - // spanning the range between [srcOff(Z_ARG3), srcLimit(Z_ARG4)). As detailled above, + // spanning the range between [srcOff(Z_ARG3), srcLimit(Z_ARG4)). As detailed above, // the calling convention for these stubs is different. We leave the description in // to inform the reader what must be happening hidden in the calling code. // diff --git a/src/hotspot/cpu/s390/templateInterpreterGenerator_s390.cpp b/src/hotspot/cpu/s390/templateInterpreterGenerator_s390.cpp index d960cf94395..f8a2d30c364 100644 --- a/src/hotspot/cpu/s390/templateInterpreterGenerator_s390.cpp +++ b/src/hotspot/cpu/s390/templateInterpreterGenerator_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -342,7 +342,7 @@ address TemplateInterpreterGenerator::generate_slow_signature_handler() { __ add2reg(arg_c, BytesPerWord); __ z_bru(loop_start); - // Method exit, all arguments proocessed. + // Method exit, all arguments processed. __ bind(loop_end); __ z_lmg(Z_R10, Z_R13, frame::z_abi_160_size, Z_SP); // restore registers before frame is popped. __ pop_frame(); diff --git a/src/hotspot/cpu/s390/templateTable_s390.cpp b/src/hotspot/cpu/s390/templateTable_s390.cpp index 064cfc6e3a3..d86efbe0b1c 100644 --- a/src/hotspot/cpu/s390/templateTable_s390.cpp +++ b/src/hotspot/cpu/s390/templateTable_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -4152,7 +4152,7 @@ void TemplateTable::monitorenter() { // Increment bcp to point to the next bytecode, so exception // handling for async. exceptions work correctly. - // The object has already been poped from the stack, so the + // The object has already been popped from the stack, so the // expression stack looks correct. __ add2reg(Z_bcp, 1, Z_bcp); diff --git a/src/hotspot/cpu/x86/abstractInterpreter_x86.cpp b/src/hotspot/cpu/x86/abstractInterpreter_x86.cpp index 9b994c85e5a..fef137257b0 100644 --- a/src/hotspot/cpu/x86/abstractInterpreter_x86.cpp +++ b/src/hotspot/cpu/x86/abstractInterpreter_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -44,7 +44,7 @@ int AbstractInterpreter::size_activation(int max_stack, int overhead = frame::sender_sp_offset - frame::interpreter_frame_initial_sp_offset; // Our locals were accounted for by the caller (or last_frame_adjust - // on the transistion) Since the callee parameters already account + // on the transition) Since the callee parameters already account // for the callee's params we only need to account for the extra // locals. int size = overhead + diff --git a/src/hotspot/cpu/x86/assembler_x86.cpp b/src/hotspot/cpu/x86/assembler_x86.cpp index 42815a3d143..8502953e870 100644 --- a/src/hotspot/cpu/x86/assembler_x86.cpp +++ b/src/hotspot/cpu/x86/assembler_x86.cpp @@ -359,7 +359,7 @@ bool Assembler::query_compressed_disp_byte(int disp, bool is_evex_inst, int vect int cur_tuple_type, int in_size_in_bits, int cur_encoding) { int mod_idx = 0; // We will test if the displacement fits the compressed format and if so - // apply the compression to the displacment iff the result is8bit. + // apply the compression to the displacement iff the result is8bit. if (VM_Version::supports_evex() && is_evex_inst) { switch (cur_tuple_type) { case EVEX_FV: @@ -444,7 +444,7 @@ bool Assembler::query_compressed_disp_byte(int disp, bool is_evex_inst, int vect bool Assembler::emit_compressed_disp_byte(int &disp) { int mod_idx = 0; // We will test if the displacement fits the compressed format and if so - // apply the compression to the displacment iff the result is8bit. + // apply the compression to the displacement iff the result is8bit. if (VM_Version::supports_evex() && _attributes && _attributes->is_evex_instruction()) { int evex_encoding = _attributes->get_evex_encoding(); int tuple_type = _attributes->get_tuple_type(); @@ -1047,7 +1047,7 @@ address Assembler::locate_operand(address inst, WhichOperand which) { assert(ip == inst+1, "no prefixes allowed"); // no EVEX collisions, all instructions that have 0x62 opcodes // have EVEX versions and are subopcodes of 0x66 - ip++; // skip P0 and exmaine W in P1 + ip++; // skip P0 and examine W in P1 is_64bit = ((VEX_W & *ip) == VEX_W); ip++; // move to P2 ip++; // skip P2, move to opcode @@ -1765,7 +1765,7 @@ void Assembler::cmpxchgb(Register reg, Address adr) { // cmpxchg void Assembler::comisd(XMMRegister dst, Address src) { // NOTE: dbx seems to decode this as comiss even though the - // 0x66 is there. Strangly ucomisd comes out correct + // 0x66 is there. Strangely ucomisd comes out correct NOT_LP64(assert(VM_Version::supports_sse2(), "")); InstructionMark im(this); InstructionAttr attributes(AVX_128bit, /* rex_w */ VM_Version::supports_evex(), /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);; @@ -3592,7 +3592,7 @@ void Assembler::nop(int i) { // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 while(i >= 15) { - // For Intel don't generate consecutive addess nops (mix with regular nops) + // For Intel don't generate consecutive address nops (mix with regular nops) i -= 15; emit_int24(0x66, 0x66, 0x66); addr_nop_8(); @@ -3762,7 +3762,7 @@ void Assembler::nop(int i) { // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 while (i >= 15) { - // For ZX don't generate consecutive addess nops (mix with regular nops) + // For ZX don't generate consecutive address nops (mix with regular nops) i -= 15; emit_int24(0x66, 0x66, 0x66); addr_nop_8(); @@ -5298,7 +5298,7 @@ void Assembler::rep_stos() { NOT_LP64( emit_int16((unsigned char)0xF3, (unsigned char)0xAB);) } -// scans rcx pointer sized words at [edi] for occurance of rax, +// scans rcx pointer sized words at [edi] for occurrence of rax, // generic void Assembler::repne_scan() { // repne_scan // SCASQ @@ -5307,7 +5307,7 @@ void Assembler::repne_scan() { // repne_scan } #ifdef _LP64 -// scans rcx 4 byte words at [edi] for occurance of rax, +// scans rcx 4 byte words at [edi] for occurrence of rax, // generic void Assembler::repne_scanl() { // repne_scan // SCASL diff --git a/src/hotspot/cpu/x86/assembler_x86.hpp b/src/hotspot/cpu/x86/assembler_x86.hpp index f219b60d743..3f03f91aeec 100644 --- a/src/hotspot/cpu/x86/assembler_x86.hpp +++ b/src/hotspot/cpu/x86/assembler_x86.hpp @@ -136,7 +136,7 @@ REGISTER_DECLARATION(Register, r12_heapbase, r12); // callee-saved REGISTER_DECLARATION(Register, r15_thread, r15); // callee-saved #else -// rscratch1 will apear in 32bit code that is dead but of course must compile +// rscratch1 will appear in 32bit code that is dead but of course must compile // Using noreg ensures if the dead code is incorrectly live and executed it // will cause an assertion failure #define rscratch1 noreg @@ -388,7 +388,7 @@ class AddressLiteral { friend class LIR_Assembler; }; -// Convience classes +// Convenience classes class RuntimeAddress: public AddressLiteral { public: @@ -442,7 +442,7 @@ class ArrayAddress { class InstructionAttr; -// 64-bit refect the fxsave size which is 512 bytes and the new xsave area on EVEX which is another 2176 bytes +// 64-bit reflect the fxsave size which is 512 bytes and the new xsave area on EVEX which is another 2176 bytes // See fxsave and xsave(EVEX enabled) documentation for layout const int FPUStateSizeInWords = NOT_LP64(27) LP64_ONLY(2688 / wordSize); @@ -2818,7 +2818,7 @@ public: // Set the instruction to be encoded in AVX mode void set_is_legacy_mode(void) { _legacy_mode = true; } - // Set the current instuction to be encoded as an EVEX instuction + // Set the current instruction to be encoded as an EVEX instruction void set_is_evex_instruction(void) { _is_evex_instruction = true; } // Internal encoding data used in compressed immediate offset programming @@ -2828,7 +2828,7 @@ public: // This method unsets it so that merge semantics are used instead. void reset_is_clear_context(void) { _is_clear_context = false; } - // Map back to current asembler so that we can manage object level assocation + // Map back to current assembler so that we can manage object level association void set_current_assembler(Assembler *current_assembler) { _current_assembler = current_assembler; } // Address modifiers used for compressed displacement calculation diff --git a/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp b/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp index 9619a7711e9..a7fa837cda6 100644 --- a/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp +++ b/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp @@ -456,7 +456,7 @@ int LIR_Assembler::emit_unwind_handler() { __ mov(rbx, rax); // Preserve the exception (rbx is always callee-saved) } - // Preform needed unlocking + // Perform needed unlocking MonitorExitStub* stub = NULL; if (method()->is_synchronized()) { monitor_address(0, FrameMap::rax_opr); @@ -2271,7 +2271,7 @@ void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr raddr = frame_map()->address_for_slot(right->single_stack_ix()); } else if (right->is_constant()) { address const_addr = float_constant(right->as_jfloat()); - assert(const_addr != NULL, "incorrect float/double constant maintainance"); + assert(const_addr != NULL, "incorrect float/double constant maintenance"); // hack for now raddr = __ as_Address(InternalAddress(const_addr)); } else { @@ -3654,7 +3654,7 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) { } else { __ testptr(tmp, tmp); __ jcc(Assembler::notZero, update); - __ stop("unexpect null obj"); + __ stop("unexpected null obj"); #endif } diff --git a/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp b/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp index 819c36957b3..487cfa638e9 100644 --- a/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp +++ b/src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -122,7 +122,6 @@ LIR_Opr LIRGenerator::rlock_byte(BasicType type) { // i486 instructions can inline constants bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { if (type == T_SHORT || type == T_CHAR) { - // there is no immediate move of word values in asembler_i486.?pp return false; } Constant* c = v->as_Constant(); diff --git a/src/hotspot/cpu/x86/c1_LinearScan_x86.cpp b/src/hotspot/cpu/x86/c1_LinearScan_x86.cpp index 9153d1c6061..797a3527d4c 100644 --- a/src/hotspot/cpu/x86/c1_LinearScan_x86.cpp +++ b/src/hotspot/cpu/x86/c1_LinearScan_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -432,7 +432,7 @@ void FpuStackAllocator::do_push(LIR_Opr opr) { } void FpuStackAllocator::pop_if_last_use(LIR_Op* op, LIR_Opr opr) { - assert(op->fpu_pop_count() == 0, "fpu_pop_count alredy set"); + assert(op->fpu_pop_count() == 0, "fpu_pop_count already set"); assert(tos_offset(opr) == 0, "can only pop stack top"); if (opr->is_last_use()) { @@ -442,7 +442,7 @@ void FpuStackAllocator::pop_if_last_use(LIR_Op* op, LIR_Opr opr) { } void FpuStackAllocator::pop_always(LIR_Op* op, LIR_Opr opr) { - assert(op->fpu_pop_count() == 0, "fpu_pop_count alredy set"); + assert(op->fpu_pop_count() == 0, "fpu_pop_count already set"); assert(tos_offset(opr) == 0, "can only pop stack top"); op->set_fpu_pop_count(1); @@ -597,7 +597,7 @@ void FpuStackAllocator::handle_op1(LIR_Op1* op1) { insert_exchange(in); new_in = to_fpu_stack_top(in); - // TODO: update registes of stub + // TODO: update registers of stub } break; @@ -699,7 +699,7 @@ void FpuStackAllocator::handle_op2(LIR_Op2* op2) { insert_exchange(left); new_left = to_fpu_stack_top(left); } else { - // no exchange necessary if right is alredy on top of stack + // no exchange necessary if right is already on top of stack if (tos_offset(right) == 0) { new_left = to_fpu_stack(left); new_right = to_fpu_stack_top(right); @@ -790,7 +790,7 @@ void FpuStackAllocator::handle_opCall(LIR_OpCall* opCall) { LIR_Opr res = opCall->result_opr(); // clear fpu-stack before call - // it may contain dead values that could not have been remved by previous operations + // it may contain dead values that could not have been removed by previous operations clear_fpu_stack(LIR_OprFact::illegalOpr); assert(sim()->is_empty(), "fpu stack must be empty now"); @@ -930,7 +930,7 @@ void FpuStackAllocator::merge_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, assert(size_diff == cur_sim->stack_size() - sux_sim->stack_size(), "must be"); // stack merge algorithm: - // 1) as long as the current stack top is not in the right location (that meens + // 1) as long as the current stack top is not in the right location (that means // it should not be on the stack top), exchange it into the right location // 2) if the stack top is right, but the remaining stack is not ordered correctly, // the stack top is exchanged away to get another value on top -> diff --git a/src/hotspot/cpu/x86/c1_Runtime1_x86.cpp b/src/hotspot/cpu/x86/c1_Runtime1_x86.cpp index 1bb767994b8..d0c7e72c210 100644 --- a/src/hotspot/cpu/x86/c1_Runtime1_x86.cpp +++ b/src/hotspot/cpu/x86/c1_Runtime1_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1069,7 +1069,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); NOT_LP64(__ get_thread(thread)); - // get the instance size (size is postive so movl is fine for 64bit) + // get the instance size (size is positive so movl is fine for 64bit) __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); __ eden_allocate(thread, obj, obj_size, 0, t1, slow_path); @@ -1161,7 +1161,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) // since size is positive movl does right thing on 64bit __ movl(t1, Address(klass, Klass::layout_helper_offset())); - // since size is postive movl does right thing on 64bit + // since size is positive movl does right thing on 64bit __ movl(arr_size, length); assert(t1 == rcx, "fixed register usage"); __ shlptr(arr_size /* by t1=rcx, mod 32 */); diff --git a/src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp b/src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp index e42531415e1..e369fac8806 100644 --- a/src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp +++ b/src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp @@ -771,7 +771,7 @@ void C2_MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register t // thread needs to take no further action and can exit via the fast path (success). // If the re-acquire succeeds then pass control into the slow path. // As implemented, this latter mode is horrible because we generated more - // coherence traffic on the lock *and* artifically extended the critical section + // coherence traffic on the lock *and* artificially extended the critical section // length while by virtue of passing control into the slow path. // box is really RAX -- the following CMPXCHG depends on that binding @@ -2912,7 +2912,7 @@ void C2_MacroAssembler::stringL_indexof_char(Register str1, Register cnt1, Regis bind(SCAN_TO_16_CHAR); cmpl(cnt1, stride); - jcc(Assembler::less, SCAN_TO_CHAR_INIT);//less than 16 entires left + jcc(Assembler::less, SCAN_TO_CHAR_INIT);//less than 16 entries left if (UseAVX < 2) { movdl(vec1, ch); pxor(vec2, vec2); diff --git a/src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp b/src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp index 93c088b09b9..6de6043b2a0 100644 --- a/src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp +++ b/src/hotspot/cpu/x86/c2_MacroAssembler_x86.hpp @@ -31,7 +31,7 @@ public: Assembler::AvxVectorLen vector_length_encoding(int vlen_in_bytes); // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file. - // See full desription in macroAssembler_x86.cpp. + // See full description in macroAssembler_x86.cpp. void fast_lock(Register obj, Register box, Register tmp, Register scr, Register cx1, Register cx2, RTMLockingCounters* rtm_counters, diff --git a/src/hotspot/cpu/x86/interp_masm_x86.cpp b/src/hotspot/cpu/x86/interp_masm_x86.cpp index 34d4178b8da..5f7947ba930 100644 --- a/src/hotspot/cpu/x86/interp_masm_x86.cpp +++ b/src/hotspot/cpu/x86/interp_masm_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -181,7 +181,7 @@ void InterpreterMacroAssembler::profile_return_type(Register mdp, Register ret, // If we don't profile all invoke bytecodes we must make sure // it's a bytecode we indeed profile. We can't go back to the - // begining of the ProfileData we intend to update to check its + // beginning of the ProfileData we intend to update to check its // type because we're right after it and we don't known its // length Label do_profile; @@ -967,7 +967,7 @@ void InterpreterMacroAssembler::narrow(Register result) { // // Apply stack watermark barrier. // Unlock the receiver if this is a synchronized method. -// Unlock any Java monitors from syncronized blocks. +// Unlock any Java monitors from synchronized blocks. // Remove the activation from the stack. // // If there are locked Java monitors diff --git a/src/hotspot/cpu/x86/interp_masm_x86.hpp b/src/hotspot/cpu/x86/interp_masm_x86.hpp index a94f35426b8..425888828b5 100644 --- a/src/hotspot/cpu/x86/interp_masm_x86.hpp +++ b/src/hotspot/cpu/x86/interp_masm_x86.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -30,7 +30,7 @@ #include "oops/method.hpp" #include "runtime/frame.hpp" -// This file specializes the assember with interpreter-specific macros +// This file specializes the assembler with interpreter-specific macros typedef ByteSize (*OffsetFunction)(uint); diff --git a/src/hotspot/cpu/x86/macroAssembler_x86.cpp b/src/hotspot/cpu/x86/macroAssembler_x86.cpp index 75897580ba1..2c6af9b2b04 100644 --- a/src/hotspot/cpu/x86/macroAssembler_x86.cpp +++ b/src/hotspot/cpu/x86/macroAssembler_x86.cpp @@ -1585,7 +1585,7 @@ void MacroAssembler::call_VM_helper(Register oop_result, address entry_point, in // Calculate the value for last_Java_sp // somewhat subtle. call_VM does an intermediate call // which places a return address on the stack just under the - // stack pointer as the user finsihed with it. This allows + // stack pointer as the user finished with it. This allows // use to retrieve last_Java_pc from last_Java_sp[-1]. // On 32bit we then have to push additional args on the stack to accomplish // the actual requested call. On 64bit call_VM only can use register args @@ -4781,7 +4781,7 @@ void MacroAssembler::load_heap_oop(Register dst, Address src, Register tmp1, access_load_at(T_OBJECT, IN_HEAP | decorators, dst, src, tmp1, thread_tmp); } -// Doesn't do verfication, generates fixed size code +// Doesn't do verification, generates fixed size code void MacroAssembler::load_heap_oop_not_null(Register dst, Address src, Register tmp1, Register thread_tmp, DecoratorSet decorators) { access_load_at(T_OBJECT, IN_HEAP | IS_NOT_NULL | decorators, dst, src, tmp1, thread_tmp); @@ -6107,7 +6107,7 @@ void MacroAssembler::multiply_128_x_128_bmi2_loop(Register y, Register z, } /** - * Code for BigInteger::multiplyToLen() instrinsic. + * Code for BigInteger::multiplyToLen() intrinsic. * * rdi: x * rax: xlen @@ -6316,7 +6316,7 @@ void MacroAssembler::vectorized_mismatch(Register obja, Register objb, Register jcc(Assembler::zero, SAME_TILL_END); //bind(VECTOR64_TAIL); - // AVX512 code to compare upto 63 byte vectors. + // AVX512 code to compare up to 63 byte vectors. mov64(tmp2, 0xFFFFFFFFFFFFFFFF); shlxq(tmp2, tmp2, tmp1); notq(tmp2); @@ -6597,7 +6597,7 @@ void MacroAssembler::multiply_add_64(Register sum, Register op1, Register op2, R } /** - * Add 64 bit long carry into z[] with carry propogation. + * Add 64 bit long carry into z[] with carry propagation. * Preserves z and carry register values and modifies rest of registers. * */ @@ -6777,7 +6777,7 @@ void MacroAssembler::square_to_len(Register x, Register len, Register z, Registe bind(L_third_loop_exit); // Fourth loop - // Add 64 bit long carry into z with carry propogation. + // Add 64 bit long carry into z with carry propagation. // Uses offsetted zlen. add_one_64(z, zlen, carry, tmp1); @@ -7687,7 +7687,7 @@ void MacroAssembler::crc32c_rec_alt2(uint32_t const_or_pre_comp_const_index_u1, } // Set N to predefined value -// Subtract from a lenght of a buffer +// Subtract from a length of a buffer // execute in a loop: // CRC_A = 0xFFFFFFFF, CRC_B = 0, CRC_C = 0 // for i = 1 to N do @@ -8096,7 +8096,7 @@ void MacroAssembler::char_array_compress(Register src, Register dst, Register le testl(len, -32); jcc(Assembler::zero, below_threshold); - // First check whether a character is compressable ( <= 0xFF). + // First check whether a character is compressible ( <= 0xFF). // Create mask to test for Unicode chars inside zmm vector movl(result, 0x00FF); evpbroadcastw(tmp2Reg, result, Assembler::AVX_512bit); diff --git a/src/hotspot/cpu/x86/macroAssembler_x86.hpp b/src/hotspot/cpu/x86/macroAssembler_x86.hpp index 303b6b0c83c..255e6c4c975 100644 --- a/src/hotspot/cpu/x86/macroAssembler_x86.hpp +++ b/src/hotspot/cpu/x86/macroAssembler_x86.hpp @@ -540,7 +540,7 @@ public: // Push and pop everything that might be clobbered by a native // runtime call. // Only save the lower 64 bits of each vector register. - // Additonal registers can be excluded in a passed RegSet. + // Additional registers can be excluded in a passed RegSet. void push_call_clobbered_registers_except(RegSet exclude, bool save_fpu = true); void pop_call_clobbered_registers_except(RegSet exclude, bool restore_fpu = true); @@ -855,14 +855,14 @@ public: // Jumps - // NOTE: these jumps tranfer to the effective address of dst NOT + // NOTE: these jumps transfer to the effective address of dst NOT // the address contained by dst. This is because this is more natural // for jumps/calls. void jump(AddressLiteral dst); void jump_cc(Condition cc, AddressLiteral dst); // 32bit can do a case table jump in one instruction but we no longer allow the base - // to be installed in the Address class. This jump will tranfers to the address + // to be installed in the Address class. This jump will transfer to the address // contained in the location described by entry (not the address of entry) void jump(ArrayAddress entry); diff --git a/src/hotspot/cpu/x86/macroAssembler_x86_aes.cpp b/src/hotspot/cpu/x86/macroAssembler_x86_aes.cpp index 776eebaa684..425087bdd31 100644 --- a/src/hotspot/cpu/x86/macroAssembler_x86_aes.cpp +++ b/src/hotspot/cpu/x86/macroAssembler_x86_aes.cpp @@ -695,7 +695,7 @@ void MacroAssembler::avx_ghash(Register input_state, Register htbl, // Perform carryless multiplication of (H^7 * 2, data block #1) schoolbookAAD(7, htbl, data, tmp0, tmp1, tmp2, tmp3); movdqu(data, Address(input_data, 16 * 0)); - // xor data block#0 with input state before perfoming carry-less multiplication + // xor data block#0 with input state before performing carry-less multiplication vpshufb(data, data, bswap_mask, Assembler::AVX_128bit); vpxor(data, data, state, Assembler::AVX_128bit); // Perform carryless multiplication of (H^8 * 2, data block #0) @@ -1209,7 +1209,7 @@ void MacroAssembler::aesctr_encrypt(Register src_addr, Register dest_addr, Regis movdqu(Address(saved_encCounter_start, 0), xmm0); // XOR encryted block cipher in xmm0 with PT to produce CT evpxorq(xmm0, xmm0, Address(src_addr, pos, Address::times_1, 0), Assembler::AVX_128bit); - // extract upto 15 bytes of CT from xmm0 as specified by length register + // extract up to 15 bytes of CT from xmm0 as specified by length register testptr(len_reg, 8); jcc(Assembler::zero, EXTRACT_TAIL_4BYTES); pextrq(Address(dest_addr, pos), xmm0, 0); @@ -1593,7 +1593,7 @@ void MacroAssembler::ghash16_encrypt16_parallel(Register key, Register subkeyHtb cmpl(rounds, 52); jcc(Assembler::greaterEqual, AES_192); jmp(LAST_AES_RND); - // AES rounds upto 11 (AES192) or 13 (AES256) + // AES rounds up to 11 (AES192) or 13 (AES256) bind(AES_192); roundEncode(ZTMP17, ZTMP0, ZTMP1, ZTMP2, ZTMP3); ev_load_key(ZTMP18, key, 11 * 16, xmm29); @@ -1715,7 +1715,7 @@ void MacroAssembler::aesgcm_encrypt(Register in, Register len, Register ct, Regi roundEncode(ZTMP4, ZTMP5, ZTMP6, ZTMP7, ZTMP8); } ev_load_key(ZTMP4, key, 10 * 16, xmm29); - // AES rounds upto 11 (AES192) or 13 (AES256) + // AES rounds up to 11 (AES192) or 13 (AES256) cmpl(rounds, 52); jcc(Assembler::greaterEqual, AES_192); lastroundEncode(ZTMP4, ZTMP5, ZTMP6, ZTMP7, ZTMP8); diff --git a/src/hotspot/cpu/x86/matcher_x86.hpp b/src/hotspot/cpu/x86/matcher_x86.hpp index 9711bc8c2c4..9dc9066914a 100644 --- a/src/hotspot/cpu/x86/matcher_x86.hpp +++ b/src/hotspot/cpu/x86/matcher_x86.hpp @@ -129,8 +129,8 @@ #endif // Are floats converted to double when stored to stack during deoptimization? - // On x64 it is stored without convertion so we can use normal access. - // On x32 it is stored with convertion only when FPU is used for floats. + // On x64 it is stored without conversion so we can use normal access. + // On x32 it is stored with conversion only when FPU is used for floats. #ifdef _LP64 static constexpr bool float_in_double() { return false; @@ -174,7 +174,7 @@ return VM_Version::supports_evex(); } - // true means we have fast l2f convers + // true means we have fast l2f conversion // false means that conversion is done by runtime call static constexpr bool convL2FSupported(void) { return true; diff --git a/src/hotspot/cpu/x86/methodHandles_x86.cpp b/src/hotspot/cpu/x86/methodHandles_x86.cpp index 54e08ada3f1..6607bf933c6 100644 --- a/src/hotspot/cpu/x86/methodHandles_x86.cpp +++ b/src/hotspot/cpu/x86/methodHandles_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -631,7 +631,7 @@ void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adapt __ enter(); __ andptr(rsp, -16); // align stack if needed for FPU state __ pusha(); - __ mov(rbx, rsp); // for retreiving saved_regs + __ mov(rbx, rsp); // for retrieving saved_regs // Note: saved_regs must be in the entered frame for the // robust stack walking implemented in trace_method_handle_stub. diff --git a/src/hotspot/cpu/x86/nativeInst_x86.cpp b/src/hotspot/cpu/x86/nativeInst_x86.cpp index 0374a9cadea..5c29ebac315 100644 --- a/src/hotspot/cpu/x86/nativeInst_x86.cpp +++ b/src/hotspot/cpu/x86/nativeInst_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -214,8 +214,8 @@ void NativeCall::insert(address code_pos, address entry) { } // MT-safe patching of a call instruction. -// First patches first word of instruction to two jmp's that jmps to them -// selfs (spinlock). Then patches the last byte, and then atomicly replaces +// First patches first word of instruction to two jmp's that jmps to themselves +// (spinlock). Then patches the last byte, and then atomically replaces // the jmp's with the first 4 byte of the new instruction. void NativeCall::replace_mt_safe(address instr_addr, address code_buffer) { assert(Patching_lock->is_locked() || @@ -496,7 +496,7 @@ void NativeJump::check_verified_entry_alignment(address entry, address verified_ // MT safe inserting of a jump over an unknown instruction sequence (used by nmethod::makeZombie) -// The problem: jmp is a 5-byte instruction. Atomical write can be only with 4 bytes. +// The problem: jmp is a 5-byte instruction. Atomic write can be only with 4 bytes. // First patches the first word atomically to be a jump to itself. // Then patches the last byte and then atomically patches the first word (4-bytes), // thus inserting the desired jump @@ -596,8 +596,8 @@ void NativeGeneralJump::insert_unconditional(address code_pos, address entry) { // MT-safe patching of a long jump instruction. -// First patches first word of instruction to two jmp's that jmps to them -// selfs (spinlock). Then patches the last byte, and then atomicly replaces +// First patches first word of instruction to two jmp's that jmps to themselves +// (spinlock). Then patches the last byte, and then atomically replaces // the jmp's with the first 4 byte of the new instruction. void NativeGeneralJump::replace_mt_safe(address instr_addr, address code_buffer) { assert (instr_addr != NULL, "illegal address for code patching (4)"); diff --git a/src/hotspot/cpu/x86/registerMap_x86.hpp b/src/hotspot/cpu/x86/registerMap_x86.hpp index 8ab259c777c..41e8e6c0b97 100644 --- a/src/hotspot/cpu/x86/registerMap_x86.hpp +++ b/src/hotspot/cpu/x86/registerMap_x86.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -25,7 +25,7 @@ #ifndef CPU_X86_REGISTERMAP_X86_HPP #define CPU_X86_REGISTERMAP_X86_HPP -// machine-dependent implemention for register maps +// machine-dependent implementation for register maps friend class frame; private: diff --git a/src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp b/src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp index e5a46138473..f59fc21883e 100644 --- a/src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp +++ b/src/hotspot/cpu/x86/sharedRuntime_x86_32.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -965,7 +965,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm // require some stack space. We grow the current (compiled) stack, then repack // the args. We finally end in a jump to the generic interpreter entry point. // On exit from the interpreter, the interpreter will restore our SP (lest the - // compiled code, which relys solely on SP and not EBP, get sick). + // compiled code, which relies solely on SP and not EBP, get sick). address c2i_unverified_entry = __ pc(); Label skip_fixup; diff --git a/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp b/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp index 75ddae63199..4d0eaa2784c 100644 --- a/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp +++ b/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp @@ -949,7 +949,7 @@ void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); // put Method* where a c2i would expect should we end up there - // only needed becaus eof c2 resolve stubs return Method* as a result in + // only needed because eof c2 resolve stubs return Method* as a result in // rax __ mov(rax, rbx); __ jmp(r11); @@ -973,7 +973,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm // require some stack space. We grow the current (compiled) stack, then repack // the args. We finally end in a jump to the generic interpreter entry point. // On exit from the interpreter, the interpreter will restore our SP (lest the - // compiled code, which relys solely on SP and not RBP, get sick). + // compiled code, which relies solely on SP and not RBP, get sick). address c2i_unverified_entry = __ pc(); Label skip_fixup; @@ -2859,7 +2859,7 @@ SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_t // The following is basically a call_VM. However, we need the precise // address of the call in order to generate an oopmap. Hence, we do all the - // work outselves. + // work ourselves. __ set_last_Java_frame(noreg, noreg, NULL); diff --git a/src/hotspot/cpu/x86/stubGenerator_x86_32.cpp b/src/hotspot/cpu/x86/stubGenerator_x86_32.cpp index ad1230e8ca4..16f30df3d61 100644 --- a/src/hotspot/cpu/x86/stubGenerator_x86_32.cpp +++ b/src/hotspot/cpu/x86/stubGenerator_x86_32.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -3320,7 +3320,7 @@ class StubGenerator: public StubCodeGenerator { * rsp(8) - byte* buf * rsp(12) - int length * - * Ouput: + * Output: * rax - int crc result */ address generate_updateBytesCRC32() { @@ -3376,7 +3376,7 @@ class StubGenerator: public StubCodeGenerator { * rsp(16) - table_start - optional (present only when doing a library_calll, * not used by x86 algorithm) * - * Ouput: + * Output: * rax - int crc result */ address generate_updateBytesCRC32C(bool is_pclmulqdq_supported) { diff --git a/src/hotspot/cpu/x86/stubGenerator_x86_64.cpp b/src/hotspot/cpu/x86/stubGenerator_x86_64.cpp index 8eba7e40a72..05e7b30d6d1 100644 --- a/src/hotspot/cpu/x86/stubGenerator_x86_64.cpp +++ b/src/hotspot/cpu/x86/stubGenerator_x86_64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -2247,7 +2247,7 @@ class StubGenerator: public StubCodeGenerator { // // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let // the hardware handle it. The two dwords within qwords that span - // cache line boundaries will still be loaded and stored atomicly. + // cache line boundaries will still be loaded and stored atomically. // // Side Effects: // disjoint_int_copy_entry is set to the no-overlap entry point @@ -2361,7 +2361,7 @@ class StubGenerator: public StubCodeGenerator { // // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let // the hardware handle it. The two dwords within qwords that span - // cache line boundaries will still be loaded and stored atomicly. + // cache line boundaries will still be loaded and stored atomically. // address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target, address *entry, const char *name, @@ -3947,7 +3947,7 @@ class StubGenerator: public StubCodeGenerator { } else if (k == 2) { __ subptr(rsp, 10 * wordSize); __ movdqu(Address(rsp, 0), xmm15); //save last_key from xmm15 - load_key(xmm15, key, 0xd0); // 0xd0; 256-bit key goes upto 0xe0 + load_key(xmm15, key, 0xd0); // 0xd0; 256-bit key goes up to 0xe0 __ movdqu(Address(rsp, 6 * wordSize), xmm15); load_key(xmm1, key, 0xe0); // 0xe0; __ movdqu(Address(rsp, 8 * wordSize), xmm1); @@ -4039,11 +4039,11 @@ class StubGenerator: public StubCodeGenerator { __ jcc(Assembler::equal, L_exit); __ BIND(L_singleBlock_loopTopHead2[k]); if (k == 1) { - load_key(xmm_key11, key, 0xb0); // 0xb0; 192-bit key goes upto 0xc0 - load_key(xmm_key12, key, 0xc0); // 0xc0; 192-bit key goes upto 0xc0 + load_key(xmm_key11, key, 0xb0); // 0xb0; 192-bit key goes up to 0xc0 + load_key(xmm_key12, key, 0xc0); // 0xc0; 192-bit key goes up to 0xc0 } if (k == 2) { - load_key(xmm_key11, key, 0xb0); // 0xb0; 256-bit key goes upto 0xe0 + load_key(xmm_key11, key, 0xb0); // 0xb0; 256-bit key goes up to 0xe0 } __ align(OptoLoopAlignment); __ BIND(L_singleBlock_loopTop[k]); @@ -5605,7 +5605,7 @@ address generate_avx_ghash_processBlocks() { // operation (vpmulhuw) which effectively shifts c right by 6 // bits and a right by 10 bits. We similarly mask bits 10-15 // (d5..d0) and 22-27 (b5..b0) and shift them left by 8 and 4 - // bits respecively. This is done using vpmullw. We end up + // bits respectively. This is done using vpmullw. We end up // with 4 6-bit values, thus splitting the 3 input bytes, // ready for encoding: // 0 0 d5..d0 0 0 c5..c0 0 0 b5..b0 0 0 a5..a0 @@ -6482,7 +6482,7 @@ address generate_avx_ghash_processBlocks() { * c_rarg1 - byte* buf * c_rarg2 - int length * - * Ouput: + * Output: * rax - int crc result */ address generate_updateBytesCRC32() { @@ -6538,7 +6538,7 @@ address generate_avx_ghash_processBlocks() { * c_rarg3 - table_start - optional (present only when doing a library_call, * not used by x86 algorithm) * - * Ouput: + * Output: * rax - int crc result */ address generate_updateBytesCRC32C(bool is_pclmulqdq_supported) { @@ -6758,7 +6758,7 @@ address generate_avx_ghash_processBlocks() { // c_rarg0 - x address // c_rarg1 - x length // c_rarg2 - z address - // c_rarg3 - z lenth + // c_rarg3 - z length * */ address generate_squareToLen() { diff --git a/src/hotspot/cpu/x86/templateInterpreterGenerator_x86.cpp b/src/hotspot/cpu/x86/templateInterpreterGenerator_x86.cpp index 7b14aff6f1f..a1ee9d67af8 100644 --- a/src/hotspot/cpu/x86/templateInterpreterGenerator_x86.cpp +++ b/src/hotspot/cpu/x86/templateInterpreterGenerator_x86.cpp @@ -1047,7 +1047,7 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) { // It is safe to do this push because state is _thread_in_native and return address will be found // via _last_native_pc and not via _last_jave_sp - // NOTE: the order of theses push(es) is known to frame::interpreter_frame_result. + // NOTE: the order of these push(es) is known to frame::interpreter_frame_result. // If the order changes or anything else is added to the stack the code in // interpreter_frame_result will have to be changed. diff --git a/src/hotspot/cpu/x86/templateTable_x86.cpp b/src/hotspot/cpu/x86/templateTable_x86.cpp index 531ff7956b4..8b6c36365f7 100644 --- a/src/hotspot/cpu/x86/templateTable_x86.cpp +++ b/src/hotspot/cpu/x86/templateTable_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -142,7 +142,7 @@ static Assembler::Condition j_not(TemplateTable::Condition cc) { -// Miscelaneous helper routines +// Miscellaneous helper routines // Store an oop (or NULL) at the address described by obj. // If val == noreg this means store a NULL @@ -2619,7 +2619,7 @@ void TemplateTable::_return(TosState state) { // // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. ALSO reads & -// writes act as aquire & release, so: +// writes act as acquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that // happen after the read float up to before the read. It's OK for // non-volatile memory refs that happen before the volatile read to @@ -4353,7 +4353,7 @@ void TemplateTable::monitorenter() { // Increment bcp to point to the next bytecode, so exception // handling for async. exceptions work correctly. - // The object has already been poped from the stack, so the + // The object has already been popped from the stack, so the // expression stack looks correct. __ increment(rbcp); diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp index c09785b969a..41a43c7de3c 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.cpp +++ b/src/hotspot/cpu/x86/vm_version_x86.cpp @@ -408,7 +408,7 @@ class VM_Version_StubGenerator: public StubCodeGenerator { intx saved_useavx = UseAVX; intx saved_usesse = UseSSE; - // If UseAVX is unitialized or is set by the user to include EVEX + // If UseAVX is uninitialized or is set by the user to include EVEX if (use_evex) { // check _cpuid_info.sef_cpuid7_ebx.bits.avx512f __ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset()))); @@ -498,7 +498,7 @@ class VM_Version_StubGenerator: public StubCodeGenerator { VM_Version::set_cpuinfo_cont_addr(__ pc()); // Returns here after signal. Save xmm0 to check it later. - // If UseAVX is unitialized or is set by the user to include EVEX + // If UseAVX is uninitialized or is set by the user to include EVEX if (use_evex) { // check _cpuid_info.sef_cpuid7_ebx.bits.avx512f __ lea(rsi, Address(rbp, in_bytes(VM_Version::sef_cpuid7_offset()))); @@ -2142,7 +2142,7 @@ const char* const _family_id_intel[ExtendedFamilyIdLength_INTEL] = { "386", "486", "Pentium", - "Pentium Pro", //or Pentium-M/Woodcrest depeding on model + "Pentium Pro", //or Pentium-M/Woodcrest depending on model "", "", "", @@ -2257,7 +2257,7 @@ const char* const _model_id_pentium_pro[] = { NULL }; -/* Brand ID is for back compability +/* Brand ID is for back compatibility * Newer CPUs uses the extended brand string */ const char* const _brand_id[] = { "", @@ -2793,7 +2793,7 @@ int64_t VM_Version::max_qualified_cpu_freq_from_brand_string(void) { } } if (multiplier > 0) { - // Compute freqency (in Hz) from brand string. + // Compute frequency (in Hz) from brand string. if (brand_string[idx-3] == '.') { // if format is "x.xx" frequency = (brand_string[idx-4] - '0') * multiplier; frequency += (brand_string[idx-2] - '0') * multiplier / 10; diff --git a/src/hotspot/cpu/x86/vm_version_x86.hpp b/src/hotspot/cpu/x86/vm_version_x86.hpp index 2f4e31b4708..c9676d3e0b5 100644 --- a/src/hotspot/cpu/x86/vm_version_x86.hpp +++ b/src/hotspot/cpu/x86/vm_version_x86.hpp @@ -1044,7 +1044,7 @@ public: static bool supports_clflushopt() { return ((_features & CPU_FLUSHOPT) != 0); } static bool supports_clwb() { return ((_features & CPU_CLWB) != 0); } - // Old CPUs perform lea on AGU which causes additional latency transfering the + // Old CPUs perform lea on AGU which causes additional latency transferring the // value from/to ALU for other operations static bool supports_fast_2op_lea() { return (is_intel() && supports_avx()) || // Sandy Bridge and above diff --git a/src/hotspot/cpu/x86/x86.ad b/src/hotspot/cpu/x86/x86.ad index 28f55c10dc1..5f888334c9e 100644 --- a/src/hotspot/cpu/x86/x86.ad +++ b/src/hotspot/cpu/x86/x86.ad @@ -27,7 +27,7 @@ //----------REGISTER DEFINITION BLOCK------------------------------------------ // This information is used by the matcher and the register allocator to // describe individual registers and classes of registers within the target -// archtecture. +// architecture. register %{ //----------Architecture Description Register Definitions---------------------- @@ -6663,13 +6663,13 @@ instruct vshift16S_var_nobw(vec dst, vec src, vec shift, vec vtmp1, vec vtmp2, r int opcode = this->ideal_Opcode(); bool sign = (opcode != Op_URShiftVS); int vlen_enc = Assembler::AVX_256bit; - // Shift lower half, with result in vtmp2 usign vtmp1 as TEMP + // Shift lower half, with result in vtmp2 using vtmp1 as TEMP __ vextendwd(sign, $vtmp2$$XMMRegister, $src$$XMMRegister, vlen_enc); __ vpmovzxwd($vtmp1$$XMMRegister, $shift$$XMMRegister, vlen_enc); __ varshiftd(opcode, $vtmp2$$XMMRegister, $vtmp2$$XMMRegister, $vtmp1$$XMMRegister, vlen_enc); __ vpand($vtmp2$$XMMRegister, $vtmp2$$XMMRegister, ExternalAddress(vector_int_to_short_mask()), vlen_enc, $scratch$$Register); - // Shift upper half, with result in dst usign vtmp1 as TEMP + // Shift upper half, with result in dst using vtmp1 as TEMP __ vextracti128_high($dst$$XMMRegister, $src$$XMMRegister); __ vextracti128_high($vtmp1$$XMMRegister, $shift$$XMMRegister); __ vextendwd(sign, $dst$$XMMRegister, $dst$$XMMRegister, vlen_enc); diff --git a/src/hotspot/cpu/x86/x86_32.ad b/src/hotspot/cpu/x86/x86_32.ad index 22c0fd3845a..385a8ebb27e 100644 --- a/src/hotspot/cpu/x86/x86_32.ad +++ b/src/hotspot/cpu/x86/x86_32.ad @@ -3094,10 +3094,10 @@ encode %{ // Region 6-7 is determined per call site. // Note 2: If the calling convention leaves holes in the incoming argument // area, those holes are owned by SELF. Holes in the outgoing area -// are owned by the CALLEE. Holes should not be nessecary in the +// are owned by the CALLEE. Holes should not be necessary in the // incoming area, as the Java calling convention is completely under // the control of the AD file. Doubles can be sorted and packed to -// avoid holes. Holes in the outgoing arguments may be nessecary for +// avoid holes. Holes in the outgoing arguments may be necessary for // varargs C calling conventions. // Note 3: Region 0-3 is even aligned, with pad2 as needed. Region 3-5 is // even aligned with pad0 as needed. @@ -4373,7 +4373,7 @@ operand stackSlotL(sRegL reg) %{ // the flags (produced by the Cmp) specifies the coding of the comparison op // by matching a specific subtype of Bool operand below, such as cmpOpU. -// Comparision Code +// Comparison Code operand cmpOp() %{ match(Bool); @@ -12539,7 +12539,7 @@ instruct loopLimit_eReg(eAXRegI limit, nadxRegI init, immI stride, eDXRegI limit __ lneg($limit_hi$$Register, $limit$$Register); __ movl($tmp$$Register, -strd); } - // signed devision: (EAX:EDX) / pos_stride + // signed division: (EAX:EDX) / pos_stride __ idivl($tmp$$Register); if (strd < 0) { // restore sign @@ -13893,7 +13893,7 @@ instruct tlsLoadP(eRegP dst, eFlagsReg cr) %{ // // // Change (inc mov) to lea // peephole %{ -// // increment preceeded by register-register move +// // increment preceded by register-register move // peepmatch ( incI_eReg movI ); // // require that the destination register of the increment // // match the destination register of the move diff --git a/src/hotspot/cpu/x86/x86_64.ad b/src/hotspot/cpu/x86/x86_64.ad index 30865736bae..369ef5f632a 100644 --- a/src/hotspot/cpu/x86/x86_64.ad +++ b/src/hotspot/cpu/x86/x86_64.ad @@ -27,7 +27,7 @@ //----------REGISTER DEFINITION BLOCK------------------------------------------ // This information is used by the matcher and the register allocator to // describe individual registers and classes of registers within the target -// archtecture. +// architecture. register %{ //----------Architecture Description Register Definitions---------------------- @@ -2790,10 +2790,10 @@ encode %{ // Region 6-7 is determined per call site. // Note 2: If the calling convention leaves holes in the incoming argument // area, those holes are owned by SELF. Holes in the outgoing area -// are owned by the CALLEE. Holes should not be nessecary in the +// are owned by the CALLEE. Holes should not be necessary in the // incoming area, as the Java calling convention is completely under // the control of the AD file. Doubles can be sorted and packed to -// avoid holes. Holes in the outgoing arguments may be nessecary for +// avoid holes. Holes in the outgoing arguments may be necessary for // varargs C calling conventions. // Note 3: Region 0-3 is even aligned, with pad2 as needed. Region 3-5 is // even aligned with pad0 as needed. @@ -3243,7 +3243,7 @@ operand immL_32bits() interface(CONST_INTER); %} -// Int Immediate: 2^n-1, postive +// Int Immediate: 2^n-1, positive operand immI_Pow2M1() %{ predicate((n->get_int() > 0) @@ -4272,7 +4272,7 @@ operand stackSlotL(sRegL reg) // the flags (produced by the Cmp) specifies the coding of the comparison op // by matching a specific subtype of Bool operand below, such as cmpOpU. -// Comparision Code +// Comparison Code operand cmpOp() %{ match(Bool); @@ -13416,7 +13416,7 @@ instruct tlsLoadP(r15_RegP dst) %{ // // // Change (inc mov) to lea // peephole %{ -// // increment preceeded by register-register move +// // increment preceded by register-register move // peepmatch ( incI_rReg movI ); // // require that the destination register of the increment // // match the destination register of the move diff --git a/src/hotspot/cpu/zero/interp_masm_zero.hpp b/src/hotspot/cpu/zero/interp_masm_zero.hpp index a109b12dec0..475df58eb28 100644 --- a/src/hotspot/cpu/zero/interp_masm_zero.hpp +++ b/src/hotspot/cpu/zero/interp_masm_zero.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright 2007 Red Hat, Inc. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -30,7 +30,7 @@ #include "asm/macroAssembler.hpp" #include "interpreter/invocationCounter.hpp" -// This file specializes the assember with interpreter-specific macros +// This file specializes the assembler with interpreter-specific macros class InterpreterMacroAssembler : public MacroAssembler { public: diff --git a/src/hotspot/cpu/zero/interpreterRT_zero.cpp b/src/hotspot/cpu/zero/interpreterRT_zero.cpp index 3735e32b70f..59328afd731 100644 --- a/src/hotspot/cpu/zero/interpreterRT_zero.cpp +++ b/src/hotspot/cpu/zero/interpreterRT_zero.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright 2007, 2008, 2010 Red Hat, Inc. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -114,7 +114,7 @@ void InterpreterRuntime::SignatureHandlerGeneratorBase::push(BasicType type) { // For fast signature handlers the "signature handler" is generated // into a temporary buffer. It is then copied to its final location, // and pd_set_handler is called on it. We have this two stage thing -// to accomodate this. +// to accommodate this. void InterpreterRuntime::SignatureHandlerGeneratorBase::generate( uint64_t fingerprint) { diff --git a/src/hotspot/cpu/zero/registerMap_zero.hpp b/src/hotspot/cpu/zero/registerMap_zero.hpp index b7a22a376a5..d832d681b72 100644 --- a/src/hotspot/cpu/zero/registerMap_zero.hpp +++ b/src/hotspot/cpu/zero/registerMap_zero.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -25,7 +25,7 @@ #ifndef CPU_ZERO_REGISTERMAP_ZERO_HPP #define CPU_ZERO_REGISTERMAP_ZERO_HPP - // machine-dependent implemention for register maps + // machine-dependent implementation for register maps friend class frame; private: diff --git a/src/hotspot/cpu/zero/zeroInterpreter_zero.cpp b/src/hotspot/cpu/zero/zeroInterpreter_zero.cpp index f3f1327a629..84c191c64d9 100644 --- a/src/hotspot/cpu/zero/zeroInterpreter_zero.cpp +++ b/src/hotspot/cpu/zero/zeroInterpreter_zero.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright 2007, 2008, 2009, 2010, 2011 Red Hat, Inc. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -787,7 +787,7 @@ InterpreterFrame *InterpreterFrame::build(Method* const method, TRAPS) { stack->overflow_check( extra_locals + header_words + monitor_words + stack_words, CHECK_NULL); - // Adjust the caller's stack frame to accomodate any additional + // Adjust the caller's stack frame to accommodate any additional // local variables we have contiguously with our parameters. for (int i = 0; i < extra_locals; i++) stack->push(0); diff --git a/src/hotspot/os/aix/attachListener_aix.cpp b/src/hotspot/os/aix/attachListener_aix.cpp index 461b7fc874f..6ef5c44ec71 100644 --- a/src/hotspot/os/aix/attachListener_aix.cpp +++ b/src/hotspot/os/aix/attachListener_aix.cpp @@ -306,7 +306,7 @@ AixAttachOperation* AixAttachListener::read_request(int s) { str_count++; // The first string is so check it now to - // check for protocol mis-match + // check for protocol mismatch if (str_count == 1) { if ((strlen(buf) != strlen(ver_str)) || (atoi(buf) != ATTACH_PROTOCOL_VER)) { diff --git a/src/hotspot/os/aix/libperfstat_aix.hpp b/src/hotspot/os/aix/libperfstat_aix.hpp index 30f08c57a03..704c5b41a31 100644 --- a/src/hotspot/os/aix/libperfstat_aix.hpp +++ b/src/hotspot/os/aix/libperfstat_aix.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2022, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2018 SAP SE. All rights reserved. * Copyright (c) 2022, IBM Corp. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -109,8 +109,8 @@ typedef struct { /* global cpu information AIX 5.3 < TL10 */ u_longlong_t syswrite; /* number of write system calls executed */ u_longlong_t sysfork; /* number of forks system calls executed */ u_longlong_t sysexec; /* number of execs system calls executed */ - u_longlong_t readch; /* number of characters tranferred with read system call */ - u_longlong_t writech; /* number of characters tranferred with write system call */ + u_longlong_t readch; /* number of characters transferred with read system call */ + u_longlong_t writech; /* number of characters transferred with write system call */ u_longlong_t devintrs; /* number of device interrupts */ u_longlong_t softintrs; /* number of software interrupts */ time_t lbolt; /* number of ticks since last reboot */ @@ -188,8 +188,8 @@ typedef struct { /* global cpu information AIX 6.1|5.3 > TL09 */ u_longlong_t syswrite; /* number of write system calls executed */ u_longlong_t sysfork; /* number of forks system calls executed */ u_longlong_t sysexec; /* number of execs system calls executed */ - u_longlong_t readch; /* number of characters tranferred with read system call */ - u_longlong_t writech; /* number of characters tranferred with write system call */ + u_longlong_t readch; /* number of characters transferred with read system call */ + u_longlong_t writech; /* number of characters transferred with write system call */ u_longlong_t devintrs; /* number of device interrupts */ u_longlong_t softintrs; /* number of software interrupts */ time_t lbolt; /* number of ticks since last reboot */ @@ -272,8 +272,8 @@ typedef struct { /* global cpu information AIX 7.1 */ u_longlong_t syswrite; /* number of write system calls executed */ u_longlong_t sysfork; /* number of forks system calls executed */ u_longlong_t sysexec; /* number of execs system calls executed */ - u_longlong_t readch; /* number of characters tranferred with read system call */ - u_longlong_t writech; /* number of characters tranferred with write system call */ + u_longlong_t readch; /* number of characters transferred with read system call */ + u_longlong_t writech; /* number of characters transferred with write system call */ u_longlong_t devintrs; /* number of device interrupts */ u_longlong_t softintrs; /* number of software interrupts */ time_t lbolt; /* number of ticks since last reboot */ @@ -360,8 +360,8 @@ typedef struct { /* global cpu information AIX 7.2 / 6.1 TL6 (see oslevel -r) * u_longlong_t syswrite; /* number of write system calls executed */ u_longlong_t sysfork; /* number of forks system calls executed */ u_longlong_t sysexec; /* number of execs system calls executed */ - u_longlong_t readch; /* number of characters tranferred with read system call */ - u_longlong_t writech; /* number of characters tranferred with write system call */ + u_longlong_t readch; /* number of characters transferred with read system call */ + u_longlong_t writech; /* number of characters transferred with write system call */ u_longlong_t devintrs; /* number of device interrupts */ u_longlong_t softintrs; /* number of software interrupts */ time_t lbolt; /* number of ticks since last reboot */ @@ -571,7 +571,7 @@ typedef struct { /* partition total information AIX 5.3 < TL6 */ int group_id; /* identifier of the LPAR group this partition is a member of */ int pool_id; /* identifier of the shared pool of physical processors this partition is a member of */ int online_cpus; /* number of virtual CPUs currently online on the partition */ - int max_cpus; /* maximum number of virtual CPUs this parition can ever have */ + int max_cpus; /* maximum number of virtual CPUs this partition can ever have */ int min_cpus; /* minimum number of virtual CPUs this partition must have */ u_longlong_t online_memory; /* amount of memory currently online */ u_longlong_t max_memory; /* maximum amount of memory this partition can ever have */ @@ -595,7 +595,7 @@ typedef struct { /* partition total information AIX 5.3 < TL6 */ u_longlong_t invol_virt_cswitch; /* number involuntary virtual CPU context switches */ u_longlong_t vol_virt_cswitch; /* number voluntary virtual CPU context switches */ u_longlong_t timebase_last; /* most recently cpu time base */ - u_longlong_t reserved_pages; /* Currenlty number of 16GB pages. Cannot participate in DR operations */ + u_longlong_t reserved_pages; /* Currently number of 16GB pages. Cannot participate in DR operations */ u_longlong_t reserved_pagesize; /* Currently 16GB pagesize Cannot participate in DR operations */ } perfstat_partition_total_t_53_5; @@ -606,7 +606,7 @@ typedef struct { /* partition total information AIX 5.3 < TL10 */ int group_id; /* identifier of the LPAR group this partition is a member of */ int pool_id; /* identifier of the shared pool of physical processors this partition is a member of */ int online_cpus; /* number of virtual CPUs currently online on the partition */ - int max_cpus; /* maximum number of virtual CPUs this parition can ever have */ + int max_cpus; /* maximum number of virtual CPUs this partition can ever have */ int min_cpus; /* minimum number of virtual CPUs this partition must have */ u_longlong_t online_memory; /* amount of memory currently online */ u_longlong_t max_memory; /* maximum amount of memory this partition can ever have */ @@ -630,7 +630,7 @@ typedef struct { /* partition total information AIX 5.3 < TL10 */ u_longlong_t invol_virt_cswitch; /* number involuntary virtual CPU context switches */ u_longlong_t vol_virt_cswitch; /* number voluntary virtual CPU context switches */ u_longlong_t timebase_last; /* most recently cpu time base */ - u_longlong_t reserved_pages; /* Currenlty number of 16GB pages. Cannot participate in DR operations */ + u_longlong_t reserved_pages; /* Currently number of 16GB pages. Cannot participate in DR operations */ u_longlong_t reserved_pagesize; /* Currently 16GB pagesize Cannot participate in DR operations */ u_longlong_t idle_donated_purr; /* number of idle cycles donated by a dedicated partition enabled for donation */ u_longlong_t idle_donated_spurr; /* number of idle spurr cycles donated by a dedicated partition enabled for donation */ @@ -665,7 +665,7 @@ typedef struct { /* partition total information AIX 6.1|5.3 > TL09 */ int group_id; /* identifier of the LPAR group this partition is a member of */ int pool_id; /* identifier of the shared pool of physical processors this partition is a member of */ int online_cpus; /* number of virtual CPUs currently online on the partition */ - int max_cpus; /* maximum number of virtual CPUs this parition can ever have */ + int max_cpus; /* maximum number of virtual CPUs this partition can ever have */ int min_cpus; /* minimum number of virtual CPUs this partition must have */ u_longlong_t online_memory; /* amount of memory currently online */ u_longlong_t max_memory; /* maximum amount of memory this partition can ever have */ @@ -689,7 +689,7 @@ typedef struct { /* partition total information AIX 6.1|5.3 > TL09 */ u_longlong_t invol_virt_cswitch; /* number involuntary virtual CPU context switches */ u_longlong_t vol_virt_cswitch; /* number voluntary virtual CPU context switches */ u_longlong_t timebase_last; /* most recently cpu time base */ - u_longlong_t reserved_pages; /* Currenlty number of 16GB pages. Cannot participate in DR operations */ + u_longlong_t reserved_pages; /* Currently number of 16GB pages. Cannot participate in DR operations */ u_longlong_t reserved_pagesize; /* Currently 16GB pagesize Cannot participate in DR operations */ u_longlong_t idle_donated_purr; /* number of idle cycles donated by a dedicated partition enabled for donation */ u_longlong_t idle_donated_spurr; /* number of idle spurr cycles donated by a dedicated partition enabled for donation */ @@ -731,7 +731,7 @@ typedef struct { /* partition total information AIX 7.1 */ int group_id; /* identifier of the LPAR group this partition is a member of */ int pool_id; /* identifier of the shared pool of physical processors this partition is a member of */ int online_cpus; /* number of virtual CPUs currently online on the partition */ - int max_cpus; /* maximum number of virtual CPUs this parition can ever have */ + int max_cpus; /* maximum number of virtual CPUs this partition can ever have */ int min_cpus; /* minimum number of virtual CPUs this partition must have */ u_longlong_t online_memory; /* amount of memory currently online */ u_longlong_t max_memory; /* maximum amount of memory this partition can ever have */ @@ -755,7 +755,7 @@ typedef struct { /* partition total information AIX 7.1 */ u_longlong_t invol_virt_cswitch; /* number involuntary virtual CPU context switches */ u_longlong_t vol_virt_cswitch; /* number voluntary virtual CPU context switches */ u_longlong_t timebase_last; /* most recently cpu time base */ - u_longlong_t reserved_pages; /* Currenlty number of 16GB pages. Cannot participate in DR operations */ + u_longlong_t reserved_pages; /* Currently number of 16GB pages. Cannot participate in DR operations */ u_longlong_t reserved_pagesize; /* Currently 16GB pagesize Cannot participate in DR operations */ u_longlong_t idle_donated_purr; /* number of idle cycles donated by a dedicated partition enabled for donation */ u_longlong_t idle_donated_spurr; /* number of idle spurr cycles donated by a dedicated partition enabled for donation */ @@ -810,7 +810,7 @@ typedef struct { /* partition total information AIX 7.1 >= TL1*/ int group_id; /* identifier of the LPAR group this partition is a member of */ int pool_id; /* identifier of the shared pool of physical processors this partition is a member of */ int online_cpus; /* number of virtual CPUs currently online on the partition */ - int max_cpus; /* maximum number of virtual CPUs this parition can ever have */ + int max_cpus; /* maximum number of virtual CPUs this partition can ever have */ int min_cpus; /* minimum number of virtual CPUs this partition must have */ u_longlong_t online_memory; /* amount of memory currently online */ u_longlong_t max_memory; /* maximum amount of memory this partition can ever have */ @@ -834,7 +834,7 @@ typedef struct { /* partition total information AIX 7.1 >= TL1*/ u_longlong_t invol_virt_cswitch; /* number involuntary virtual CPU context switches */ u_longlong_t vol_virt_cswitch; /* number voluntary virtual CPU context switches */ u_longlong_t timebase_last; /* most recently cpu time base */ - u_longlong_t reserved_pages; /* Currenlty number of 16GB pages. Cannot participate in DR operations */ + u_longlong_t reserved_pages; /* Currently number of 16GB pages. Cannot participate in DR operations */ u_longlong_t reserved_pagesize; /* Currently 16GB pagesize Cannot participate in DR operations */ u_longlong_t idle_donated_purr; /* number of idle cycles donated by a dedicated partition enabled for donation */ u_longlong_t idle_donated_spurr; /* number of idle spurr cycles donated by a dedicated partition enabled for donation */ @@ -1034,7 +1034,7 @@ public: //////////////////////////////////////////////////////////////// // The convenience functions get_partitioninfo(), get_cpuinfo(), get_wparinfo() return - // information about partition, cpu and wpars, respectivly. They can be used without + // information about partition, cpu and wpars, respectively. They can be used without // regard for which OS release we are on. On older AIX release, some output structure // members will be 0. diff --git a/src/hotspot/os/aix/os_aix.cpp b/src/hotspot/os/aix/os_aix.cpp index c9a9e3be9f3..346afa7f6c4 100644 --- a/src/hotspot/os/aix/os_aix.cpp +++ b/src/hotspot/os/aix/os_aix.cpp @@ -1982,7 +1982,7 @@ static bool checked_mprotect(char* addr, size_t size, int prot) { // Little problem here: if SPEC1170 behaviour is off, mprotect() on AIX will // not tell me if protection failed when trying to protect an un-protectable range. // - // This means if the memory was allocated using shmget/shmat, protection wont work + // This means if the memory was allocated using shmget/shmat, protection won't work // but mprotect will still return 0: // // See http://publib.boulder.ibm.com/infocenter/pseries/v5r3/index.jsp?topic=/com.ibm.aix.basetechref/doc/basetrf1/mprotect.htm @@ -2338,7 +2338,7 @@ void os::init(void) { libperfstat::perfstat_reset(); } - // Now initialze basic system properties. Note that for some of the values we + // Now initialize basic system properties. Note that for some of the values we // need libperfstat etc. os::Aix::initialize_system_info(); @@ -2924,7 +2924,7 @@ void os::Aix::scan_environment() { char* p; int rc; - // Warn explicity if EXTSHM=ON is used. That switch changes how + // Warn explicitly if EXTSHM=ON is used. That switch changes how // System V shared memory behaves. One effect is that page size of // shared memory cannot be change dynamically, effectivly preventing // large pages from working. diff --git a/src/hotspot/os/aix/os_aix.inline.hpp b/src/hotspot/os/aix/os_aix.inline.hpp index c0ec5faa564..a15982ff925 100644 --- a/src/hotspot/os/aix/os_aix.inline.hpp +++ b/src/hotspot/os/aix/os_aix.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2018 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -36,7 +36,7 @@ inline bool os::uses_stack_guard_pages() { } // Whether or not calling code should/can commit/uncommit stack pages -// before guarding them. Answer for AIX is definitly no, because memory +// before guarding them. Answer for AIX is definitely no, because memory // is automatically committed on touch. inline bool os::must_commit_stack_guard_pages() { assert(uses_stack_guard_pages(), "sanity check"); diff --git a/src/hotspot/os/aix/porting_aix.cpp b/src/hotspot/os/aix/porting_aix.cpp index a6430007235..a7bb886de2f 100644 --- a/src/hotspot/os/aix/porting_aix.cpp +++ b/src/hotspot/os/aix/porting_aix.cpp @@ -62,7 +62,7 @@ typedef unsigned long stackslot_t; typedef stackslot_t* stackptr_t; typedef unsigned int* codeptr_t; -// Unfortunately, the interface of dladdr makes the implementator +// Unfortunately, the interface of dladdr makes the implementer // responsible for maintaining memory for function name/library // name. I guess this is because most OS's keep those values as part // of the mapped executable image ready to use. On AIX, this doesn't @@ -324,7 +324,7 @@ int dladdr(void* addr, Dl_info* info) { trcVerbose("dladdr(%p)...", p); // Note: input address may be a function. I accept both a pointer to - // the entry of a function and a pointer to the function decriptor. + // the entry of a function and a pointer to the function descriptor. // (see ppc64 ABI) found = LoadedLibraries::find_for_text_address(p, &lm); if (found) { @@ -677,7 +677,7 @@ void AixNativeCallstack::print_callstack_for_context(outputStream* st, const uco // | | // |------------| <-- cur_sp, current stack ptr // | | - // | unsused | + // | unused | // | stack | // | | // . . diff --git a/src/hotspot/os/aix/porting_aix.hpp b/src/hotspot/os/aix/porting_aix.hpp index b778c4a3561..5c02d0efa88 100644 --- a/src/hotspot/os/aix/porting_aix.hpp +++ b/src/hotspot/os/aix/porting_aix.hpp @@ -33,7 +33,7 @@ // its content is part of the os class. // Aix' own version of dladdr(). -// This function tries to mimick dladdr(3) on Linux +// This function tries to mimic dladdr(3) on Linux // (see http://linux.die.net/man/3/dladdr) // dladdr(3) is not POSIX but a GNU extension, and is not available on AIX. // diff --git a/src/hotspot/os/bsd/attachListener_bsd.cpp b/src/hotspot/os/bsd/attachListener_bsd.cpp index b8702c5aa76..395f1e44472 100644 --- a/src/hotspot/os/bsd/attachListener_bsd.cpp +++ b/src/hotspot/os/bsd/attachListener_bsd.cpp @@ -285,7 +285,7 @@ BsdAttachOperation* BsdAttachListener::read_request(int s) { str_count++; // The first string is so check it now to - // check for protocol mis-match + // check for protocol mismatch if (str_count == 1) { if ((strlen(buf) != strlen(ver_str)) || (atoi(buf) != ATTACH_PROTOCOL_VER)) { diff --git a/src/hotspot/os/bsd/os_bsd.cpp b/src/hotspot/os/bsd/os_bsd.cpp index 89e6aed8ec8..c26544be82c 100644 --- a/src/hotspot/os/bsd/os_bsd.cpp +++ b/src/hotspot/os/bsd/os_bsd.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -361,7 +361,7 @@ void os::init_system_properties_values() { // Where to look for native libraries. // // Note: Due to a legacy implementation, most of the library path - // is set in the launcher. This was to accomodate linking restrictions + // is set in the launcher. This was to accommodate linking restrictions // on legacy Bsd implementations (which are no longer supported). // Eventually, all the library path setting will be done here. // @@ -442,7 +442,7 @@ void os::init_system_properties_values() { // Where to look for native libraries. // // Note: Due to a legacy implementation, most of the library path - // is set in the launcher. This was to accomodate linking restrictions + // is set in the launcher. This was to accommodate linking restrictions // on legacy Bsd implementations (which are no longer supported). // Eventually, all the library path setting will be done here. // @@ -1131,7 +1131,7 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) { IA32, AMD64, IA64, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K #endif - // Identify compatability class for VM's architecture and library's architecture + // Identify compatibility class for VM's architecture and library's architecture // Obtain string descriptions for architectures arch_t lib_arch={elf_head.e_machine,0,elf_head.e_ident[EI_CLASS], elf_head.e_ident[EI_DATA], NULL}; diff --git a/src/hotspot/os/bsd/semaphore_bsd.cpp b/src/hotspot/os/bsd/semaphore_bsd.cpp index 742790fa896..849dafb36ee 100644 --- a/src/hotspot/os/bsd/semaphore_bsd.cpp +++ b/src/hotspot/os/bsd/semaphore_bsd.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -84,7 +84,7 @@ bool OSXSemaphore::timedwait(int64_t millis) { kr = semaphore_timedwait(_semaphore, waitspec); while (kr == KERN_ABORTED) { - // reduce the timout and try again + // reduce the timeout and try again int64_t totalwait = millis_to_nanos(millis); int64_t current = os::javaTimeNanos(); int64_t passedtime = current - starttime; diff --git a/src/hotspot/os/linux/attachListener_linux.cpp b/src/hotspot/os/linux/attachListener_linux.cpp index a6ab0ae8c94..f51734f658c 100644 --- a/src/hotspot/os/linux/attachListener_linux.cpp +++ b/src/hotspot/os/linux/attachListener_linux.cpp @@ -285,7 +285,7 @@ LinuxAttachOperation* LinuxAttachListener::read_request(int s) { str_count++; // The first string is so check it now to - // check for protocol mis-match + // check for protocol mismatch if (str_count == 1) { if ((strlen(buf) != strlen(ver_str)) || (atoi(buf) != ATTACH_PROTOCOL_VER)) { diff --git a/src/hotspot/os/linux/cgroupV2Subsystem_linux.cpp b/src/hotspot/os/linux/cgroupV2Subsystem_linux.cpp index 0b1bc9c6cdd..10002504e33 100644 --- a/src/hotspot/os/linux/cgroupV2Subsystem_linux.cpp +++ b/src/hotspot/os/linux/cgroupV2Subsystem_linux.cpp @@ -124,7 +124,7 @@ int CgroupV2Subsystem::cpu_period() { /* memory_usage_in_bytes * - * Return the amount of used memory used by this cgroup and decendents + * Return the amount of used memory used by this cgroup and descendents * * return: * memory usage in bytes or diff --git a/src/hotspot/os/linux/os_linux.cpp b/src/hotspot/os/linux/os_linux.cpp index cba539caf42..ddb8ba670c2 100644 --- a/src/hotspot/os/linux/os_linux.cpp +++ b/src/hotspot/os/linux/os_linux.cpp @@ -451,7 +451,7 @@ void os::init_system_properties_values() { // Where to look for native libraries. // // Note: Due to a legacy implementation, most of the library path - // is set in the launcher. This was to accomodate linking restrictions + // is set in the launcher. This was to accommodate linking restrictions // on legacy Linux implementations (which are no longer supported). // Eventually, all the library path setting will be done here. // @@ -811,7 +811,7 @@ bool os::create_thread(Thread* thread, ThreadType thr_type, // is not implemented properly. The posix standard requires adding // the size of the guard pages to the stack size, instead Linux // takes the space out of 'stacksize'. Thus we adapt the requested - // stack_size by the size of the guard pages to mimick proper + // stack_size by the size of the guard pages to mimic proper // behaviour. However, be careful not to end up with a size // of zero due to overflow. Don't add the guard page in that case. size_t guard_size = os::Linux::default_guard_size(thr_type); @@ -4032,7 +4032,7 @@ char* os::Linux::reserve_memory_special_huge_tlbfs(size_t bytes, // We only end up here when at least 1 large page can be used. // If the size is not a multiple of the large page size, we - // will mix the type of pages used, but in a decending order. + // will mix the type of pages used, but in a descending order. // Start off by reserving a range of the given size that is // properly aligned. At this point no pages are committed. If // a requested address is given it will be used and it must be diff --git a/src/hotspot/os/linux/os_perf_linux.cpp b/src/hotspot/os/linux/os_perf_linux.cpp index 8d244887d4b..5c05e7c1d4a 100644 --- a/src/hotspot/os/linux/os_perf_linux.cpp +++ b/src/hotspot/os/linux/os_perf_linux.cpp @@ -153,7 +153,7 @@ The bitmap of ignored signals. 34. sigcatch %lu - The bitmap of catched signals. + The bitmap of caught signals. 35. wchan %lu This is the "channel" in which the process is waiting. It is the address of a system call, and can be looked up in a namelist if you need diff --git a/src/hotspot/os/posix/os_posix.cpp b/src/hotspot/os/posix/os_posix.cpp index 31c1cbc3d4f..36707149a8a 100644 --- a/src/hotspot/os/posix/os_posix.cpp +++ b/src/hotspot/os/posix/os_posix.cpp @@ -1092,7 +1092,7 @@ bool os::Posix::handle_stack_overflow(JavaThread* thread, address addr, address } } #endif // ARM - // Throw a stack overflow exception. Guard pages will be reenabled + // Throw a stack overflow exception. Guard pages will be re-enabled // while unwinding the stack. overflow_state->disable_stack_yellow_reserved_zone(); *stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW); diff --git a/src/hotspot/os/posix/perfMemory_posix.cpp b/src/hotspot/os/posix/perfMemory_posix.cpp index 7fcf867b3f8..7b87931a452 100644 --- a/src/hotspot/os/posix/perfMemory_posix.cpp +++ b/src/hotspot/os/posix/perfMemory_posix.cpp @@ -695,7 +695,7 @@ static void remove_file(const char* path) { // if the file is a directory, the following unlink will fail. since // we don't expect to find directories in the user temp directory, we - // won't try to handle this situation. even if accidentially or + // won't try to handle this situation. even if accidentally or // maliciously planted, the directory's presence won't hurt anything. // RESTARTABLE(::unlink(path), result); diff --git a/src/hotspot/os/posix/signals_posix.cpp b/src/hotspot/os/posix/signals_posix.cpp index abad73bfeae..1a9d7da9158 100644 --- a/src/hotspot/os/posix/signals_posix.cpp +++ b/src/hotspot/os/posix/signals_posix.cpp @@ -401,7 +401,7 @@ static bool call_chained_handler(struct sigaction *actp, int sig, return false; } else if (actp->sa_handler != SIG_IGN) { if ((actp->sa_flags & SA_NODEFER) == 0) { - // automaticlly block the signal + // automatically block the signal sigaddset(&(actp->sa_mask), sig); } diff --git a/src/hotspot/os/posix/vmError_posix.cpp b/src/hotspot/os/posix/vmError_posix.cpp index 2e49c5360a2..6d35dcde3b6 100644 --- a/src/hotspot/os/posix/vmError_posix.cpp +++ b/src/hotspot/os/posix/vmError_posix.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2018, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -59,7 +59,7 @@ void VMError::reporting_started() { void VMError::interrupt_reporting_thread() { // We misuse SIGILL here, but it does not really matter. We need // a signal which is handled by crash_handler and not likely to - // occurr during error reporting itself. + // occur during error reporting itself. ::pthread_kill(reporter_thread_id, SIGILL); } diff --git a/src/hotspot/os/windows/attachListener_windows.cpp b/src/hotspot/os/windows/attachListener_windows.cpp index 07a214d4352..8543c784ee4 100644 --- a/src/hotspot/os/windows/attachListener_windows.cpp +++ b/src/hotspot/os/windows/attachListener_windows.cpp @@ -193,7 +193,7 @@ int Win32AttachListener::enqueue(char* cmd, char* arg0, char* arg1, char* arg2, } } - // check that all paramteres to the operation + // check that all parameters to the operation if (strlen(cmd) > AttachOperation::name_length_max) return ATTACH_ERROR_ILLEGALARG; if (strlen(arg0) > AttachOperation::arg_length_max) return ATTACH_ERROR_ILLEGALARG; if (strlen(arg1) > AttachOperation::arg_length_max) return ATTACH_ERROR_ILLEGALARG; diff --git a/src/hotspot/os/windows/gc/z/zMapper_windows.cpp b/src/hotspot/os/windows/gc/z/zMapper_windows.cpp index 8b77b5bca44..94fe83c10b4 100644 --- a/src/hotspot/os/windows/gc/z/zMapper_windows.cpp +++ b/src/hotspot/os/windows/gc/z/zMapper_windows.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -91,7 +91,7 @@ HANDLE ZMapper::create_paging_file_mapping(size_t size) { // Create mapping with SEC_RESERVE instead of SEC_COMMIT. // // We use MapViewOfFile3 for two different reasons: - // 1) When commiting memory for the created paging file + // 1) When committing memory for the created paging file // 2) When mapping a view of the memory created in (2) // // The non-platform code is only setup to deal with out-of-memory diff --git a/src/hotspot/os/windows/gc/z/zPhysicalMemoryBacking_windows.cpp b/src/hotspot/os/windows/gc/z/zPhysicalMemoryBacking_windows.cpp index 2e124092793..90c487a37e0 100644 --- a/src/hotspot/os/windows/gc/z/zPhysicalMemoryBacking_windows.cpp +++ b/src/hotspot/os/windows/gc/z/zPhysicalMemoryBacking_windows.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -125,7 +125,7 @@ public: // Given our scheme to use a large address space range this turns out to // use too much memory. // -// 2) It requires memory locking privilages, even for small pages. This +// 2) It requires memory locking privileges, even for small pages. This // has always been a requirement for large pages, and would be an extra // restriction for usage with small pages. // diff --git a/src/hotspot/os/windows/iphlp_interface.cpp b/src/hotspot/os/windows/iphlp_interface.cpp index 9aa65c1fbaf..cfbd9032e2f 100644 --- a/src/hotspot/os/windows/iphlp_interface.cpp +++ b/src/hotspot/os/windows/iphlp_interface.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -46,7 +46,7 @@ void IphlpDll::initialize(void) { return; } - // The 'A' at the end means the ANSI (not the UNICODE) vesions of the methods + // The 'A' at the end means the ANSI (not the UNICODE) versions of the methods _GetIfTable2 = (GetIfTable2_Fn)::GetProcAddress(_hModule, "GetIfTable2"); _FreeMibTable = (FreeMibTable_Fn)::GetProcAddress(_hModule, "FreeMibTable"); diff --git a/src/hotspot/os/windows/os_windows.cpp b/src/hotspot/os/windows/os_windows.cpp index 300cc41e5ed..5b4ef70cc0e 100644 --- a/src/hotspot/os/windows/os_windows.cpp +++ b/src/hotspot/os/windows/os_windows.cpp @@ -4306,7 +4306,7 @@ jint os::init_2(void) { JavaThread::set_stack_size_at_create(stack_commit_size); - // Calculate theoretical max. size of Threads to guard gainst artifical + // Calculate theoretical max. size of Threads to guard gainst artificial // out-of-memory situations, where all available address-space has been // reserved by thread stacks. assert(actual_reserve_size != 0, "Must have a stack"); @@ -4655,7 +4655,7 @@ jlong os::current_thread_cpu_time(bool user_sys_cpu_time) { } jlong os::thread_cpu_time(Thread* thread, bool user_sys_cpu_time) { - // This code is copy from clasic VM -> hpi::sysThreadCPUTime + // This code is copy from classic VM -> hpi::sysThreadCPUTime // If this function changes, os::is_thread_cpu_time_supported() should too FILETIME CreationTime; FILETIME ExitTime; @@ -4701,7 +4701,7 @@ bool os::is_thread_cpu_time_supported() { } } -// Windows does't provide a loadavg primitive so this is stubbed out for now. +// Windows doesn't provide a loadavg primitive so this is stubbed out for now. // It does have primitives (PDH API) to get CPU usage and run queue length. // "\\Processor(_Total)\\% Processor Time", "\\System\\Processor Queue Length" // If we wanted to implement loadavg on Windows, we have a few options: @@ -5267,7 +5267,7 @@ bool os::pd_unmap_memory(char* addr, size_t bytes) { // Instead, executable region was allocated using VirtualAlloc(). See // pd_map_memory() above. // - // The following flags should match the 'exec_access' flages used for + // The following flags should match the 'exec_access' flags used for // VirtualProtect() in pd_map_memory(). if (mem_info.Protect == PAGE_EXECUTE_READ || mem_info.Protect == PAGE_EXECUTE_READWRITE) { @@ -5487,7 +5487,7 @@ int os::PlatformEvent::park(jlong Millis) { _Event = 0; // see comment at end of os::PlatformEvent::park() below: OrderAccess::fence(); - // If we encounter a nearly simultanous timeout expiry and unpark() + // If we encounter a nearly simultaneous timeout expiry and unpark() // we return OS_OK indicating we awoke via unpark(). // Implementor's license -- returning OS_TIMEOUT would be equally valid, however. return (v >= 0) ? OS_OK : OS_TIMEOUT; diff --git a/src/hotspot/os/windows/os_windows.hpp b/src/hotspot/os/windows/os_windows.hpp index a195af2c6d1..fa5da09480e 100644 --- a/src/hotspot/os/windows/os_windows.hpp +++ b/src/hotspot/os/windows/os_windows.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -125,7 +125,7 @@ class win32 { static bool find_mapping(address p, mapping_info_t* mapping_info); #ifndef _WIN64 - // A wrapper to install a structured exception handler for fast JNI accesors. + // A wrapper to install a structured exception handler for fast JNI accessors. static address fast_jni_accessor_wrapper(BasicType); #endif diff --git a/src/hotspot/os/windows/pdh_interface.cpp b/src/hotspot/os/windows/pdh_interface.cpp index 93cefa86994..85b238b8a5b 100644 --- a/src/hotspot/os/windows/pdh_interface.cpp +++ b/src/hotspot/os/windows/pdh_interface.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -60,7 +60,7 @@ void PdhDll::initialize(void) { if (NULL == _hModule) { return; } - // The 'A' at the end means the ANSI (not the UNICODE) vesions of the methods + // The 'A' at the end means the ANSI (not the UNICODE) versions of the methods _PdhAddCounter = (PdhAddCounter_Fn)::GetProcAddress(_hModule, "PdhAddCounterA"); _PdhOpenQuery = (PdhOpenQuery_Fn)::GetProcAddress(_hModule, "PdhOpenQueryA"); _PdhCloseQuery = (PdhCloseQuery_Fn)::GetProcAddress(_hModule, "PdhCloseQuery"); diff --git a/src/hotspot/os/windows/perfMemory_windows.cpp b/src/hotspot/os/windows/perfMemory_windows.cpp index 0a53a94957c..2aaf7bc772e 100644 --- a/src/hotspot/os/windows/perfMemory_windows.cpp +++ b/src/hotspot/os/windows/perfMemory_windows.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -143,9 +143,9 @@ static void save_memory_to_file(char* addr, size_t size) { // user specific directory and the backing store file be stored in either a // RAM based file system or a local disk based file system. Network based // file systems are not recommended for performance reasons. In addition, -// use of SMB network based file systems may result in unsuccesful cleanup +// use of SMB network based file systems may result in unsuccessful cleanup // of the disk based resource on exit of the VM. The Windows TMP and TEMP -// environement variables, as used by the GetTempPath() Win32 API (see +// environment variables, as used by the GetTempPath() Win32 API (see // os::get_temp_directory() in os_win32.cpp), control the location of the // user specific directory and the shared memory backing store file. @@ -1546,7 +1546,7 @@ static size_t sharedmem_filesize(const char* filename, TRAPS) { // // on win95/98/me, _stat returns a file size of 0 bytes, but on // winnt/2k the appropriate file size is returned. support for - // the sharable aspects of performance counters was abandonded + // the shareable aspects of performance counters was abandoned // on the non-nt win32 platforms due to this and other api // inconsistencies // diff --git a/src/hotspot/os_cpu/aix_ppc/thread_aix_ppc.cpp b/src/hotspot/os_cpu/aix_ppc/thread_aix_ppc.cpp index 44c7baebd79..63a1c76cb57 100644 --- a/src/hotspot/os_cpu/aix_ppc/thread_aix_ppc.cpp +++ b/src/hotspot/os_cpu/aix_ppc/thread_aix_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2014 SAP SE. All rights reserved. * Copyright (c) 2022, IBM Corp. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -35,7 +35,7 @@ frame JavaThread::pd_last_frame() { intptr_t* sp = last_Java_sp(); address pc = _anchor.last_Java_pc(); - // Last_Java_pc ist not set, if we come here from compiled code. + // Last_Java_pc is not set, if we come here from compiled code. // Assume spill slot for link register contains a suitable pc. // Should have been filled by method entry code. if (pc == NULL) diff --git a/src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp b/src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp index 0a5a2a99992..45cd77b3ba5 100644 --- a/src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp +++ b/src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2006, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved. * Copyright (c) 2021, Azul Systems, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -74,7 +74,7 @@ void VM_Version::get_os_cpu_info() { if (sysctl(hw_conf_cache_line, 2, &cache_line_size, &sysctllen, NULL, 0)) { cache_line_size = 16; } - _icache_line_size = 16; // minimal line lenght CCSIDR_EL1 can hold + _icache_line_size = 16; // minimal line length CCSIDR_EL1 can hold _dcache_line_size = cache_line_size; uint64_t dczid_el0; diff --git a/src/hotspot/os_cpu/linux_arm/macroAssembler_linux_arm_32.cpp b/src/hotspot/os_cpu/linux_arm/macroAssembler_linux_arm_32.cpp index f29096f750b..0a3968ffa70 100644 --- a/src/hotspot/os_cpu/linux_arm/macroAssembler_linux_arm_32.cpp +++ b/src/hotspot/os_cpu/linux_arm/macroAssembler_linux_arm_32.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -76,7 +76,7 @@ void MacroAssembler::atomic_cas_bool(Register oldval, Register newval, Register // with these arguments and results // // input: - // r0 = oldval, r1 = newval, r2 = ptr, lr = return adress + // r0 = oldval, r1 = newval, r2 = ptr, lr = return address // output: // r0 = 0 carry set on success // r0 != 0 carry clear on failure @@ -181,7 +181,7 @@ void MacroAssembler::atomic_cas(Register temp1, Register temp2, Register oldval, // This is a special routine at a fixed address 0xffff0fc0 // // input: - // r0 = oldval, r1 = newval, r2 = ptr, lr = return adress + // r0 = oldval, r1 = newval, r2 = ptr, lr = return address // output: // r0 = 0 carry set on success // r0 != 0 carry clear on failure @@ -270,7 +270,7 @@ void MacroAssembler::atomic_cas64(Register memval_lo, Register memval_hi, Regist // // input: // r0 = (long long *)oldval, r1 = (long long *)newval, - // r2 = ptr, lr = return adress + // r2 = ptr, lr = return address // output: // r0 = 0 carry set on success // r0 != 0 carry clear on failure diff --git a/src/hotspot/os_cpu/linux_arm/os_linux_arm.cpp b/src/hotspot/os_cpu/linux_arm/os_linux_arm.cpp index 7df65bed1ee..c47b0c4ae7c 100644 --- a/src/hotspot/os_cpu/linux_arm/os_linux_arm.cpp +++ b/src/hotspot/os_cpu/linux_arm/os_linux_arm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -273,7 +273,7 @@ bool PosixSignals::pd_hotspot_signal_handler(int sig, siginfo_t* info, if (overflow_state->in_stack_yellow_reserved_zone(addr)) { overflow_state->disable_stack_yellow_reserved_zone(); if (thread->thread_state() == _thread_in_Java) { - // Throw a stack overflow exception. Guard pages will be reenabled + // Throw a stack overflow exception. Guard pages will be re-enabled // while unwinding the stack. stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW); } else { diff --git a/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp b/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp index f1980bc0207..210989197b1 100644 --- a/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp +++ b/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -219,8 +219,8 @@ bool PosixSignals::pd_hotspot_signal_handler(int sig, siginfo_t* info, // "Instruction Storage Interrupt" is generated and 'pc' (NIP) already // contains the invalid address. Otherwise, the SIGSEGV is caused due to // load/store instruction trying to load/store from/to an invalid address - // and causing a "Data Storage Interrupt", so we inspect the intruction - // in order to extract the faulty data addresss. + // and causing a "Data Storage Interrupt", so we inspect the instruction + // in order to extract the faulty data address. address addr; if ((ucontext_get_trap(uc) & 0x0F00 /* no IRQ reply bits */) == 0x0400) { // Instruction Storage Interrupt (ISI) diff --git a/src/hotspot/os_cpu/linux_ppc/thread_linux_ppc.cpp b/src/hotspot/os_cpu/linux_ppc/thread_linux_ppc.cpp index 15f6220fc81..cddaaf1ebac 100644 --- a/src/hotspot/os_cpu/linux_ppc/thread_linux_ppc.cpp +++ b/src/hotspot/os_cpu/linux_ppc/thread_linux_ppc.cpp @@ -34,7 +34,7 @@ frame JavaThread::pd_last_frame() { intptr_t* sp = last_Java_sp(); address pc = _anchor.last_Java_pc(); - // Last_Java_pc ist not set, if we come here from compiled code. + // Last_Java_pc is not set, if we come here from compiled code. // Assume spill slot for link register contains a suitable pc. // Should have been filled by method entry code. if (pc == NULL) { diff --git a/src/hotspot/os_cpu/linux_s390/thread_linux_s390.cpp b/src/hotspot/os_cpu/linux_s390/thread_linux_s390.cpp index 3b16096784f..3e755fdf1af 100644 --- a/src/hotspot/os_cpu/linux_s390/thread_linux_s390.cpp +++ b/src/hotspot/os_cpu/linux_s390/thread_linux_s390.cpp @@ -34,7 +34,7 @@ frame JavaThread::pd_last_frame() { intptr_t* sp = last_Java_sp(); address pc = _anchor.last_Java_pc(); - // Last_Java_pc ist not set if we come here from compiled code. + // Last_Java_pc is not set if we come here from compiled code. // Assume spill slot for Z_R14 (return register) contains a suitable pc. // Should have been filled by method entry code. if (pc == NULL) { diff --git a/src/hotspot/os_cpu/windows_x86/os_windows_x86.cpp b/src/hotspot/os_cpu/windows_x86/os_windows_x86.cpp index b95706cac12..ed6537a1b49 100644 --- a/src/hotspot/os_cpu/windows_x86/os_windows_x86.cpp +++ b/src/hotspot/os_cpu/windows_x86/os_windows_x86.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -76,7 +76,7 @@ void os::os_exception_wrapper(java_call_t f, JavaValue* value, const methodHandl #ifndef AMD64 // We store the current thread in this wrapperthread location // and determine how far away this address is from the structured - // execption pointer that FS:[0] points to. This get_thread + // exception pointer that FS:[0] points to. This get_thread // code can then get the thread pointer via FS. // // Warning: This routine must NEVER be inlined since we'd end up with @@ -94,7 +94,7 @@ void os::os_exception_wrapper(java_call_t f, JavaValue* value, const methodHandl os::win32::set_thread_ptr_offset(thread_ptr_offset); } #ifdef ASSERT - // Verify that the offset hasn't changed since we initally captured + // Verify that the offset hasn't changed since we initially captured // it. This might happen if we accidentally ended up with an // inlined version of this routine. else { diff --git a/src/hotspot/share/adlc/Doc/Syntax.doc b/src/hotspot/share/adlc/Doc/Syntax.doc index f9846f6f65e..9fb64bc57a5 100644 --- a/src/hotspot/share/adlc/Doc/Syntax.doc +++ b/src/hotspot/share/adlc/Doc/Syntax.doc @@ -1,5 +1,5 @@ # -# Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved. +# Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. # # This code is free software; you can redistribute it and/or modify it @@ -139,7 +139,7 @@ D. Delimiters 1. Comments a. /* ... */ (like C code) b. // ... EOL (like C++ code) - c. Comments must be preceeded by whitespace + c. Comments must be preceded by whitespace 2. Blocks a. %{ ... %} (% just distinguishes from C++ syntax) diff --git a/src/hotspot/share/adlc/adlparse.cpp b/src/hotspot/share/adlc/adlparse.cpp index 283713bb1f8..e13a25b8a25 100644 --- a/src/hotspot/share/adlc/adlparse.cpp +++ b/src/hotspot/share/adlc/adlparse.cpp @@ -241,7 +241,7 @@ void ADLParser::instr_parse(void) { parse_err(SYNERR, "Instructions do not specify an interface\n"); } else if (!strcmp(ident, "ins_pipe")) ins_pipe_parse(*instr); - else { // Done with staticly defined parts of instruction definition + else { // Done with statically defined parts of instruction definition // Check identifier to see if it is the name of an attribute const Form *form = _globalNames[ident]; AttributeForm *attr = form ? form->is_attribute() : NULL; @@ -922,7 +922,7 @@ void ADLParser::enc_class_parse_block(EncClass* encoding, char* ec_name) { // Collect the parts of the encode description // (1) strings that are passed through to output - // (2) replacement/substitution variable, preceeded by a '$' + // (2) replacement/substitution variable, preceded by a '$' while ( (_curchar != '%') && (*(_ptr+1) != '}') ) { // (1) @@ -1558,7 +1558,7 @@ void ADLParser::pipe_parse(void) { if (!vsi_seen) parse_err(SYNERR, "\"variable_size_instruction\" or \"fixed_size_instruction\" unspecified\n"); } - else { // Done with staticly defined parts of instruction definition + else { // Done with statically defined parts of instruction definition parse_err(SYNERR, "expected one of \"resources\", \"pipe_desc\", \"pipe_class\", found \"%s\"\n", ident); return; } @@ -2863,7 +2863,7 @@ void ADLParser::ins_encode_parse_block_impl(InstructForm& inst, EncClass* encodi // Collect the parts of the encode description // (1) strings that are passed through to output - // (2) replacement/substitution variable, preceeded by a '$' + // (2) replacement/substitution variable, preceded by a '$' while ((_curchar != '%') && (*(_ptr+1) != '}')) { // (1) @@ -3329,7 +3329,7 @@ void ADLParser::constant_parse_expression(EncClass* encoding, char* ec_name) { // Collect the parts of the constant expression. // (1) strings that are passed through to output - // (2) replacement/substitution variable, preceeded by a '$' + // (2) replacement/substitution variable, preceded by a '$' while (parens_depth > 0) { if (_curchar == '(') { parens_depth++; @@ -3818,7 +3818,7 @@ FormatRule* ADLParser::format_parse(void) { // Collect the parts of the format description // (1) strings that are passed through to tty->print - // (2) replacement/substitution variable, preceeded by a '$' + // (2) replacement/substitution variable, preceded by a '$' // (3) multi-token ANSIY C style strings while ( true ) { if ( _curchar == '%' || _curchar == '\n' ) { @@ -3955,7 +3955,7 @@ FormatRule* ADLParser::template_parse(void) { // Collect the parts of the format description // (1) strings that are passed through to tty->print - // (2) replacement/substitution variable, preceeded by a '$' + // (2) replacement/substitution variable, preceded by a '$' // (3) multi-token ANSIY C style strings while ( true ) { if ( _curchar == '%' || _curchar == '\n' ) { diff --git a/src/hotspot/share/adlc/adlparse.hpp b/src/hotspot/share/adlc/adlparse.hpp index 0435144318f..609c4565607 100644 --- a/src/hotspot/share/adlc/adlparse.hpp +++ b/src/hotspot/share/adlc/adlparse.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -86,8 +86,8 @@ protected: void instr_parse(void); // Parse instruction definitions void oper_parse(void); // Parse operand definitions void opclass_parse(void); // Parse operand class definitions - void ins_attr_parse(void); // Parse instruction attrubute definitions - void op_attr_parse(void); // Parse operand attrubute definitions + void ins_attr_parse(void); // Parse instruction attribute definitions + void op_attr_parse(void); // Parse operand attribute definitions void source_parse(void); // Parse source section void source_hpp_parse(void); // Parse source_hpp section void reg_parse(void); // Parse register section diff --git a/src/hotspot/share/adlc/archDesc.cpp b/src/hotspot/share/adlc/archDesc.cpp index cd9aab9e2ed..a437dd29c75 100644 --- a/src/hotspot/share/adlc/archDesc.cpp +++ b/src/hotspot/share/adlc/archDesc.cpp @@ -1,5 +1,5 @@ // -// Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This code is free software; you can redistribute it and/or modify it @@ -445,7 +445,7 @@ void ArchDesc::build_chain_rule(OperandForm *oper) { } } else if ((oper->_matrule) && (oper->_matrule->_next)) { - // Regardles of whether the first matchrule is a chain rule, check the list + // Regardless of whether the first matchrule is a chain rule, check the list rule = oper->_matrule; do { rule = rule->_next; @@ -711,7 +711,7 @@ void ArchDesc::dump() { //------------------------------init_keywords---------------------------------- -// Load the kewords into the global name table +// Load the keywords into the global name table void ArchDesc::initKeywords(FormDict& names) { // Insert keyword strings into Global Name Table. Keywords have a NULL value // field for quick easy identification when checking identifiers. diff --git a/src/hotspot/share/adlc/archDesc.hpp b/src/hotspot/share/adlc/archDesc.hpp index f121bd68e3e..7d074a50e56 100644 --- a/src/hotspot/share/adlc/archDesc.hpp +++ b/src/hotspot/share/adlc/archDesc.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -170,14 +170,14 @@ public: // Machine dependent files, built from architecture definition ADLFILE _DFA_file; // File for definition of Matcher::DFA ADLFILE _HPP_file; // File for ArchNode class declarations - ADLFILE _CPP_file; // File for ArchNode class defintions - ADLFILE _CPP_CLONE_file; // File for MachNode/Oper clone defintions + ADLFILE _CPP_file; // File for ArchNode class definitions + ADLFILE _CPP_CLONE_file; // File for MachNode/Oper clone definitions ADLFILE _CPP_EXPAND_file; // File for MachNode expand methods - ADLFILE _CPP_FORMAT_file; // File for MachNode/Oper format defintions + ADLFILE _CPP_FORMAT_file; // File for MachNode/Oper format definitions ADLFILE _CPP_GEN_file; // File for MachNode/Oper generator methods ADLFILE _CPP_MISC_file; // File for miscellaneous MachNode/Oper tables & methods ADLFILE _CPP_PEEPHOLE_file; // File for MachNode peephole methods - ADLFILE _CPP_PIPELINE_file; // File for MachNode pipeline defintions + ADLFILE _CPP_PIPELINE_file; // File for MachNode pipeline definitions ADLFILE _VM_file; // File for constants needed in VM code ADLFILE _bug_file; // DFA debugging file @@ -265,7 +265,7 @@ public: void buildMachRegisterNumbers(FILE *fp_hpp); // Generate enumeration of machine register encodings void buildMachRegisterEncodes(FILE *fp_hpp); - // Generate Regsiter Size Array + // Generate Register Size Array void declareRegSizes(FILE *fp_hpp); // Generate Pipeline Class information void declare_pipe_classes(FILE *fp_hpp); diff --git a/src/hotspot/share/adlc/dfa.cpp b/src/hotspot/share/adlc/dfa.cpp index 5abc4365297..f4b5b0bfb92 100644 --- a/src/hotspot/share/adlc/dfa.cpp +++ b/src/hotspot/share/adlc/dfa.cpp @@ -71,7 +71,7 @@ private: const char *_constraint; public: - // cmpstr does string comparisions. hashstr computes a key. + // cmpstr does string comparisons. hashstr computes a key. ProductionState(AdlArena *arena) : _production(cmpstr, hashstr, arena) { initialize(); }; ~ProductionState() { }; diff --git a/src/hotspot/share/adlc/dict2.hpp b/src/hotspot/share/adlc/dict2.hpp index c6b7da3368a..345d210d2ad 100644 --- a/src/hotspot/share/adlc/dict2.hpp +++ b/src/hotspot/share/adlc/dict2.hpp @@ -54,7 +54,7 @@ class Dict { // Dictionary structure public: friend class DictI; // Friendly iterator function - // cmp is a key comparision routine. hash is a routine to hash a key. + // cmp is a key comparison routine. hash is a routine to hash a key. Dict( CmpKey cmp, Hash hash ); Dict( CmpKey cmp, Hash hash, AdlArena *arena ); void init(); diff --git a/src/hotspot/share/adlc/forms.hpp b/src/hotspot/share/adlc/forms.hpp index 6586ea88311..872479d677e 100644 --- a/src/hotspot/share/adlc/forms.hpp +++ b/src/hotspot/share/adlc/forms.hpp @@ -95,7 +95,7 @@ private: bool operator ==(const FormDict &d) const; // Compare dictionaries for equal public: - // cmp is a key comparision routine. hash is a routine to hash a key. + // cmp is a key comparison routine. hash is a routine to hash a key. // FormDict( CmpKey cmp, Hash hash ); FormDict( CmpKey cmp, Hash hash, AdlArena *arena ); FormDict( const FormDict & fd ); // Deep-copy guts @@ -572,7 +572,7 @@ private: bool operator ==(const ExprDict &d) const; // Compare dictionaries for equal public: - // cmp is a key comparision routine. hash is a routine to hash a key. + // cmp is a key comparison routine. hash is a routine to hash a key. ExprDict( CmpKey cmp, Hash hash, AdlArena *arena ); ~ExprDict(); diff --git a/src/hotspot/share/adlc/formssel.cpp b/src/hotspot/share/adlc/formssel.cpp index ba65dd706fb..305f002e571 100644 --- a/src/hotspot/share/adlc/formssel.cpp +++ b/src/hotspot/share/adlc/formssel.cpp @@ -1354,7 +1354,7 @@ void InstructForm::rep_var_format(FILE *fp, const char *rep_var) { } } -// Seach through operands to determine parameters unique positions. +// Search through operands to determine parameters unique positions. void InstructForm::set_unique_opnds() { uint* uniq_idx = NULL; uint nopnds = num_opnds(); diff --git a/src/hotspot/share/adlc/formssel.hpp b/src/hotspot/share/adlc/formssel.hpp index 010117db01b..c84f1bbcec6 100644 --- a/src/hotspot/share/adlc/formssel.hpp +++ b/src/hotspot/share/adlc/formssel.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -276,7 +276,7 @@ public: uint alignment() { return _alignment; } void set_alignment(uint val) { _alignment = val; } - // Seach through operands to determine operands unique positions. + // Search through operands to determine operands unique positions. void set_unique_opnds(); uint num_unique_opnds() { return _num_uniq; } uint unique_opnds_idx(int idx) { @@ -434,7 +434,7 @@ private: // blank, RegReg, RegMem, MemReg, ... NameList _encoding; // NameList _parameter; - // The parameters for each encoding are preceeded by a NameList::_signal + // The parameters for each encoding are preceded by a NameList::_signal // and follow the parameters for the previous encoding. // char *_encode; // Type of instruction encoding diff --git a/src/hotspot/share/adlc/main.cpp b/src/hotspot/share/adlc/main.cpp index 63123d0bcc9..0336209f5f9 100644 --- a/src/hotspot/share/adlc/main.cpp +++ b/src/hotspot/share/adlc/main.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -347,7 +347,7 @@ static void usage(ArchDesc& AD) printf("Usage: adlc [-doqwTs] [-#]* [-D[=]] [-U] [-c] [-h] [-a] [-v] \n"); printf(" d produce DFA debugging info\n"); printf(" o no output produced, syntax and semantic checking only\n"); - printf(" q quiet mode, supresses all non-essential messages\n"); + printf(" q quiet mode, suppresses all non-essential messages\n"); printf(" w suppress warning messages\n"); printf(" T make DFA as many subroutine calls\n"); printf(" s output which instructions are cisc-spillable\n"); diff --git a/src/hotspot/share/adlc/output_h.cpp b/src/hotspot/share/adlc/output_h.cpp index 0ca2048a765..c5d178d0d4b 100644 --- a/src/hotspot/share/adlc/output_h.cpp +++ b/src/hotspot/share/adlc/output_h.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1444,7 +1444,7 @@ void ArchDesc::declareClasses(FILE *fp) { } else if (oper->_interface->is_RegInterface() != NULL) { // make sure that a fixed format string isn't used for an - // operand which might be assiged to multiple registers. + // operand which might be assigned to multiple registers. // Otherwise the opto assembly output could be misleading. if (oper->_format->_strings.count() != 0 && !oper->is_bound_register()) { syntax_err(oper->_linenum, @@ -1648,7 +1648,7 @@ void ArchDesc::declareClasses(FILE *fp) { } if (instr->needs_constant_base() && - !instr->is_mach_constant()) { // These inherit the funcion from MachConstantNode. + !instr->is_mach_constant()) { // These inherit the function from MachConstantNode. fprintf(fp," virtual uint mach_constant_base_node_input() const { "); if (instr->is_ideal_call() != Form::invalid_type && instr->is_ideal_call() != Form::JAVA_LEAF) { @@ -2071,7 +2071,7 @@ void ArchDesc::defineStateClass(FILE *fp) { //---------------------------buildMachOperEnum--------------------------------- // Build enumeration for densely packed operands. // This enumeration is used to index into the arrays in the State objects -// that indicate cost and a successfull rule match. +// that indicate cost and a successful rule match. // Information needed to generate the ReduceOp mapping for the DFA class OutputMachOperands : public OutputMap { diff --git a/src/hotspot/share/c1/c1_FrameMap.hpp b/src/hotspot/share/c1/c1_FrameMap.hpp index 480a1082f68..a0e2562bfca 100644 --- a/src/hotspot/share/c1/c1_FrameMap.hpp +++ b/src/hotspot/share/c1/c1_FrameMap.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -58,7 +58,7 @@ class CallingConvention; // |arguments | x | monitors | spill | reserved argument area | ABI | // +----------+---+----------+-------+------------------------+-----+ // -// x = ABI area (SPARC) or return adress and link (i486) +// x = ABI area (SPARC) or return address and link (i486) // ABI = ABI area (SPARC) or nothing (i486) diff --git a/src/hotspot/share/c1/c1_GraphBuilder.cpp b/src/hotspot/share/c1/c1_GraphBuilder.cpp index 6bb39e38f69..3a00b3fe200 100644 --- a/src/hotspot/share/c1/c1_GraphBuilder.cpp +++ b/src/hotspot/share/c1/c1_GraphBuilder.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -2651,7 +2651,7 @@ Value PhiSimplifier::simplify(Value v) { } } - // sucessfully simplified phi function + // successfully simplified phi function assert(subst != NULL, "illegal phi function"); _has_substitutions = true; phi->clear(Phi::visited); diff --git a/src/hotspot/share/c1/c1_IR.cpp b/src/hotspot/share/c1/c1_IR.cpp index 78aef07b4cf..d47a713952c 100644 --- a/src/hotspot/share/c1/c1_IR.cpp +++ b/src/hotspot/share/c1/c1_IR.cpp @@ -464,7 +464,7 @@ class ComputeLinearScanOrder : public StackObj { ResourceBitMap _visited_blocks; // used for recursive processing of blocks ResourceBitMap _active_blocks; // used for recursive processing of blocks - ResourceBitMap _dominator_blocks; // temproary BitMap used for computation of dominator + ResourceBitMap _dominator_blocks; // temporary BitMap used for computation of dominator intArray _forward_branches; // number of incoming forward branches for each block BlockList _loop_end_blocks; // list of all loop end blocks collected during count_edges BitMap2D _loop_map; // two-dimensional bit set: a bit is set if a block is contained in a loop @@ -689,7 +689,7 @@ void ComputeLinearScanOrder::mark_loops() { // check for non-natural loops (loops where the loop header does not dominate -// all other loop blocks = loops with mulitple entries). +// all other loop blocks = loops with multiple entries). // such loops are ignored void ComputeLinearScanOrder::clear_non_natural_loops(BlockBegin* start_block) { for (int i = _num_loops - 1; i >= 0; i--) { @@ -822,7 +822,7 @@ int ComputeLinearScanOrder::compute_weight(BlockBegin* cur) { int cur_bit = 15; #define INC_WEIGHT_IF(condition) if ((condition)) { weight |= (1 << cur_bit); } cur_bit--; - // this is necessery for the (very rare) case that two successing blocks have + // this is necessary for the (very rare) case that two successive blocks have // the same loop depth, but a different loop index (can happen for endless loops // with exception handlers) INC_WEIGHT_IF(!cur->is_set(BlockBegin::linear_scan_loop_header_flag)); @@ -831,7 +831,7 @@ int ComputeLinearScanOrder::compute_weight(BlockBegin* cur) { // after all other blocks of the loop. INC_WEIGHT_IF(!cur->is_set(BlockBegin::linear_scan_loop_end_flag)); - // critical edge split blocks are prefered because than they have a bigger + // critical edge split blocks are preferred because than they have a bigger // proability to be completely empty INC_WEIGHT_IF(cur->is_set(BlockBegin::critical_edge_split_flag)); @@ -928,7 +928,7 @@ void ComputeLinearScanOrder::compute_order(BlockBegin* start_block) { // ignore the edge between the osr entry and its successor for processing // the osr entry block is added manually below assert(osr_entry->number_of_sux() == 1, "osr entry must have exactly one successor"); - assert(osr_entry->sux_at(0)->number_of_preds() >= 2, "sucessor of osr entry must have two predecessors (otherwise it is not present in normal control flow"); + assert(osr_entry->sux_at(0)->number_of_preds() >= 2, "successor of osr entry must have two predecessors (otherwise it is not present in normal control flow"); sux_of_osr_entry = osr_entry->sux_at(0); dec_forward_branches(sux_of_osr_entry); @@ -1136,7 +1136,7 @@ void ComputeLinearScanOrder::verify() { assert(cur->linear_scan_number() < sux->linear_scan_number(), "invalid order"); } if (cur->loop_depth() == sux->loop_depth()) { - assert(cur->loop_index() == sux->loop_index() || sux->is_set(BlockBegin::linear_scan_loop_header_flag), "successing blocks with same loop depth must have same loop index"); + assert(cur->loop_index() == sux->loop_index() || sux->is_set(BlockBegin::linear_scan_loop_header_flag), "successive blocks with same loop depth must have same loop index"); } } @@ -1148,7 +1148,7 @@ void ComputeLinearScanOrder::verify() { assert(cur->linear_scan_number() > pred->linear_scan_number(), "invalid order"); } if (cur->loop_depth() == pred->loop_depth()) { - assert(cur->loop_index() == pred->loop_index() || cur->is_set(BlockBegin::linear_scan_loop_header_flag), "successing blocks with same loop depth must have same loop index"); + assert(cur->loop_index() == pred->loop_index() || cur->is_set(BlockBegin::linear_scan_loop_header_flag), "successive blocks with same loop depth must have same loop index"); } assert(cur->dominator()->linear_scan_number() <= cur->pred_at(j)->linear_scan_number(), "dominator must be before predecessors"); diff --git a/src/hotspot/share/c1/c1_Instruction.cpp b/src/hotspot/share/c1/c1_Instruction.cpp index 75cb0c2ccd6..33aa387d1a0 100644 --- a/src/hotspot/share/c1/c1_Instruction.cpp +++ b/src/hotspot/share/c1/c1_Instruction.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -365,7 +365,7 @@ ciType* Invoke::declared_type() const { return t; } -// Implementation of Contant +// Implementation of Constant intx Constant::hash() const { if (state_before() == NULL) { switch (type()->tag()) { @@ -773,7 +773,7 @@ bool BlockBegin::try_merge(ValueStack* new_state, bool has_irreducible_loops) { set_state(new_state); } else if (existing_state->is_same(new_state)) { - TRACE_PHI(tty->print_cr("exisiting state found")); + TRACE_PHI(tty->print_cr("existing state found")); assert(existing_state->scope() == new_state->scope(), "not matching"); assert(existing_state->locals_size() == new_state->locals_size(), "not matching"); diff --git a/src/hotspot/share/c1/c1_Instruction.hpp b/src/hotspot/share/c1/c1_Instruction.hpp index 10bc7eb4fdf..e2e1e209375 100644 --- a/src/hotspot/share/c1/c1_Instruction.hpp +++ b/src/hotspot/share/c1/c1_Instruction.hpp @@ -279,7 +279,7 @@ class Instruction: public CompilationResourceObj { #ifndef PRODUCT int _printable_bci; // the bci of the instruction for printing #endif - int _use_count; // the number of instructions refering to this value (w/o prev/next); only roots can have use count = 0 or > 1 + int _use_count; // the number of instructions referring to this value (w/o prev/next); only roots can have use count = 0 or > 1 int _pin_state; // set of PinReason describing the reason for pinning ValueType* _type; // the instruction value type Instruction* _next; // the next instruction if any (NULL for BlockEnd instructions) diff --git a/src/hotspot/share/c1/c1_LIR.hpp b/src/hotspot/share/c1/c1_LIR.hpp index c3afd5553a1..5844054669c 100644 --- a/src/hotspot/share/c1/c1_LIR.hpp +++ b/src/hotspot/share/c1/c1_LIR.hpp @@ -630,7 +630,7 @@ class LIR_OprFact: public AllStatic { LIR_Opr::single_size); } - // Platform dependant. + // Platform dependent. static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/); #ifdef ARM32 @@ -776,7 +776,7 @@ class LIR_OprFact: public AllStatic { } // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as - // the index is platform independent; a double stack useing indeces 2 and 3 has always + // the index is platform independent; a double stack using indices 2 and 3 has always // index 2. static LIR_Opr stack(int index, BasicType type) { LIR_Opr res; @@ -1696,7 +1696,7 @@ class LIR_OpBranch: public LIR_Op2 { private: Label* _label; BlockBegin* _block; // if this is a branch to a block, this is the block - BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block + BlockBegin* _ublock; // if this is a float-branch, this is the unordered block CodeStub* _stub; // if this is a branch to a stub, this is the stub public: diff --git a/src/hotspot/share/c1/c1_LIRGenerator.cpp b/src/hotspot/share/c1/c1_LIRGenerator.cpp index b386b541f89..422e620be41 100644 --- a/src/hotspot/share/c1/c1_LIRGenerator.cpp +++ b/src/hotspot/share/c1/c1_LIRGenerator.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -434,7 +434,7 @@ CodeEmitInfo* LIRGenerator::state_for(Instruction* x, ValueStack* state, bool ig } else { assert((int)liveness.size() == s->locals_size(), "error in use of liveness"); for_each_local_value(s, index, value) { - assert(value->subst() == value, "missed substition"); + assert(value->subst() == value, "missed substitution"); if (liveness.at(index) && !value->type()->is_illegal()) { if (!value->is_pinned() && value->as_Constant() == NULL && value->as_Local() == NULL) { walk(value); @@ -1568,7 +1568,7 @@ void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { // // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. -// ALSO reads & writes act as aquire & release, so: +// ALSO reads & writes act as acquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that happen after // the read float up to before the read. It's OK for non-volatile memory refs // that happen before the volatile read to float down below it. diff --git a/src/hotspot/share/c1/c1_LIRGenerator.hpp b/src/hotspot/share/c1/c1_LIRGenerator.hpp index 2c26e7714fd..37417f39e09 100644 --- a/src/hotspot/share/c1/c1_LIRGenerator.hpp +++ b/src/hotspot/share/c1/c1_LIRGenerator.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -635,7 +635,7 @@ class LIRItem: public CompilationResourceObj { ValueType* type() const { return value()->type(); } LIR_Opr result() { assert(!_destroys_register || (!_result->is_register() || _result->is_virtual()), - "shouldn't use set_destroys_register with physical regsiters"); + "shouldn't use set_destroys_register with physical registers"); if (_destroys_register && _result->is_register()) { if (_new_result->is_illegal()) { _new_result = _gen->new_register(type()); diff --git a/src/hotspot/share/c1/c1_LinearScan.cpp b/src/hotspot/share/c1/c1_LinearScan.cpp index 9f0d264f2fa..e48fafe332b 100644 --- a/src/hotspot/share/c1/c1_LinearScan.cpp +++ b/src/hotspot/share/c1/c1_LinearScan.cpp @@ -268,7 +268,7 @@ void LinearScan::propagate_spill_slots() { // create a new interval with a predefined reg_num // (only used for parent intervals that are created during the building phase) Interval* LinearScan::create_interval(int reg_num) { - assert(_intervals.at(reg_num) == NULL, "overwriting exisiting interval"); + assert(_intervals.at(reg_num) == NULL, "overwriting existing interval"); Interval* interval = new Interval(reg_num); _intervals.at_put(reg_num, interval); @@ -384,7 +384,7 @@ bool LinearScan::must_store_at_definition(const Interval* i) { return i->is_split_parent() && i->spill_state() == storeAtDefinition; } -// called once before asignment of register numbers +// called once before assignment of register numbers void LinearScan::eliminate_spill_moves() { TIME_LINEAR_SCAN(timer_eliminate_spill_moves); TRACE_LINEAR_SCAN(3, tty->print_cr("***** Eliminating unnecessary spill moves")); @@ -540,8 +540,8 @@ void LinearScan::set_live_gen_kill(Value value, LIR_Op* op, BitMap& live_gen, Bi // check some asumptions about debug information assert(!value->type()->is_illegal(), "if this local is used by the interpreter it shouldn't be of indeterminate type"); - assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "asumption: Constant instructions have only constant operands"); - assert(con != NULL || opr->is_virtual(), "asumption: non-Constant instructions have only virtual operands"); + assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "assumption: Constant instructions have only constant operands"); + assert(con != NULL || opr->is_virtual(), "assumption: non-Constant instructions have only virtual operands"); if ((con == NULL || con->is_pinned()) && opr->is_register()) { assert(reg_num(opr) == opr->vreg_number() && !is_valid_reg_num(reg_numHi(opr)), "invalid optimization below"); @@ -1595,7 +1595,7 @@ void LinearScan::sort_intervals_before_allocation() { sorted_list->at_put(sorted_idx++, cur_interval); sorted_from_max = cur_interval->from(); } else { - // the asumption that the intervals are already sorted failed, + // the assumption that the intervals are already sorted failed, // so this interval must be sorted in manually int j; for (j = sorted_idx - 1; j >= 0 && cur_from < sorted_list->at(j)->from(); j--) { @@ -1743,7 +1743,7 @@ void LinearScan::resolve_collect_mappings(BlockBegin* from_block, BlockBegin* to // visit all registers where the live_at_edge bit is set for (int r = (int)live_at_edge.get_next_one_offset(0, size); r < size; r = (int)live_at_edge.get_next_one_offset(r + 1, size)) { - assert(r < num_virtual_regs(), "live information set for not exisiting interval"); + assert(r < num_virtual_regs(), "live information set for not existing interval"); assert(from_block->live_out().at(r) && to_block->live_in().at(r), "interval not live at this edge"); Interval* from_interval = interval_at_block_end(from_block, r); @@ -2829,8 +2829,8 @@ int LinearScan::append_scope_value(int op_id, Value value, GrowableArrayoperand(); Constant* con = value->as_Constant(); - assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "asumption: Constant instructions have only constant operands (or illegal if constant is optimized away)"); - assert(con != NULL || opr->is_virtual(), "asumption: non-Constant instructions have only virtual operands"); + assert(con == NULL || opr->is_virtual() || opr->is_constant() || opr->is_illegal(), "assumption: Constant instructions have only constant operands (or illegal if constant is optimized away)"); + assert(con != NULL || opr->is_virtual(), "assumption: non-Constant instructions have only virtual operands"); if (con != NULL && !con->is_pinned() && !opr->is_constant()) { // Unpinned constants may have a virtual operand for a part of the lifetime @@ -3477,7 +3477,7 @@ void LinearScan::verify_constants() { assert(value != NULL, "all intervals live across block boundaries must have Value"); assert(value->operand()->is_register() && value->operand()->is_virtual(), "value must have virtual operand"); assert(value->operand()->vreg_number() == r, "register number must match"); - // TKR assert(value->as_Constant() == NULL || value->is_pinned(), "only pinned constants can be alive accross block boundaries"); + // TKR assert(value->as_Constant() == NULL || value->is_pinned(), "only pinned constants can be alive across block boundaries"); } } } @@ -4002,7 +4002,7 @@ void MoveResolver::resolve_mappings() { Interval* to_interval = _mapping_to.at(i); if (save_to_process_move(from_interval, to_interval)) { - // this inverval can be processed because target is free + // this interval can be processed because target is free if (from_interval != NULL) { insert_move(from_interval, to_interval); unblock_registers(from_interval); @@ -4252,7 +4252,7 @@ Interval* Interval::register_hint(bool search_split_child) const { } if (_register_hint != NULL) { - assert(_register_hint->is_split_parent(), "ony split parents are valid hint registers"); + assert(_register_hint->is_split_parent(), "only split parents are valid hint registers"); if (_register_hint->assigned_reg() >= 0 && _register_hint->assigned_reg() < LinearScan::nof_regs) { return _register_hint; @@ -5165,7 +5165,7 @@ int LinearScanWalker::find_optimal_split_pos(Interval* it, int min_split_pos, in optimal_split_pos = max_split_pos; } else { - // seach optimal block boundary between min_split_pos and max_split_pos + // search optimal block boundary between min_split_pos and max_split_pos TRACE_LINEAR_SCAN(4, tty->print_cr(" moving split pos to optimal block boundary between block B%d and B%d", min_block->block_id(), max_block->block_id())); if (do_loop_optimization) { @@ -5735,7 +5735,7 @@ void LinearScanWalker::alloc_locked_reg(Interval* cur) { split_when_partial_register_available(cur, split_pos); } - // perform splitting and spilling for all affected intervalls + // perform splitting and spilling for all affected intervals split_and_spill_intersecting_intervals(reg, regHi); } } @@ -6247,7 +6247,7 @@ bool ControlFlowOptimizer::can_delete_block(BlockBegin* block) { assert(instructions->length() >= 2, "block must have label and branch"); assert(instructions->at(0)->code() == lir_label, "first instruction must always be a label"); - assert(instructions->last()->as_OpBranch() != NULL, "last instrcution must always be a branch"); + assert(instructions->last()->as_OpBranch() != NULL, "last instruction must always be a branch"); assert(instructions->last()->as_OpBranch()->cond() == lir_cond_always, "branch must be unconditional"); assert(instructions->last()->as_OpBranch()->block() == block->sux_at(0), "branch target must be the successor"); @@ -6428,7 +6428,7 @@ void ControlFlowOptimizer::delete_jumps_to_return(BlockList* code) { // // Note: the original block with only a return statement cannot be deleted completely // because the predecessors might have other (conditional) jumps to this block - // -> this may lead to unnecesary return instructions in the final code + // -> this may lead to unnecessary return instructions in the final code assert(cur_last_op->info() == NULL, "return instructions do not have debug information"); assert(block->number_of_sux() == 0 || @@ -6857,7 +6857,7 @@ void LinearScanTimers::end_method(LinearScan* allocator) { void LinearScanTimers::print(double total_time) { if (TimeLinearScan) { // correction value: sum of dummy-timer that only measures the time that - // is necesary to start and stop itself + // is necessary to start and stop itself double c = timer(timer_do_nothing)->seconds(); for (int i = 0; i < number_of_timers; i++) { diff --git a/src/hotspot/share/c1/c1_Optimizer.cpp b/src/hotspot/share/c1/c1_Optimizer.cpp index e741cf90f92..0a26084d84d 100644 --- a/src/hotspot/share/c1/c1_Optimizer.cpp +++ b/src/hotspot/share/c1/c1_Optimizer.cpp @@ -165,7 +165,7 @@ void CE_Eliminator::block_do(BlockBegin* block) { if (t_value->type()->is_float_kind()) return; // check that successor has no other phi functions but sux_phi - // this can happen when t_block or f_block contained additonal stores to local variables + // this can happen when t_block or f_block contained additional stores to local variables // that are no longer represented by explicit instructions for_each_phi_fun(sux, phi, if (phi != sux_phi) return; @@ -334,7 +334,7 @@ void Optimizer::eliminate_conditional_expressions() { CE_Eliminator ce(ir()); } -// This removes others' relation to block, but doesnt empty block's lists +// This removes others' relation to block, but doesn't empty block's lists void disconnect_from_graph(BlockBegin* block) { for (int p = 0; p < block->number_of_preds(); p++) { BlockBegin* pred = block->pred_at(p); diff --git a/src/hotspot/share/c1/c1_RangeCheckElimination.cpp b/src/hotspot/share/c1/c1_RangeCheckElimination.cpp index f5275eb9d5c..361b7fd4e90 100644 --- a/src/hotspot/share/c1/c1_RangeCheckElimination.cpp +++ b/src/hotspot/share/c1/c1_RangeCheckElimination.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -978,7 +978,7 @@ void RangeCheckEliminator::calc_bounds(BlockBegin *block, BlockBegin *loop_heade } } - // Interate over current block + // Iterate over current block InstructionList arrays; AccessIndexedList accessIndexed; Instruction *cur = block; diff --git a/src/hotspot/share/c1/c1_Runtime1.cpp b/src/hotspot/share/c1/c1_Runtime1.cpp index 03cb4a961f4..9ae102b7f8a 100644 --- a/src/hotspot/share/c1/c1_Runtime1.cpp +++ b/src/hotspot/share/c1/c1_Runtime1.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -549,7 +549,7 @@ JRT_ENTRY_NO_ASYNC(static address, exception_handler_for_pc_helper(JavaThread* c // for AbortVMOnException flag Exceptions::debug_check_abort(exception); - // Check the stack guard pages and reenable them if necessary and there is + // Check the stack guard pages and re-enable them if necessary and there is // enough space on the stack to do so. Use fast exceptions only if the guard // pages are enabled. bool guard_pages_enabled = current->stack_overflow_state()->reguard_stack_if_needed(); @@ -864,7 +864,7 @@ static Klass* resolve_field_return_klass(const methodHandle& caller, int bci, TR // If the class is being initialized the patch body is rewritten and // the patch site is rewritten to jump to being_init, instead of // patch_stub. Whenever this code is executed it checks the current -// thread against the intializing thread so other threads will enter +// thread against the initializing thread so other threads will enter // the runtime and end up blocked waiting the class to finish // initializing inside the calls to resolve_field below. The // initializing class will continue on it's way. Once the class is diff --git a/src/hotspot/share/c1/c1_globals.hpp b/src/hotspot/share/c1/c1_globals.hpp index e90aaf6536d..82538fb506b 100644 --- a/src/hotspot/share/c1/c1_globals.hpp +++ b/src/hotspot/share/c1/c1_globals.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -132,13 +132,13 @@ range(0, 128) \ \ develop(bool, EliminateBlocks, true, \ - "Eliminate unneccessary basic blocks") \ + "Eliminate unnecessary basic blocks") \ \ develop(bool, PrintBlockElimination, false, \ "Print basic block elimination") \ \ develop(bool, EliminateNullChecks, true, \ - "Eliminate unneccessary null checks") \ + "Eliminate unnecessary null checks") \ \ develop(bool, PrintNullCheckElimination, false, \ "Print null check elimination") \ diff --git a/src/hotspot/share/cds/filemap.cpp b/src/hotspot/share/cds/filemap.cpp index efa0fd8275a..0226a31a266 100644 --- a/src/hotspot/share/cds/filemap.cpp +++ b/src/hotspot/share/cds/filemap.cpp @@ -1759,7 +1759,7 @@ MapArchiveResult FileMapInfo::map_regions(int regions[], int num_regions, char* FileMapRegion* si = space_at(idx); DEBUG_ONLY(if (last_region != NULL) { // Ensure that the OS won't be able to allocate new memory spaces between any mapped - // regions, or else it would mess up the simple comparision in MetaspaceObj::is_shared(). + // regions, or else it would mess up the simple comparison in MetaspaceObj::is_shared(). assert(si->mapped_base() == last_region->mapped_end(), "must have no gaps"); } last_region = si;) diff --git a/src/hotspot/share/cds/heapShared.cpp b/src/hotspot/share/cds/heapShared.cpp index 796963be41b..f953ae55cd1 100644 --- a/src/hotspot/share/cds/heapShared.cpp +++ b/src/hotspot/share/cds/heapShared.cpp @@ -91,7 +91,7 @@ intx HeapShared::_runtime_offset_2 = 0; intx HeapShared::_runtime_offset_3 = 0; bool HeapShared::_loading_failed = false; -// Suport for mapped heap (!UseCompressedOops only) +// Support for mapped heap (!UseCompressedOops only) ptrdiff_t HeapShared::_runtime_delta = 0; // @@ -385,7 +385,7 @@ void HeapShared::archive_klass_objects() { // MyEnum::FOO. // // However, since MyEnum:: is synthetically generated by javac, there's -// no way of programatically handling this inside the Java code (as you would handle +// no way of programmatically handling this inside the Java code (as you would handle // ModuleLayer::EMPTY_LAYER, for example). // // Instead, we archive all static field of such Enum classes. At runtime, @@ -1256,7 +1256,7 @@ oop HeapShared::archive_reachable_objects_from(int level, // // 1) Java object sub-graph archiving starts from a given static field // within a Class instance (java mirror). If the static field is a -// refererence field and points to a non-null java object, proceed to +// reference field and points to a non-null java object, proceed to // the next step. // // 2) Archives the referenced java object. If an archived copy of the @@ -1271,7 +1271,7 @@ oop HeapShared::archive_reachable_objects_from(int level, // point to the current archived object. // // 5) The Klass of the current java object is added to the list of Klasses -// for loading and initialzing before any object in the archived graph can +// for loading and initializing before any object in the archived graph can // be accessed at runtime. // void HeapShared::archive_reachable_objects_from_static_field(InstanceKlass *k, diff --git a/src/hotspot/share/cds/metaspaceShared.cpp b/src/hotspot/share/cds/metaspaceShared.cpp index 10e96df575b..136965aa3ca 100644 --- a/src/hotspot/share/cds/metaspaceShared.cpp +++ b/src/hotspot/share/cds/metaspaceShared.cpp @@ -1055,7 +1055,7 @@ MapArchiveResult MetaspaceShared::map_archives(FileMapInfo* static_mapinfo, File if (dynamic_mapinfo != NULL) { // Ensure that the OS won't be able to allocate new memory spaces between the two - // archives, or else it would mess up the simple comparision in MetaspaceObj::is_shared(). + // archives, or else it would mess up the simple comparison in MetaspaceObj::is_shared(). assert(static_mapinfo->mapping_end_offset() == dynamic_mapinfo->mapping_base_offset(), "no gap"); } diff --git a/src/hotspot/share/cds/metaspaceShared.hpp b/src/hotspot/share/cds/metaspaceShared.hpp index 63c1089bd27..bbc5f1672f4 100644 --- a/src/hotspot/share/cds/metaspaceShared.hpp +++ b/src/hotspot/share/cds/metaspaceShared.hpp @@ -181,7 +181,7 @@ public: static bool use_optimized_module_handling() { return NOT_CDS(false) CDS_ONLY(_use_optimized_module_handling); } static void disable_optimized_module_handling() { _use_optimized_module_handling = false; } - // Can we use the full archived modue graph? + // Can we use the full archived module graph? static bool use_full_module_graph() NOT_CDS_RETURN_(false); static void disable_full_module_graph() { _use_full_module_graph = false; } diff --git a/src/hotspot/share/ci/ciEnv.cpp b/src/hotspot/share/ci/ciEnv.cpp index ff70023d3cf..9b0259e67b3 100644 --- a/src/hotspot/share/ci/ciEnv.cpp +++ b/src/hotspot/share/ci/ciEnv.cpp @@ -309,7 +309,7 @@ ciEnv::~ciEnv() { // Cache Jvmti state bool ciEnv::cache_jvmti_state() { VM_ENTRY_MARK; - // Get Jvmti capabilities under lock to get consistant values. + // Get Jvmti capabilities under lock to get consistent values. MutexLocker mu(JvmtiThreadState_lock); _jvmti_redefinition_count = JvmtiExport::redefinition_count(); _jvmti_can_hotswap_or_post_breakpoint = JvmtiExport::can_hotswap_or_post_breakpoint(); @@ -1614,7 +1614,7 @@ void ciEnv::find_dynamic_call_sites() { } } - // Look for MethodHandle contant pool entries + // Look for MethodHandle constant pool entries RecordLocation fp(this, "@cpi %s", ik->name()->as_quoted_ascii()); int len = pool->length(); for (int i = 0; i < len; ++i) { diff --git a/src/hotspot/share/ci/ciEnv.hpp b/src/hotspot/share/ci/ciEnv.hpp index b2e98f1dce8..997b650f12a 100644 --- a/src/hotspot/share/ci/ciEnv.hpp +++ b/src/hotspot/share/ci/ciEnv.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -334,7 +334,7 @@ public: // Reason this compilation is failing, such as "too many basic blocks". const char* failure_reason() { return _failure_reason; } - // Return state of appropriate compilability + // Return state of appropriate compatibility int compilable() { return _compilable; } const char* retry_message() const { diff --git a/src/hotspot/share/ci/ciMethodData.hpp b/src/hotspot/share/ci/ciMethodData.hpp index 783b2b8d94f..fc2cea91c8f 100644 --- a/src/hotspot/share/ci/ciMethodData.hpp +++ b/src/hotspot/share/ci/ciMethodData.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -488,7 +488,7 @@ public: // would_profile means we would like to profile this method, // meaning it's not trivial. void set_would_profile(bool p); - // Also set the numer of loops and blocks in the method. + // Also set the number of loops and blocks in the method. // Again, this is used to determine if a method is trivial. void set_compilation_stats(short loops, short blocks); // If the compiler finds a profiled type that is known statically diff --git a/src/hotspot/share/ci/ciReplay.cpp b/src/hotspot/share/ci/ciReplay.cpp index a2a249f157a..148517fc5b6 100644 --- a/src/hotspot/share/ci/ciReplay.cpp +++ b/src/hotspot/share/ci/ciReplay.cpp @@ -1383,7 +1383,7 @@ int ciReplay::replay_impl(TRAPS) { if (ReplaySuppressInitializers > 2) { // ReplaySuppressInitializers > 2 means that we want to allow // normal VM bootstrap but once we get into the replay itself - // don't allow any intializers to be run. + // don't allow any initializers to be run. ReplaySuppressInitializers = 1; } diff --git a/src/hotspot/share/ci/ciTypeFlow.hpp b/src/hotspot/share/ci/ciTypeFlow.hpp index b733a694f38..c1c30b98349 100644 --- a/src/hotspot/share/ci/ciTypeFlow.hpp +++ b/src/hotspot/share/ci/ciTypeFlow.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -368,7 +368,7 @@ public: void overwrite_local_double_long(int index) { // Invalidate the previous local if it contains first half of - // a double or long value since it's seconf half is being overwritten. + // a double or long value since its second half is being overwritten. int prev_index = index - 1; if (prev_index >= 0 && (is_double(type_at(local(prev_index))) || diff --git a/src/hotspot/share/classfile/classFileParser.cpp b/src/hotspot/share/classfile/classFileParser.cpp index 182ed43bedf..d8552e5d490 100644 --- a/src/hotspot/share/classfile/classFileParser.cpp +++ b/src/hotspot/share/classfile/classFileParser.cpp @@ -1646,7 +1646,7 @@ void ClassFileParser::parse_fields(const ClassFileStream* const cfs, CHECK); // Sometimes injected fields already exist in the Java source so // the fields array could be too long. In that case the - // fields array is trimed. Also unused slots that were reserved + // fields array is trimmed. Also unused slots that were reserved // for generic signature indexes are discarded. { int i = 0; @@ -2033,7 +2033,7 @@ AnnotationCollector::annotation_index(const ClassLoaderData* loader_data, } case VM_SYMBOL_ENUM_NAME(jdk_internal_ValueBased_signature): { if (_location != _in_class) break; // only allow for classes - if (!privileged) break; // only allow in priviledged code + if (!privileged) break; // only allow in privileged code return _jdk_internal_ValueBased; } default: { @@ -3944,7 +3944,7 @@ void ClassFileParser::create_combined_annotations(TRAPS) { // assigned to InstanceKlass being constructed. _combined_annotations = annotations; - // The annotations arrays below has been transfered the + // The annotations arrays below has been transferred the // _combined_annotations so these fields can now be cleared. _class_annotations = NULL; _class_type_annotations = NULL; @@ -4101,7 +4101,7 @@ void OopMapBlocksBuilder::compact() { return; } /* - * Since field layout sneeks in oops before values, we will be able to condense + * Since field layout sneaks in oops before values, we will be able to condense * blocks. There is potential to compact between super, own refs and values * containing refs. * diff --git a/src/hotspot/share/classfile/classLoader.cpp b/src/hotspot/share/classfile/classLoader.cpp index bf450cbf407..1bd22ce3a6d 100644 --- a/src/hotspot/share/classfile/classLoader.cpp +++ b/src/hotspot/share/classfile/classLoader.cpp @@ -1177,7 +1177,7 @@ InstanceKlass* ClassLoader::load_class(Symbol* name, bool search_append_only, TR // class is still loaded from the runtime image even if it might // appear in the _patch_mod_entries. The runtime shared class visibility // check will determine if a shared class is visible based on the runtime - // environemnt, including the runtime --patch-module setting. + // environment, including the runtime --patch-module setting. // // DynamicDumpSharedSpaces requires UseSharedSpaces to be enabled. Since --patch-module // is not supported with UseSharedSpaces, it is not supported with DynamicDumpSharedSpaces. @@ -1562,7 +1562,7 @@ void ClassLoader::create_javabase() { JavaThread* current = JavaThread::current(); // Create java.base's module entry for the boot - // class loader prior to loading j.l.Ojbect. + // class loader prior to loading j.l.Object. ClassLoaderData* null_cld = ClassLoaderData::the_null_class_loader_data(); // Get module entry table @@ -1585,7 +1585,7 @@ void ClassLoader::create_javabase() { } // Please keep following two functions at end of this file. With them placed at top or in middle of the file, -// they could get inlined by agressive compiler, an unknown trick, see bug 6966589. +// they could get inlined by aggressive compiler, an unknown trick, see bug 6966589. void PerfClassTraceTime::initialize() { if (!UsePerfData) return; diff --git a/src/hotspot/share/classfile/classLoader.hpp b/src/hotspot/share/classfile/classLoader.hpp index d2f2c6ccef1..4d0c3ce7c22 100644 --- a/src/hotspot/share/classfile/classLoader.hpp +++ b/src/hotspot/share/classfile/classLoader.hpp @@ -64,7 +64,7 @@ public: // Constructor ClassPathEntry() : _next(NULL) {} // Attempt to locate file_name through this class path entry. - // Returns a class file parsing stream if successfull. + // Returns a class file parsing stream if successful. virtual ClassFileStream* open_stream(JavaThread* current, const char* name) = 0; // Open the stream for a specific class loader virtual ClassFileStream* open_stream_for_loader(JavaThread* current, const char* name, ClassLoaderData* loader_data) { diff --git a/src/hotspot/share/classfile/classLoaderData.hpp b/src/hotspot/share/classfile/classLoaderData.hpp index 0d6defae935..278beab6db6 100644 --- a/src/hotspot/share/classfile/classLoaderData.hpp +++ b/src/hotspot/share/classfile/classLoaderData.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -119,7 +119,7 @@ class ClassLoaderData : public CHeapObj { bool _has_class_mirror_holder; // If true, CLD is dedicated to one class and that class determines // the CLDs lifecycle. For example, a non-strong hidden class. // Arrays of these classes are also assigned - // to these class loader datas. + // to these class loader data. // Remembered sets support for the oops in the class loader data. bool _modified_oops; // Card Table Equivalent @@ -311,7 +311,7 @@ class ClassLoaderData : public CHeapObj { // Also works if unloading. Klass* class_loader_klass() const { return _class_loader_klass; } - // Returns the class loader's explict name as specified during + // Returns the class loader's explicit name as specified during // construction or the class loader's qualified class name. // Works during unloading. const char* loader_name() const; diff --git a/src/hotspot/share/classfile/classLoaderHierarchyDCmd.cpp b/src/hotspot/share/classfile/classLoaderHierarchyDCmd.cpp index 161ae91880c..e30a13c520b 100644 --- a/src/hotspot/share/classfile/classLoaderHierarchyDCmd.cpp +++ b/src/hotspot/share/classfile/classLoaderHierarchyDCmd.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2018 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -360,14 +360,14 @@ public: // Attempt to fold similar nodes among this node's children. We only fold leaf nodes // (no child class loaders). - // For non-leaf nodes (class loaders with child class loaders), do this recursivly. + // For non-leaf nodes (class loaders with child class loaders), do this recursively. void fold_children() { LoaderTreeNode* node = _child; LoaderTreeNode* prev = NULL; while (node != NULL) { LoaderTreeNode* matching_node = NULL; if (node->is_leaf()) { - // Look among the preceeding node siblings for a match. + // Look among the preceding node siblings for a match. for (LoaderTreeNode* node2 = _child; node2 != node && matching_node == NULL; node2 = node2->_next) { if (node2->is_leaf() && node->can_fold_into(node2)) { diff --git a/src/hotspot/share/classfile/defaultMethods.cpp b/src/hotspot/share/classfile/defaultMethods.cpp index 4d181bdadf0..9bac172a5f2 100644 --- a/src/hotspot/share/classfile/defaultMethods.cpp +++ b/src/hotspot/share/classfile/defaultMethods.cpp @@ -585,7 +585,7 @@ void StatefulMethodFamily::record_method_and_dq_further(StateRestorerScope* scop } // Represents a location corresponding to a vtable slot for methods that -// neither the class nor any of it's ancestors provide an implementaion. +// neither the class nor any of it's ancestors provide an implementation. // Default methods may be present to fill this slot. class EmptyVtableSlot : public ResourceObj { private: diff --git a/src/hotspot/share/classfile/dictionary.cpp b/src/hotspot/share/classfile/dictionary.cpp index 9905eb4fc70..e6f027b332d 100644 --- a/src/hotspot/share/classfile/dictionary.cpp +++ b/src/hotspot/share/classfile/dictionary.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -48,7 +48,7 @@ #include "utilities/hashtable.inline.hpp" // Optimization: if any dictionary needs resizing, we set this flag, -// so that we dont't have to walk all dictionaries to check if any actually +// so that we don't have to walk all dictionaries to check if any actually // needs resizing, which is costly to do at Safepoint. bool Dictionary::_some_dictionary_needs_resizing = false; @@ -631,7 +631,7 @@ void Dictionary::verify() { ClassLoaderData* cld = loader_data(); // class loader must be present; a null class loader is the - // boostrap loader + // bootstrap loader guarantee(cld != NULL && (cld->the_null_class_loader_data() || cld->class_loader()->is_instance()), "checking type of class_loader"); diff --git a/src/hotspot/share/classfile/javaClasses.cpp b/src/hotspot/share/classfile/javaClasses.cpp index 0d0bb189d09..c0594d1fd82 100644 --- a/src/hotspot/share/classfile/javaClasses.cpp +++ b/src/hotspot/share/classfile/javaClasses.cpp @@ -2510,7 +2510,7 @@ void java_lang_Throwable::fill_in_stack_trace(Handle throwable, const methodHand assert(skip_fillInStackTrace_check, "logic error in backtrace filtering"); // skip methods of the exception class and superclasses - // This is simlar to classic VM. + // This is similar to classic VM. if (method->name() == vmSymbols::object_initializer_name() && throwable->is_a(method->method_holder())) { continue; @@ -3011,7 +3011,7 @@ void java_lang_reflect_Method::serialize_offsets(SerializeClosure* f) { Handle java_lang_reflect_Method::create(TRAPS) { assert(Universe::is_fully_initialized(), "Need to find another solution to the reflection problem"); Klass* klass = vmClasses::reflect_Method_klass(); - // This class is eagerly initialized during VM initialization, since we keep a refence + // This class is eagerly initialized during VM initialization, since we keep a reference // to one of the methods assert(InstanceKlass::cast(klass)->is_initialized(), "must be initialized"); return InstanceKlass::cast(klass)->allocate_instance_handle(THREAD); diff --git a/src/hotspot/share/classfile/moduleEntry.hpp b/src/hotspot/share/classfile/moduleEntry.hpp index 959fcac74e3..214e520518e 100644 --- a/src/hotspot/share/classfile/moduleEntry.hpp +++ b/src/hotspot/share/classfile/moduleEntry.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -55,7 +55,7 @@ class ModuleClosure; // - pointer to the java.lang.Module for this module. // - pointer to the java.security.ProtectionDomain shared by classes defined to this module. // - ClassLoaderData*, class loader of this module. -// - a growable array containg other module entries that this module can read. +// - a growable array containing other module entries that this module can read. // - a flag indicating if this module can read all unnamed modules. // // The Mutex Module_lock is shared between ModuleEntry and PackageEntry, to lock either diff --git a/src/hotspot/share/classfile/systemDictionary.cpp b/src/hotspot/share/classfile/systemDictionary.cpp index c3b9b010443..5f0b067a48a 100644 --- a/src/hotspot/share/classfile/systemDictionary.cpp +++ b/src/hotspot/share/classfile/systemDictionary.cpp @@ -1662,7 +1662,7 @@ void SystemDictionary::initialize(TRAPS) { // Constraints on class loaders. The details of the algorithm can be // found in the OOPSLA'98 paper "Dynamic Class Loading in the Java // Virtual Machine" by Sheng Liang and Gilad Bracha. The basic idea is -// that the dictionary needs to maintain a set of contraints that +// that the dictionary needs to maintain a set of constraints that // must be satisfied by all classes in the dictionary. // if defining is true, then LinkageError if already in dictionary // if initiating loader, then ok if InstanceKlass matches existing entry diff --git a/src/hotspot/share/classfile/systemDictionaryShared.cpp b/src/hotspot/share/classfile/systemDictionaryShared.cpp index 78703ddfd44..c52eed81186 100644 --- a/src/hotspot/share/classfile/systemDictionaryShared.cpp +++ b/src/hotspot/share/classfile/systemDictionaryShared.cpp @@ -171,7 +171,7 @@ InstanceKlass* SystemDictionaryShared::acquire_class_for_current_thread( // Get the package entry. PackageEntry* pkg_entry = CDSProtectionDomain::get_package_entry_from_class(ik, class_loader); - // Load and check super/interfaces, restore unsharable info + // Load and check super/interfaces, restore unshareable info InstanceKlass* shared_klass = load_shared_class(ik, class_loader, protection_domain, cfs, pkg_entry, THREAD); if (shared_klass == NULL || HAS_PENDING_EXCEPTION) { @@ -1023,7 +1023,7 @@ void SystemDictionaryShared::record_linking_constraint(Symbol* name, InstanceKla // - loader1 = X->class_loader() // - loader2 = S->class_loader() // - loader1 != loader2 - // - M's paramater(s) include an object type T + // - M's parameter(s) include an object type T // We require that // - whenever loader1 and loader2 try to // resolve the type T, they must always resolve to @@ -1105,7 +1105,7 @@ bool SystemDictionaryShared::check_linking_constraints(Thread* current, Instance log.print(" succeeded]"); } } - return true; // for all recorded constraints added successully. + return true; // for all recorded constraints added successfully. } } if (log.is_enabled()) { diff --git a/src/hotspot/share/classfile/verificationType.hpp b/src/hotspot/share/classfile/verificationType.hpp index bb578bb44ac..80eb1ca9036 100644 --- a/src/hotspot/share/classfile/verificationType.hpp +++ b/src/hotspot/share/classfile/verificationType.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -32,7 +32,7 @@ #include "runtime/signature.hpp" enum { - // As specifed in the JVM spec + // As specified in the JVM spec ITEM_Top = 0, ITEM_Integer = 1, ITEM_Float = 2, @@ -159,7 +159,7 @@ class VerificationType { assert(((uintptr_t)sh & 0x3) == 0, "Symbols must be aligned"); // If the above assert fails in the future because oop* isn't aligned, // then this type encoding system will have to change to have a tag value - // to descriminate between oops and primitives. + // to discriminate between oops and primitives. return VerificationType((uintptr_t)sh); } static VerificationType uninitialized_type(u2 bci) @@ -189,7 +189,7 @@ class VerificationType { // the 'query' types should technically return 'false' here, if we // allow this to return true, we can perform the test using only // 2 operations rather than 8 (3 masks, 3 compares and 2 logical 'ands'). - // Since noone should call this on a query type anyway, this is ok. + // Since no one should call this on a query type anyway, this is ok. assert(!is_check(), "Must not be a check type (wrong value returned)"); return ((_u._data & Category1) != Primitive); // should only return false if it's a primitive, and the category1 flag diff --git a/src/hotspot/share/classfile/verifier.cpp b/src/hotspot/share/classfile/verifier.cpp index 80825f0339f..00f248307eb 100644 --- a/src/hotspot/share/classfile/verifier.cpp +++ b/src/hotspot/share/classfile/verifier.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1219,7 +1219,7 @@ void ClassVerifier::verify_method(const methodHandle& m, TRAPS) { bad_type_msg, "aastore"); return; } - // 4938384: relaxed constraint in JVMS 3nd edition. + // 4938384: relaxed constraint in JVMS 3rd edition. no_control_flow = false; break; case Bytecodes::_pop : current_frame.pop_stack( diff --git a/src/hotspot/share/classfile/vmIntrinsics.hpp b/src/hotspot/share/classfile/vmIntrinsics.hpp index 9b375e0f14b..dd60d2dd0af 100644 --- a/src/hotspot/share/classfile/vmIntrinsics.hpp +++ b/src/hotspot/share/classfile/vmIntrinsics.hpp @@ -104,7 +104,7 @@ class methodHandle; // When adding an intrinsic for a method, please make sure to appropriately // annotate the method in the source code. The list below contains all // library intrinsics followed by bytecode intrinsics. Please also make sure to -// add the declaration of the intrinsic to the approriate section of the list. +// add the declaration of the intrinsic to the appropriate section of the list. #define VM_INTRINSICS_DO(do_intrinsic, do_class, do_name, do_signature, do_alias) \ /* (1) Library intrinsics */ \ do_intrinsic(_hashCode, java_lang_Object, hashCode_name, void_int_signature, F_RN) \ diff --git a/src/hotspot/share/code/codeHeapState.hpp b/src/hotspot/share/code/codeHeapState.hpp index 6e0f148ad44..7ce219e2d83 100644 --- a/src/hotspot/share/code/codeHeapState.hpp +++ b/src/hotspot/share/code/codeHeapState.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2018, 2019 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -204,7 +204,7 @@ struct SizeDistributionElement : public CHeapObj { //---------------- // Because we have to deal with multiple CodeHeaps, we need to // collect "global" information in a segment-specific way as well. -// Thats what the CodeHeapStat and CodeHeapStatArray are used for. +// That's what the CodeHeapStat and CodeHeapStatArray are used for. // Before a heap segment is processed, the contents of the CodeHeapStat // element is copied to the global variables (get_HeapStatGlobals). // When processing is done, the possibly modified global variables are diff --git a/src/hotspot/share/code/compiledIC.cpp b/src/hotspot/share/code/compiledIC.cpp index 8ed42270ce5..e26d27f10e8 100644 --- a/src/hotspot/share/code/compiledIC.cpp +++ b/src/hotspot/share/code/compiledIC.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -421,7 +421,7 @@ bool CompiledIC::set_to_monomorphic(CompiledICInfo& info) { // callsites. In addition ic_miss code will update a site to monomorphic if it determines // that an monomorphic call to the interpreter can now be monomorphic to compiled code. // - // In both of these cases the only thing being modifed is the jump/call target and these + // In both of these cases the only thing being modified is the jump/call target and these // transitions are mt_safe Thread *thread = Thread::current(); diff --git a/src/hotspot/share/code/compiledMethod.cpp b/src/hotspot/share/code/compiledMethod.cpp index 4e42b555d96..695906d1cba 100644 --- a/src/hotspot/share/code/compiledMethod.cpp +++ b/src/hotspot/share/code/compiledMethod.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -166,7 +166,7 @@ void CompiledMethod::clean_exception_cache() { // first ExceptionCache node that has a Klass* that is alive. That is fine, // as long as there is no concurrent cleanup of next pointers from concurrent writers. // And the concurrent writers do not clean up next pointers, only the head. - // Also note that concurent readers will walk through Klass* pointers that are not + // Also note that concurrent readers will walk through Klass* pointers that are not // alive. That does not cause ABA problems, because Klass* is deleted after // a handshake with all threads, after all stale ExceptionCaches have been // unlinked. That is also when the CodeCache::exception_cache_purge_list() @@ -455,7 +455,7 @@ bool CompiledMethod::clean_ic_if_metadata_is_dead(CompiledIC *ic) { return true; } if (ic->is_icholder_call()) { - // The only exception is compiledICHolder metdata which may + // The only exception is compiledICHolder metadata which may // yet be marked below. (We check this further below). CompiledICHolder* cichk_metdata = ic->cached_icholder(); diff --git a/src/hotspot/share/code/debugInfoRec.cpp b/src/hotspot/share/code/debugInfoRec.cpp index a356ae79c97..193c9624e57 100644 --- a/src/hotspot/share/code/debugInfoRec.cpp +++ b/src/hotspot/share/code/debugInfoRec.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -312,7 +312,7 @@ void DebugInformationRecorder::describe_scope(int pc_offset, last_pd->set_has_ea_local_in_scope(has_ea_local_in_scope); last_pd->set_arg_escape(arg_escape); - // serialize sender stream offest + // serialize sender stream offset stream()->write_int(sender_stream_offset); // serialize scope diff --git a/src/hotspot/share/code/debugInfoRec.hpp b/src/hotspot/share/code/debugInfoRec.hpp index 74ee1e35577..75073f18d3d 100644 --- a/src/hotspot/share/code/debugInfoRec.hpp +++ b/src/hotspot/share/code/debugInfoRec.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -122,7 +122,7 @@ class DebugInformationRecorder: public ResourceObj { void end_safepoint(int pc_offset) { end_scopes(pc_offset, true); } void end_non_safepoint(int pc_offset) { end_scopes(pc_offset, false); } - // helper fuctions for describe_scope to enable sharing + // helper functions for describe_scope to enable sharing DebugToken* create_scope_values(GrowableArray* values); DebugToken* create_monitor_values(GrowableArray* monitors); diff --git a/src/hotspot/share/code/dependencyContext.cpp b/src/hotspot/share/code/dependencyContext.cpp index 5778026ede7..c2197663740 100644 --- a/src/hotspot/share/code/dependencyContext.cpp +++ b/src/hotspot/share/code/dependencyContext.cpp @@ -280,7 +280,7 @@ bool DependencyContext::claim_cleanup() { // that is_unloading() will be unlinked and placed on the purge list. nmethodBucket* DependencyContext::dependencies_not_unloading() { for (;;) { - // Need acquire becase the read value could come from a concurrent insert. + // Need acquire because the read value could come from a concurrent insert. nmethodBucket* head = Atomic::load_acquire(_dependency_context_addr); if (head == NULL || !head->get_nmethod()->is_unloading()) { return head; diff --git a/src/hotspot/share/code/exceptionHandlerTable.cpp b/src/hotspot/share/code/exceptionHandlerTable.cpp index d43d18e4b2b..5299cfb1a54 100644 --- a/src/hotspot/share/code/exceptionHandlerTable.cpp +++ b/src/hotspot/share/code/exceptionHandlerTable.cpp @@ -191,7 +191,7 @@ uint ImplicitExceptionTable::continuation_offset( uint exec_off ) const { for( uint i=0; i 1 - in the midst of printing instruction stream bytes. diff --git a/src/hotspot/share/code/nmethod.hpp b/src/hotspot/share/code/nmethod.hpp index d31e62f404a..866a0a37aeb 100644 --- a/src/hotspot/share/code/nmethod.hpp +++ b/src/hotspot/share/code/nmethod.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -129,7 +129,7 @@ class nmethod : public CompiledMethod { // Unclaimed (C)-> N|SD (C)-> X|SD: the nmethod has been processed strongly from // the beginning by a single thread. // - // "|" describes the concatentation of bits in _oops_do_mark_link. + // "|" describes the concatenation of bits in _oops_do_mark_link. // // The diagram also describes the threads responsible for changing the nmethod to // the next state by marking the _transition_ with (C) and (O), which mean "current" @@ -334,7 +334,7 @@ class nmethod : public CompiledMethod { // Inform external interfaces that a compiled method has been unloaded void post_compiled_method_unload(); - // Initailize fields to their default values + // Initialize fields to their default values void init_defaults(); // Offsets diff --git a/src/hotspot/share/code/oopRecorder.hpp b/src/hotspot/share/code/oopRecorder.hpp index 6ebbb236913..b0282bdede5 100644 --- a/src/hotspot/share/code/oopRecorder.hpp +++ b/src/hotspot/share/code/oopRecorder.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -35,7 +35,7 @@ class CodeBlob; template class ValueRecorder : public StackObj { public: // A two-way mapping from positive indexes to oop handles. - // The zero index is reserved for a constant (sharable) null. + // The zero index is reserved for a constant (shareable) null. // Indexes may not be negative. // Use the given arena to manage storage, if not NULL. diff --git a/src/hotspot/share/code/relocInfo.cpp b/src/hotspot/share/code/relocInfo.cpp index 47769c53a5b..65b860c9d85 100644 --- a/src/hotspot/share/code/relocInfo.cpp +++ b/src/hotspot/share/code/relocInfo.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -187,7 +187,7 @@ void RelocIterator::set_limits(address begin, address limit) { } // At this point, either we are at the first matching record, // or else there is no such record, and !has_current(). - // In either case, revert to the immediatly preceding state. + // In either case, revert to the immediately preceding state. _current = backup; _addr = backup_addr; set_has_current(false); diff --git a/src/hotspot/share/code/relocInfo.hpp b/src/hotspot/share/code/relocInfo.hpp index 55d4ac7c62d..96f96daa99d 100644 --- a/src/hotspot/share/code/relocInfo.hpp +++ b/src/hotspot/share/code/relocInfo.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -97,7 +97,7 @@ class NativeMovConstReg; // and in fact represent not a code-stream offset but some inline data. // The data takes the form of a counted sequence of halfwords, which // precedes the actual relocation record. (Clients never see it directly.) -// The interpetation of this extra data depends on the relocation type. +// The interpretation of this extra data depends on the relocation type. // // On machines that have 32-bit immediate fields, there is usually // little need for relocation "prefix" data, because the instruction stream @@ -226,7 +226,7 @@ class NativeMovConstReg; //%note reloc_1 // // This uses 4 instruction words, 8 relocation halfwords, -// and an entry (which is sharable) in the CodeBlob's oop pool, +// and an entry (which is shareable) in the CodeBlob's oop pool, // for a total of 36 bytes. // // Note that the compiler is responsible for ensuring the "fldOffset" when @@ -414,7 +414,7 @@ class relocInfo { // Update methods for relocation information // (since code is dynamically patched, we also need to dynamically update the relocation info) - // Both methods takes old_type, so it is able to performe sanity checks on the information removed. + // Both methods takes old_type, so it is able to perform sanity checks on the information removed. static void change_reloc_info_for_address(RelocIterator *itr, address pc, relocType old_type, relocType new_type); // Machine dependent stuff @@ -803,7 +803,7 @@ class Relocation { virtual bool clear_inline_cache() { return true; } // This method assumes that all virtual/static (inline) caches are cleared (since for static_call_type and - // ic_call_type is not always posisition dependent (depending on the state of the cache)). However, this is + // ic_call_type is not always position dependent (depending on the state of the cache)). However, this is // probably a reasonable assumption, since empty caches simplifies code reloacation. virtual void fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { } }; @@ -897,7 +897,7 @@ class oop_Relocation : public DataRelocation { // an oop in the instruction stream static RelocationHolder spec_for_immediate() { // If no immediate oops are generated, we can skip some walks over nmethods. - // Assert that they don't get generated accidently! + // Assert that they don't get generated accidentally! assert(relocInfo::mustIterateImmediateOopsInCode(), "Must return true so we will search for oops as roots etc. in the code."); const int oop_index = 0; diff --git a/src/hotspot/share/compiler/abstractCompiler.hpp b/src/hotspot/share/compiler/abstractCompiler.hpp index c3516fc2dc9..4a81fd63615 100644 --- a/src/hotspot/share/compiler/abstractCompiler.hpp +++ b/src/hotspot/share/compiler/abstractCompiler.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -114,7 +114,7 @@ class AbstractCompiler : public CHeapObj { // Usually, the compilation context is the caller of the method 'method'. // The only case when for a non-recursive method 'method' the compilation context // is not the caller of the 'method' (but it is the method itself) is - // java.lang.ref.Referene::get. + // java.lang.ref.Reference::get. // For java.lang.ref.Reference::get, the intrinsic version is used // instead of the compiled version so that the value in the referent // field can be registered by the G1 pre-barrier code. The intrinsified diff --git a/src/hotspot/share/compiler/compilationPolicy.cpp b/src/hotspot/share/compiler/compilationPolicy.cpp index 027b513af69..03faf62e02d 100644 --- a/src/hotspot/share/compiler/compilationPolicy.cpp +++ b/src/hotspot/share/compiler/compilationPolicy.cpp @@ -527,7 +527,7 @@ bool CompilationPolicy::verify_level(CompLevel level) { CompLevel CompilationPolicy::highest_compile_level() { CompLevel level = CompLevel_none; - // Setup the maximum level availible for the current compiler configuration. + // Setup the maximum level available for the current compiler configuration. if (!CompilerConfig::is_interpreter_only()) { if (CompilerConfig::is_c2_or_jvmci_compiler_enabled()) { level = CompLevel_full_optimization; @@ -724,7 +724,7 @@ nmethod* CompilationPolicy::event(const methodHandle& method, const methodHandle // Check if event led to a higher level OSR compilation CompLevel expected_comp_level = MIN2(CompLevel_full_optimization, static_cast(comp_level + 1)); if (!CompilationModeFlag::disable_intermediate() && inlinee->is_not_osr_compilable(expected_comp_level)) { - // It's not possble to reach the expected level so fall back to simple. + // It's not possible to reach the expected level so fall back to simple. expected_comp_level = CompLevel_simple; } CompLevel max_osr_level = static_cast(inlinee->highest_osr_comp_level()); diff --git a/src/hotspot/share/compiler/compileBroker.cpp b/src/hotspot/share/compiler/compileBroker.cpp index 6422b719f68..c089b4f4f6a 100644 --- a/src/hotspot/share/compiler/compileBroker.cpp +++ b/src/hotspot/share/compiler/compileBroker.cpp @@ -1339,7 +1339,7 @@ nmethod* CompileBroker::compile_method(const methodHandle& method, int osr_bci, const methodHandle& hot_method, int hot_count, CompileTask::CompileReason compile_reason, TRAPS) { - // Do nothing if compilebroker is not initalized or compiles are submitted on level none + // Do nothing if compilebroker is not initialized or compiles are submitted on level none if (!_initialized || comp_level == CompLevel_none) { return NULL; } @@ -1348,7 +1348,7 @@ nmethod* CompileBroker::compile_method(const methodHandle& method, int osr_bci, assert(comp != NULL, "Ensure we have a compiler"); DirectiveSet* directive = DirectivesStack::getMatchingDirective(method, comp); - // CompileBroker::compile_method can trap and can have pending aysnc exception. + // CompileBroker::compile_method can trap and can have pending async exception. nmethod* nm = CompileBroker::compile_method(method, osr_bci, comp_level, hot_method, hot_count, compile_reason, directive, THREAD); DirectivesStack::release(directive); return nm; diff --git a/src/hotspot/share/compiler/compileBroker.hpp b/src/hotspot/share/compiler/compileBroker.hpp index be770aac9c2..08bd190a52e 100644 --- a/src/hotspot/share/compiler/compileBroker.hpp +++ b/src/hotspot/share/compiler/compileBroker.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -370,7 +370,7 @@ public: // Redefine Classes support static void mark_on_stack(); - // Print curent compilation time stats for a given compiler + // Print current compilation time stats for a given compiler static void print_times(const char* name, CompilerStatistics* stats); // Print a detailed accounting of compilation time diff --git a/src/hotspot/share/compiler/methodLiveness.cpp b/src/hotspot/share/compiler/methodLiveness.cpp index 6bcabfe4ace..4a997f8f381 100644 --- a/src/hotspot/share/compiler/methodLiveness.cpp +++ b/src/hotspot/share/compiler/methodLiveness.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -167,17 +167,17 @@ void MethodLiveness::init_basic_blocks() { dest->add_normal_predecessor(current_block); dest = _block_map->at(bytes.get_dest()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); break; case Bytecodes::_goto: dest = _block_map->at(bytes.get_dest()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); break; case Bytecodes::_goto_w: dest = _block_map->at(bytes.get_far_dest()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); break; case Bytecodes::_tableswitch: @@ -187,11 +187,11 @@ void MethodLiveness::init_basic_blocks() { int len = tableswitch.length(); dest = _block_map->at(bci + tableswitch.default_offset()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); while (--len >= 0) { dest = _block_map->at(bci + tableswitch.dest_offset_at(len)); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); } break; @@ -204,12 +204,12 @@ void MethodLiveness::init_basic_blocks() { int npairs = lookupswitch.number_of_pairs(); dest = _block_map->at(bci + lookupswitch.default_offset()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); while(--npairs >= 0) { LookupswitchPair pair = lookupswitch.pair_at(npairs); dest = _block_map->at( bci + pair.offset()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); } break; @@ -219,7 +219,7 @@ void MethodLiveness::init_basic_blocks() { { assert(bytes.is_wide()==false, "sanity check"); dest = _block_map->at(bytes.get_dest()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); BasicBlock *jsrExit = _block_map->at(current_block->limit_bci()); assert(jsrExit != NULL, "jsr return bci must start a block."); @@ -229,7 +229,7 @@ void MethodLiveness::init_basic_blocks() { case Bytecodes::_jsr_w: { dest = _block_map->at(bytes.get_far_dest()); - assert(dest != NULL, "branch desination must start a block."); + assert(dest != NULL, "branch destination must start a block."); dest->add_normal_predecessor(current_block); BasicBlock *jsrExit = _block_map->at(current_block->limit_bci()); assert(jsrExit != NULL, "jsr return bci must start a block."); diff --git a/src/hotspot/share/gc/g1/g1AllocRegion.cpp b/src/hotspot/share/gc/g1/g1AllocRegion.cpp index 915110e3ebb..f80ac4e524d 100644 --- a/src/hotspot/share/gc/g1/g1AllocRegion.cpp +++ b/src/hotspot/share/gc/g1/g1AllocRegion.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -57,7 +57,7 @@ size_t G1AllocRegion::fill_up_remaining_space(HeapRegion* alloc_region) { // Other threads might still be trying to allocate using a CAS out // of the region we are trying to retire, as they can do so without - // holding the lock. So, we first have to make sure that noone else + // holding the lock. So, we first have to make sure that no one else // can allocate out of it by doing a maximal allocation. Even if our // CAS attempt fails a few times, we'll succeed sooner or later // given that failed CAS attempts mean that the region is getting @@ -65,7 +65,7 @@ size_t G1AllocRegion::fill_up_remaining_space(HeapRegion* alloc_region) { size_t free_word_size = alloc_region->free() / HeapWordSize; // This is the minimum free chunk we can turn into a dummy - // object. If the free space falls below this, then noone can + // object. If the free space falls below this, then no one can // allocate in this region anyway (all allocation requests will be // of a size larger than this) so we won't have to perform the dummy // allocation. diff --git a/src/hotspot/share/gc/g1/g1AllocRegion.hpp b/src/hotspot/share/gc/g1/g1AllocRegion.hpp index a08649a675e..a0347bbf617 100644 --- a/src/hotspot/share/gc/g1/g1AllocRegion.hpp +++ b/src/hotspot/share/gc/g1/g1AllocRegion.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -112,7 +112,7 @@ protected: size_t* actual_word_size); // Ensure that the region passed as a parameter has been filled up - // so that noone else can allocate out of it any more. + // so that no one else can allocate out of it any more. // Returns the number of bytes that have been wasted by filled up // the space. size_t fill_up_remaining_space(HeapRegion* alloc_region); diff --git a/src/hotspot/share/gc/g1/g1CardSet.inline.hpp b/src/hotspot/share/gc/g1/g1CardSet.inline.hpp index 49d7928735a..7d753f00bfb 100644 --- a/src/hotspot/share/gc/g1/g1CardSet.inline.hpp +++ b/src/hotspot/share/gc/g1/g1CardSet.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -75,7 +75,7 @@ inline void G1CardSet::iterate_cards_or_ranges_in_container(ContainerPtr const c return; } } - log_error(gc)("Unkown card set container type %u", container_type(container)); + log_error(gc)("Unknown card set container type %u", container_type(container)); ShouldNotReachHere(); } diff --git a/src/hotspot/share/gc/g1/g1CollectionSetCandidates.hpp b/src/hotspot/share/gc/g1/g1CollectionSetCandidates.hpp index e4acef5c2f3..cc943a78630 100644 --- a/src/hotspot/share/gc/g1/g1CollectionSetCandidates.hpp +++ b/src/hotspot/share/gc/g1/g1CollectionSetCandidates.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -81,7 +81,7 @@ public: // Iterate over all remaining collection set candidate regions. void iterate(HeapRegionClosure* cl); - // Iterate over all remaining collectin set candidate regions from the end + // Iterate over all remaining collection set candidate regions from the end // to the beginning of the set. void iterate_backwards(HeapRegionClosure* cl); diff --git a/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp b/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp index 5d0c0dd605d..49b2945bcf6 100644 --- a/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp +++ b/src/hotspot/share/gc/g1/g1ConcurrentMark.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1780,7 +1780,7 @@ class G1RemarkThreadsClosure : public ThreadClosure { // Transfer any partial buffer to the qset for completed buffer processing. _qset.flush_queue(G1ThreadLocalData::satb_mark_queue(thread)); if (thread->is_Java_thread()) { - // In theory it should not be neccessary to explicitly walk the nmethods to find roots for concurrent marking + // In theory it should not be necessary to explicitly walk the nmethods to find roots for concurrent marking // however the liveness of oops reachable from nmethods have very complex lifecycles: // * Alive if on the stack of an executing method // * Weakly reachable otherwise @@ -2016,7 +2016,7 @@ void G1ConcurrentMark::concurrent_cycle_abort() { // shared marking bitmap that must be cleaned up. // If there are multiple full gcs during shutdown we do this work repeatedly for // nothing, but this situation should be extremely rare (a full gc after shutdown - // has been signalled is alredy rare), and this work should be negligible compared + // has been signalled is already rare), and this work should be negligible compared // to actual full gc work. if (!cm_thread()->in_progress() && !_g1h->concurrent_mark_is_terminating()) { return; diff --git a/src/hotspot/share/gc/g1/g1MonitoringSupport.cpp b/src/hotspot/share/gc/g1/g1MonitoringSupport.cpp index 8c524998455..37c095f4c5b 100644 --- a/src/hotspot/share/gc/g1/g1MonitoringSupport.cpp +++ b/src/hotspot/share/gc/g1/g1MonitoringSupport.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -236,7 +236,7 @@ void G1MonitoringSupport::recalculate_sizes() { // _overall_used and _eden_space_used are obtained concurrently so // may be inconsistent with each other. To prevent _old_gen_used going negative, - // use smaller value to substract. + // use smaller value to subtract. _old_gen_used = _overall_used - MIN2(_overall_used, _eden_space_used + _survivor_space_used); uint survivor_list_length = _g1h->survivor_regions_count(); diff --git a/src/hotspot/share/gc/g1/g1NUMA.cpp b/src/hotspot/share/gc/g1/g1NUMA.cpp index 95d9d8c1513..f8a90fae419 100644 --- a/src/hotspot/share/gc/g1/g1NUMA.cpp +++ b/src/hotspot/share/gc/g1/g1NUMA.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -77,7 +77,7 @@ G1NUMA::G1NUMA() : } void G1NUMA::initialize_without_numa() { - // If NUMA is not enabled or supported, initialize as having a singel node. + // If NUMA is not enabled or supported, initialize as having a single node. _num_active_node_ids = 1; _node_ids = NEW_C_HEAP_ARRAY(int, _num_active_node_ids, mtGC); _node_ids[0] = 0; diff --git a/src/hotspot/share/gc/g1/g1OldGenAllocationTracker.hpp b/src/hotspot/share/gc/g1/g1OldGenAllocationTracker.hpp index ed55c0f9bed..13890c026b2 100644 --- a/src/hotspot/share/gc/g1/g1OldGenAllocationTracker.hpp +++ b/src/hotspot/share/gc/g1/g1OldGenAllocationTracker.hpp @@ -32,7 +32,7 @@ class G1AdaptiveIHOPControl; // Track allocation details in the old generation. class G1OldGenAllocationTracker : public CHeapObj { - // Total number of bytes allocated in the old generaton during + // Total number of bytes allocated in the old generation during // last mutator period. size_t _last_period_old_gen_bytes; // Total growth of the old geneneration for last mutator period, diff --git a/src/hotspot/share/gc/g1/g1ParScanThreadState.cpp b/src/hotspot/share/gc/g1/g1ParScanThreadState.cpp index 3cc3c5c0120..e5c323a06e4 100644 --- a/src/hotspot/share/gc/g1/g1ParScanThreadState.cpp +++ b/src/hotspot/share/gc/g1/g1ParScanThreadState.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -263,7 +263,7 @@ void G1ParScanThreadState::start_partial_objarray(G1HeapRegionAttr dest_attr, _partial_objarray_chunk_size); // Push any needed partial scan tasks. Pushed before processing the - // intitial chunk to allow other workers to steal while we're processing. + // initial chunk to allow other workers to steal while we're processing. for (uint i = 0; i < step._ncreate; ++i) { push_on_queue(ScannerTask(PartialArrayScanTask(from_obj))); } diff --git a/src/hotspot/share/gc/g1/g1RemSet.cpp b/src/hotspot/share/gc/g1/g1RemSet.cpp index 6496b6eaf64..5db4bb7774a 100644 --- a/src/hotspot/share/gc/g1/g1RemSet.cpp +++ b/src/hotspot/share/gc/g1/g1RemSet.cpp @@ -1384,7 +1384,7 @@ class G1MergeHeapRootsTask : public WorkerTask { uint const region_idx = _ct->region_idx_for(card_ptr); - // The second clause must come after - the log buffers might contain cards to uncommited + // The second clause must come after - the log buffers might contain cards to uncommitted // regions. // This code may count duplicate entries in the log buffers (even if rare) multiple // times. diff --git a/src/hotspot/share/gc/g1/g1UncommitRegionTask.hpp b/src/hotspot/share/gc/g1/g1UncommitRegionTask.hpp index 058e7e4ba80..7c9a25f6857 100644 --- a/src/hotspot/share/gc/g1/g1UncommitRegionTask.hpp +++ b/src/hotspot/share/gc/g1/g1UncommitRegionTask.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -44,7 +44,7 @@ class G1UncommitRegionTask : public G1ServiceTask { static G1UncommitRegionTask* instance(); // The _active state is used to prevent the task from being enqueued on the - // service thread multiple times. If the task is active, a new requst to + // service thread multiple times. If the task is active, a new request to // enqueue it will be ignored. bool _active; diff --git a/src/hotspot/share/gc/g1/g1YoungGCEvacFailureInjector.hpp b/src/hotspot/share/gc/g1/g1YoungGCEvacFailureInjector.hpp index aff61c4035d..88df132ddac 100644 --- a/src/hotspot/share/gc/g1/g1YoungGCEvacFailureInjector.hpp +++ b/src/hotspot/share/gc/g1/g1YoungGCEvacFailureInjector.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -43,7 +43,7 @@ // flags. Analogous to PromotionFailureALot for the other collectors. // // Every G1EvacuationFailureALotInterval collections without evacuation failure -// inbetween we "arm" the injector to induce evacuation failures after +// in between we "arm" the injector to induce evacuation failures after // G1EvacuationFailureALotCount successful evacuations. // // Available only when EVAC_FAILURE_INJECTOR is defined. diff --git a/src/hotspot/share/gc/g1/heapRegionManager.cpp b/src/hotspot/share/gc/g1/heapRegionManager.cpp index 4fe62b7f232..cdb5914a9cb 100644 --- a/src/hotspot/share/gc/g1/heapRegionManager.cpp +++ b/src/hotspot/share/gc/g1/heapRegionManager.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -400,7 +400,7 @@ void HeapRegionManager::expand_exact(uint start, uint num_regions, WorkerThreads reactivate_regions(i, 1); } } - // Not else-if to catch the case where the inactive region was uncommited + // Not else-if to catch the case where the inactive region was uncommitted // while waiting to get the lock. if (!_committed_map.active(i)) { expand(i, 1, pretouch_workers); diff --git a/src/hotspot/share/gc/parallel/psOldGen.hpp b/src/hotspot/share/gc/parallel/psOldGen.hpp index d5f6f90a80c..1a8a15ad827 100644 --- a/src/hotspot/share/gc/parallel/psOldGen.hpp +++ b/src/hotspot/share/gc/parallel/psOldGen.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -52,7 +52,7 @@ class PSOldGen : public CHeapObj { #ifdef ASSERT void assert_block_in_covered_region(MemRegion new_memregion) { - // Explictly capture current covered_region in a local + // Explicitly capture current covered_region in a local MemRegion covered_region = this->start_array()->covered_region(); assert(covered_region.contains(new_memregion), "new region is not in covered_region [ " PTR_FORMAT ", " PTR_FORMAT " ], " diff --git a/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp b/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp index 64ee5f286b5..77247a4bdf6 100644 --- a/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp +++ b/src/hotspot/share/gc/parallel/psPromotionManager.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -283,7 +283,7 @@ inline oop PSPromotionManager::copy_unmarked_to_survivor_space(oop o, return new_obj; } else { // We lost, someone else "owns" this object. - // Ensure loads from the forwardee follow all changes that preceeded the + // Ensure loads from the forwardee follow all changes that preceded the // release-cmpxchg that performed the forwarding in another thread. OrderAccess::acquire(); diff --git a/src/hotspot/share/gc/serial/tenuredGeneration.cpp b/src/hotspot/share/gc/serial/tenuredGeneration.cpp index 08aede2880f..4c125623f49 100644 --- a/src/hotspot/share/gc/serial/tenuredGeneration.cpp +++ b/src/hotspot/share/gc/serial/tenuredGeneration.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -155,7 +155,7 @@ void TenuredGeneration::compute_new_size_inner() { if (ShrinkHeapInSteps) { // Always reset '_shrink_factor' if the heap is shrunk in steps. // If we shrink the heap in this iteration, '_shrink_factor' will - // be recomputed based on the old value further down in this fuction. + // be recomputed based on the old value further down in this function. _shrink_factor = 0; } diff --git a/src/hotspot/share/gc/shared/c1/barrierSetC1.hpp b/src/hotspot/share/gc/shared/c1/barrierSetC1.hpp index ac19a2c4d37..777d68ff872 100644 --- a/src/hotspot/share/gc/shared/c1/barrierSetC1.hpp +++ b/src/hotspot/share/gc/shared/c1/barrierSetC1.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -107,7 +107,7 @@ public: }; // The BarrierSetC1 class is the main entry point for the GC backend of the Access API in C1. -// It is called by the LIRGenerator::access_* functions, which is the main entry poing for +// It is called by the LIRGenerator::access_* functions, which is the main entry point for // access calls in C1. class BarrierSetC1: public CHeapObj { diff --git a/src/hotspot/share/gc/shared/c2/barrierSetC2.hpp b/src/hotspot/share/gc/shared/c2/barrierSetC2.hpp index bfb80f87a18..750c6f4926e 100644 --- a/src/hotspot/share/gc/shared/c2/barrierSetC2.hpp +++ b/src/hotspot/share/gc/shared/c2/barrierSetC2.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -96,7 +96,7 @@ public: const TypePtr* type() const { return reinterpret_cast(_type); } }; -// This class wraps a bunch of context parameters thare are passed around in the +// This class wraps a bunch of context parameters that are passed around in the // BarrierSetC2 backend hierarchy, for loads and stores, to reduce boiler plate. class C2Access: public StackObj { protected: @@ -163,7 +163,7 @@ public: virtual bool is_parse_access() const { return true; } }; -// This class wraps a bunch of context parameters thare are passed around in the +// This class wraps a bunch of context parameters that are passed around in the // BarrierSetC2 backend hierarchy, for atomic accesses, to reduce boiler plate. class C2AtomicParseAccess: public C2ParseAccess { Node* _memory; diff --git a/src/hotspot/share/gc/shared/concurrentGCBreakpoints.hpp b/src/hotspot/share/gc/shared/concurrentGCBreakpoints.hpp index 7af1b5746c3..a2ed0b28929 100644 --- a/src/hotspot/share/gc/shared/concurrentGCBreakpoints.hpp +++ b/src/hotspot/share/gc/shared/concurrentGCBreakpoints.hpp @@ -67,7 +67,7 @@ public: // postcondition: is_controlled(). static void acquire_control(); - // Release control of the concurrent collector, cancelling any preceeding + // Release control of the concurrent collector, cancelling any preceding // run_to() or run_to_idle() request. // // precondition: Calling thread must be a Java thread. @@ -75,7 +75,7 @@ public: // postcondiiton: !is_controlled(). static void release_control(); - // Requests the concurrent collector to be idle. Cancels any preceeding + // Requests the concurrent collector to be idle. Cancels any preceding // run_to() request. No new concurrent collections will be started while // the request is active. If a collection is already in progress, it is // allowed to complete before this function returns. @@ -87,7 +87,7 @@ public: static void run_to_idle(); // Requests the concurrent collector to run until the named breakpoint is - // reached. Cancels any preceeding run_to_idle(). If the collector is + // reached. Cancels any preceding run_to_idle(). If the collector is // presently idle, starts a collection with cause GCCause::_wb_breakpoint. // If the collector is presently stopped at a breakpoint, the previous // request is replaced by the new request and the collector is allowed to diff --git a/src/hotspot/share/gc/shared/gcCause.hpp b/src/hotspot/share/gc/shared/gcCause.hpp index a3746fa8745..e9804547026 100644 --- a/src/hotspot/share/gc/shared/gcCause.hpp +++ b/src/hotspot/share/gc/shared/gcCause.hpp @@ -125,7 +125,7 @@ class GCCause : public AllStatic { // Causes for collection of the young generation inline static bool is_allocation_failure_gc(GCCause::Cause cause) { // _allocation_failure is the generic cause a collection for allocation failure - // _adaptive_size_policy is for a collecton done before a full GC + // _adaptive_size_policy is for a collection done before a full GC return (cause == GCCause::_allocation_failure || cause == GCCause::_adaptive_size_policy || cause == GCCause::_shenandoah_allocation_failure_evac); diff --git a/src/hotspot/share/gc/shared/gcConfig.cpp b/src/hotspot/share/gc/shared/gcConfig.cpp index fd4512b7eb4..0ed0a57f3fa 100644 --- a/src/hotspot/share/gc/shared/gcConfig.cpp +++ b/src/hotspot/share/gc/shared/gcConfig.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -209,7 +209,7 @@ bool GCConfig::is_gc_selected_ergonomically() { const char* GCConfig::hs_err_name() { if (is_exactly_one_gc_selected()) { - // Exacly one GC selected + // Exactly one GC selected FOR_EACH_INCLUDED_GC(gc) { if (gc->_flag) { return gc->_hs_err_name; diff --git a/src/hotspot/share/gc/shared/gcVMOperations.hpp b/src/hotspot/share/gc/shared/gcVMOperations.hpp index 91443005658..13c42bfca1c 100644 --- a/src/hotspot/share/gc/shared/gcVMOperations.hpp +++ b/src/hotspot/share/gc/shared/gcVMOperations.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -71,7 +71,7 @@ // // VM_GenCollectFull // VM_ParallelGCSystemGC -// - these operations preform full collection of heaps of +// - these operations perform full collection of heaps of // different kind // // VM_Verify diff --git a/src/hotspot/share/gc/shared/genCollectedHeap.cpp b/src/hotspot/share/gc/shared/genCollectedHeap.cpp index 5e9addba5eb..e7f7ef5dc99 100644 --- a/src/hotspot/share/gc/shared/genCollectedHeap.cpp +++ b/src/hotspot/share/gc/shared/genCollectedHeap.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -462,7 +462,7 @@ void GenCollectedHeap::collect_generation(Generation* gen, bool full, size_t siz // Do collection work { // Note on ref discovery: For what appear to be historical reasons, - // GCH enables and disabled (by enqueing) refs discovery. + // GCH enables and disabled (by enqueuing) refs discovery. // In the future this should be moved into the generation's // collect method so that ref discovery and enqueueing concerns // are local to a generation. The collect method could return diff --git a/src/hotspot/share/gc/shared/partialArrayTaskStepper.inline.hpp b/src/hotspot/share/gc/shared/partialArrayTaskStepper.inline.hpp index d3f8bdfeac7..3dd3456bd5f 100644 --- a/src/hotspot/share/gc/shared/partialArrayTaskStepper.inline.hpp +++ b/src/hotspot/share/gc/shared/partialArrayTaskStepper.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -89,8 +89,8 @@ PartialArrayTaskStepper::next_impl(int length, // Compute number of pending tasks, including this one. The maximum number // of tasks is a function of task_num (N) and _task_fanout (F). // 1 : current task - // N : number of preceeding tasks - // F*N : maximum created for preceeding tasks + // N : number of preceding tasks + // F*N : maximum created for preceding tasks // => F*N - N + 1 : maximum number of tasks // => (F-1)*N + 1 assert(_task_limit > 0, "precondition"); diff --git a/src/hotspot/share/gc/shared/plab.cpp b/src/hotspot/share/gc/shared/plab.cpp index ccfb8760f23..2ef9f06e649 100644 --- a/src/hotspot/share/gc/shared/plab.cpp +++ b/src/hotspot/share/gc/shared/plab.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -70,7 +70,7 @@ void PLAB::flush_and_retire_stats(PLABStats* stats) { // Since we have flushed the stats we need to clear the _allocated and _wasted // fields in case somebody retains an instance of this over GCs. Not doing so - // will artifically inflate the values in the statistics. + // will artificially inflate the values in the statistics. _allocated = 0; _wasted = 0; _undo_wasted = 0; diff --git a/src/hotspot/share/gc/shared/referenceProcessor.hpp b/src/hotspot/share/gc/shared/referenceProcessor.hpp index a8ea98683e8..cc353c026bf 100644 --- a/src/hotspot/share/gc/shared/referenceProcessor.hpp +++ b/src/hotspot/share/gc/shared/referenceProcessor.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -426,7 +426,7 @@ public: process_discovered_references(RefProcProxyTask& proxy_task, ReferenceProcessorPhaseTimes& phase_times); - // If a discovery is in process that is being superceded, abandon it: all + // If a discovery is in process that is being superseded, abandon it: all // the discovered lists will be empty, and all the objects on them will // have NULL discovered fields. Must be called only at a safepoint. void abandon_partial_discovery(); diff --git a/src/hotspot/share/gc/shared/stringdedup/stringDedup.hpp b/src/hotspot/share/gc/shared/stringdedup/stringDedup.hpp index da220b93307..1903ee72f6d 100644 --- a/src/hotspot/share/gc/shared/stringdedup/stringDedup.hpp +++ b/src/hotspot/share/gc/shared/stringdedup/stringDedup.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -158,7 +158,7 @@ public: static void forbid_deduplication(oop java_string); // Notify that a String is being added to the StringTable. - // Implicity forbids deduplication of the String. + // Implicitly forbids deduplication of the String. // precondition: is_enabled() // precondition: java_string is a Java String object. static void notify_intern(oop java_string); diff --git a/src/hotspot/share/gc/shared/stringdedup/stringDedupStat.cpp b/src/hotspot/share/gc/shared/stringdedup/stringDedupStat.cpp index 08d186d6741..ee37083ee42 100644 --- a/src/hotspot/share/gc/shared/stringdedup/stringDedupStat.cpp +++ b/src/hotspot/share/gc/shared/stringdedup/stringDedupStat.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -83,7 +83,7 @@ void StringDedup::Stat::add(const Stat* const stat) { _block_elapsed += stat->_block_elapsed; } -// Support for log output formating +// Support for log output formatting #define STRDEDUP_PERCENT_FORMAT "%5.1f%%" #define STRDEDUP_PERCENT_FORMAT_NS "%.1f%%" #define STRDEDUP_BYTES_FORMAT "%8.1f%s" diff --git a/src/hotspot/share/gc/shared/stringdedup/stringDedupTable.cpp b/src/hotspot/share/gc/shared/stringdedup/stringDedupTable.cpp index c5e0c652659..01ff3db7aaf 100644 --- a/src/hotspot/share/gc/shared/stringdedup/stringDedupTable.cpp +++ b/src/hotspot/share/gc/shared/stringdedup/stringDedupTable.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -228,7 +228,7 @@ void StringDedup::Table::Bucket::verify(size_t bucket_index, // If a dead count report is received while cleaning, further cleaning may // reduce the number of dead entries. With STW reference processing one // could maintain an accurate dead count by deducting cleaned entries. But -// that doesn't work for concurrent reference processsing. In that case the +// that doesn't work for concurrent reference processing. In that case the // dead count being reported may include entries that have already been // removed by concurrent cleaning. // diff --git a/src/hotspot/share/gc/shenandoah/c2/shenandoahSupport.cpp b/src/hotspot/share/gc/shenandoah/c2/shenandoahSupport.cpp index 667808f4efd..8a11563ceb1 100644 --- a/src/hotspot/share/gc/shenandoah/c2/shenandoahSupport.cpp +++ b/src/hotspot/share/gc/shenandoah/c2/shenandoahSupport.cpp @@ -1361,7 +1361,7 @@ void ShenandoahBarrierC2Support::pin_and_expand(PhaseIdealLoop* phase) { val_phi->init_req(_heap_stable, val); // Test for in-cset, unless it's a native-LRB. Native LRBs need to return NULL - // even for non-cset objects to prevent ressurrection of such objects. + // even for non-cset objects to prevent resurrection of such objects. // Wires !in_cset(obj) to slot 2 of region and phis Node* not_cset_ctrl = NULL; if (ShenandoahBarrierSet::is_strong_access(lrb->decorators())) { diff --git a/src/hotspot/share/gc/shenandoah/shenandoahBarrierSet.cpp b/src/hotspot/share/gc/shenandoah/shenandoahBarrierSet.cpp index 00e4ea02fd1..fddf048a73a 100644 --- a/src/hotspot/share/gc/shenandoah/shenandoahBarrierSet.cpp +++ b/src/hotspot/share/gc/shenandoah/shenandoahBarrierSet.cpp @@ -118,7 +118,7 @@ void ShenandoahBarrierSet::on_thread_detach(Thread *thread) { gclab->retire(); } - // SATB protocol requires to keep alive reacheable oops from roots at the beginning of GC + // SATB protocol requires to keep alive reachable oops from roots at the beginning of GC if (ShenandoahStackWatermarkBarrier) { if (_heap->is_concurrent_mark_in_progress()) { ShenandoahKeepAliveClosure oops; diff --git a/src/hotspot/share/gc/shenandoah/shenandoahHeap.inline.hpp b/src/hotspot/share/gc/shenandoah/shenandoahHeap.inline.hpp index 1e5cddd49d8..d925f6c1891 100644 --- a/src/hotspot/share/gc/shenandoah/shenandoahHeap.inline.hpp +++ b/src/hotspot/share/gc/shenandoah/shenandoahHeap.inline.hpp @@ -457,7 +457,7 @@ inline void ShenandoahHeap::marked_object_iterate(ShenandoahHeapRegion* region, // touch anything in oop, while it still being prefetched to get enough // time for prefetch to work. This is why we try to scan the bitmap linearly, // disregarding the object size. However, since we know forwarding pointer - // preceeds the object, we can skip over it. Once we cannot trust the bitmap, + // precedes the object, we can skip over it. Once we cannot trust the bitmap, // there is no point for prefetching the oop contents, as oop->size() will // touch it prematurely. diff --git a/src/hotspot/share/gc/shenandoah/shenandoahMarkBitMap.inline.hpp b/src/hotspot/share/gc/shenandoah/shenandoahMarkBitMap.inline.hpp index a448f199404..62c0eaea139 100644 --- a/src/hotspot/share/gc/shenandoah/shenandoahMarkBitMap.inline.hpp +++ b/src/hotspot/share/gc/shenandoah/shenandoahMarkBitMap.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, Red Hat, Inc. and/or its affiliates. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -153,7 +153,7 @@ inline ShenandoahMarkBitMap::idx_t ShenandoahMarkBitMap::get_next_bit_impl(idx_t // Flipped and shifted first word is zero. Word search through // aligned up r_index for a non-zero flipped word. idx_t limit = aligned_right - ? to_words_align_down(r_index) // Miniscule savings when aligned. + ? to_words_align_down(r_index) // Minuscule savings when aligned. : to_words_align_up(r_index); while (++index < limit) { cword = map(index) ^ flip; diff --git a/src/hotspot/share/gc/z/c2/zBarrierSetC2.cpp b/src/hotspot/share/gc/z/c2/zBarrierSetC2.cpp index 9c72716464f..9ee808d61b3 100644 --- a/src/hotspot/share/gc/z/c2/zBarrierSetC2.cpp +++ b/src/hotspot/share/gc/z/c2/zBarrierSetC2.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -143,7 +143,7 @@ RegMask& ZLoadBarrierStubC2::live() const { Label* ZLoadBarrierStubC2::entry() { // The _entry will never be bound when in_scratch_emit_size() is true. // However, we still need to return a label that is not bound now, but - // will eventually be bound. Any lable will do, as it will only act as + // will eventually be bound. Any label will do, as it will only act as // a placeholder, so we return the _continuation label. return Compile::current()->output()->in_scratch_emit_size() ? &_continuation : &_entry; } diff --git a/src/hotspot/share/gc/z/zResurrection.cpp b/src/hotspot/share/gc/z/zResurrection.cpp index 2ce302d4aff..2e7b4c7b4b9 100644 --- a/src/hotspot/share/gc/z/zResurrection.cpp +++ b/src/hotspot/share/gc/z/zResurrection.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -36,7 +36,7 @@ void ZResurrection::block() { void ZResurrection::unblock() { // No need for anything stronger than a relaxed store here. - // The preceeding handshake makes sure that all non-strong + // The preceding handshake makes sure that all non-strong // oops have already been healed at this point. Atomic::store(&_blocked, false); } diff --git a/src/hotspot/share/include/jvm.h b/src/hotspot/share/include/jvm.h index dfdd2219869..e2da800f3a5 100644 --- a/src/hotspot/share/include/jvm.h +++ b/src/hotspot/share/include/jvm.h @@ -449,7 +449,7 @@ JVM_LookupDefineClass(JNIEnv *env, jclass lookup, const char *name, const jbyte jsize len, jobject pd, jboolean init, int flags, jobject classData); /* - * Module support funcions + * Module support functions */ /* diff --git a/src/hotspot/share/include/jvm_io.h b/src/hotspot/share/include/jvm_io.h index 572c26f3495..e6265fe5192 100644 --- a/src/hotspot/share/include/jvm_io.h +++ b/src/hotspot/share/include/jvm_io.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -45,7 +45,7 @@ extern "C" { * - The string written to str is always zero-terminated, also in case of * truncation (count is too small to hold the result string), unless count * is 0. In case of truncation count-1 characters are written and '\0' - * appendend. + * appended. * - If count is too small to hold the whole string, -1 is returned across * all platforms. */ diff --git a/src/hotspot/share/interpreter/abstractInterpreter.cpp b/src/hotspot/share/interpreter/abstractInterpreter.cpp index c39790f69f8..b94a30545b1 100644 --- a/src/hotspot/share/interpreter/abstractInterpreter.cpp +++ b/src/hotspot/share/interpreter/abstractInterpreter.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -319,7 +319,7 @@ address AbstractInterpreter::deopt_continue_after_entry(Method* method, address methodHandle mh(thread, method); type = Bytecode_invoke(mh, bci).result_type(); // since the cache entry might not be initialized: - // (NOT needed for the old calling convension) + // (NOT needed for the old calling convention) if (!is_top_frame) { int index = Bytes::get_native_u2(bcp+1); method->constants()->cache()->entry_at(index)->set_parameter_size(callee_parameters); @@ -333,7 +333,7 @@ address AbstractInterpreter::deopt_continue_after_entry(Method* method, address methodHandle mh(thread, method); type = Bytecode_invoke(mh, bci).result_type(); // since the cache entry might not be initialized: - // (NOT needed for the old calling convension) + // (NOT needed for the old calling convention) if (!is_top_frame) { int index = Bytes::get_native_u4(bcp+1); method->constants()->invokedynamic_cp_cache_entry_at(index)->set_parameter_size(callee_parameters); @@ -387,7 +387,7 @@ bool AbstractInterpreter::bytecode_should_reexecute(Bytecodes::Code code) { case Bytecodes::_tableswitch: case Bytecodes::_fast_binaryswitch: case Bytecodes::_fast_linearswitch: - // recompute condtional expression folded into _if + // recompute conditional expression folded into _if case Bytecodes::_lcmp : case Bytecodes::_fcmpl : case Bytecodes::_fcmpg : diff --git a/src/hotspot/share/interpreter/bytecodeHistogram.hpp b/src/hotspot/share/interpreter/bytecodeHistogram.hpp index 44ddca074d0..214d074541f 100644 --- a/src/hotspot/share/interpreter/bytecodeHistogram.hpp +++ b/src/hotspot/share/interpreter/bytecodeHistogram.hpp @@ -71,7 +71,7 @@ class BytecodeHistogram: AllStatic { // BytecodePairHistogram collects number of executions of bytecode pairs. -// A bytecode pair is any sequence of two consequtive bytecodes. +// A bytecode pair is any sequence of two consecutive bytecodes. class BytecodePairHistogram: AllStatic { public: // for solstudio diff --git a/src/hotspot/share/interpreter/bytecodeStream.hpp b/src/hotspot/share/interpreter/bytecodeStream.hpp index 4c41faa5380..f9190795bcf 100644 --- a/src/hotspot/share/interpreter/bytecodeStream.hpp +++ b/src/hotspot/share/interpreter/bytecodeStream.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -191,7 +191,7 @@ class BytecodeStream: public BaseBytecodeStream { // // note that we cannot advance before having the // tty bytecode otherwise the stepping is wrong! - // (carefull: length_for(...) must be used first!) + // (careful: length_for(...) must be used first!) int len = Bytecodes::length_for(code); if (len == 0) len = Bytecodes::length_at(_method(), bcp); if (len <= 0 || (_bci > _end_bci - len) || (_bci - len >= _next_bci)) { diff --git a/src/hotspot/share/interpreter/bytecodeUtils.cpp b/src/hotspot/share/interpreter/bytecodeUtils.cpp index df5fbbe0e6b..baa39a6b223 100644 --- a/src/hotspot/share/interpreter/bytecodeUtils.cpp +++ b/src/hotspot/share/interpreter/bytecodeUtils.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2019 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -102,7 +102,7 @@ class SimulatedOperandStack: CHeapObj { // written, we don't know any more whether it was written as the // corresponding parameter, or whether another local has been // mapped to the slot. So we don't want to print 'parameter' any - // more, but 'local'. Similary for 'this'. + // more, but 'local'. Similarly for 'this'. // Therefore, during the analysis, we mark a bit for local slots that // get written and propagate this information. // We only run the analysis for 64 slots. If a method has more @@ -152,7 +152,7 @@ class SimulatedOperandStack: CHeapObj { // // It analyses the bytecode to assemble Java-like message text // to give precise information where in a larger expression the -// exception occured. +// exception occurred. // // To assemble this message text, it is needed to know how // operand stack slot entries were pushed on the operand stack. diff --git a/src/hotspot/share/interpreter/interpreterRuntime.cpp b/src/hotspot/share/interpreter/interpreterRuntime.cpp index 5e61410ddc2..d4242595754 100644 --- a/src/hotspot/share/interpreter/interpreterRuntime.cpp +++ b/src/hotspot/share/interpreter/interpreterRuntime.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1111,7 +1111,7 @@ JRT_END JRT_ENTRY(void, InterpreterRuntime::at_safepoint(JavaThread* current)) - // We used to need an explict preserve_arguments here for invoke bytecodes. However, + // We used to need an explicit preserve_arguments here for invoke bytecodes. However, // stack traversal automatically takes care of preserving arguments for invoke, so // this is no longer needed. @@ -1248,7 +1248,7 @@ JRT_END #ifndef SHARING_FAST_NATIVE_FINGERPRINTS // Dummy definition (else normalization method is defined in CPU -// dependant code) +// dependent code) uint64_t InterpreterRuntime::normalize_fast_native_fingerprint(uint64_t fingerprint) { return fingerprint; } @@ -1309,7 +1309,7 @@ void SignatureHandlerLibrary::add(const methodHandle& method) { initialize(); // lookup method signature's fingerprint uint64_t fingerprint = Fingerprinter(method).fingerprint(); - // allow CPU dependant code to optimize the fingerprints for the fast handler + // allow CPU dependent code to optimize the fingerprints for the fast handler fingerprint = InterpreterRuntime::normalize_fast_native_fingerprint(fingerprint); handler_index = _fingerprints->find(fingerprint); // create handler if necessary @@ -1324,7 +1324,7 @@ void SignatureHandlerLibrary::add(const methodHandle& method) { if (handler == NULL) { // use slow signature handler (without memorizing it in the fingerprints) } else { - // debugging suppport + // debugging support if (PrintSignatureHandlers && (handler != Interpreter::slow_signature_handler())) { ttyLocker ttyl; tty->cr(); diff --git a/src/hotspot/share/interpreter/linkResolver.cpp b/src/hotspot/share/interpreter/linkResolver.cpp index fa8072fb207..63d000f134f 100644 --- a/src/hotspot/share/interpreter/linkResolver.cpp +++ b/src/hotspot/share/interpreter/linkResolver.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -813,7 +813,7 @@ static void trace_method_resolution(const char* prefix, #endif // PRODUCT } -// Do linktime resolution of a method in the interface within the context of the specied bytecode. +// Do linktime resolution of a method in the interface within the context of the specified bytecode. Method* LinkResolver::resolve_interface_method(const LinkInfo& link_info, Bytecodes::Code code, TRAPS) { Klass* resolved_klass = link_info.resolved_klass(); diff --git a/src/hotspot/share/interpreter/oopMapCache.cpp b/src/hotspot/share/interpreter/oopMapCache.cpp index 84bef74bed9..8677cd0412d 100644 --- a/src/hotspot/share/interpreter/oopMapCache.cpp +++ b/src/hotspot/share/interpreter/oopMapCache.cpp @@ -178,7 +178,7 @@ InterpreterOopMap::InterpreterOopMap() { } InterpreterOopMap::~InterpreterOopMap() { - // The expection is that the bit mask was allocated + // The expectation is that the bit mask was allocated // last in this resource area. That would make the free of the // bit_mask effective (see how FREE_RESOURCE_ARRAY does a free). // If it was not allocated last, there is not a correctness problem diff --git a/src/hotspot/share/interpreter/oopMapCache.hpp b/src/hotspot/share/interpreter/oopMapCache.hpp index 6d12ab6ab38..75409371a5e 100644 --- a/src/hotspot/share/interpreter/oopMapCache.hpp +++ b/src/hotspot/share/interpreter/oopMapCache.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -91,7 +91,7 @@ class InterpreterOopMap: ResourceObj { // ptr to bit mask otherwise // "protected" so that sub classes can // access it without using trickery in - // methd bit_mask(). + // method bit_mask(). #ifdef ASSERT bool _resource_allocate_bit_mask; #endif diff --git a/src/hotspot/share/interpreter/templateInterpreter.cpp b/src/hotspot/share/interpreter/templateInterpreter.cpp index 178bc80f7fe..0eb6cfb99ba 100644 --- a/src/hotspot/share/interpreter/templateInterpreter.cpp +++ b/src/hotspot/share/interpreter/templateInterpreter.cpp @@ -287,7 +287,7 @@ address TemplateInterpreter::deopt_entry(TosState state, int length) { } //------------------------------------------------------------------------------------------------------------------------ -// Suport for invokes +// Support for invokes int TemplateInterpreter::TosState_as_index(TosState state) { assert( state < number_of_states , "Invalid state in TosState_as_index"); diff --git a/src/hotspot/share/interpreter/zero/bytecodeInterpreter.cpp b/src/hotspot/share/interpreter/zero/bytecodeInterpreter.cpp index 4682c2b8129..61f9113776e 100644 --- a/src/hotspot/share/interpreter/zero/bytecodeInterpreter.cpp +++ b/src/hotspot/share/interpreter/zero/bytecodeInterpreter.cpp @@ -308,7 +308,7 @@ JRT_END /* * Macros for caching and flushing the interpreter state. Some local * variables need to be flushed out to the frame before we do certain - * things (like pushing frames or becomming gc safe) and some need to + * things (like pushing frames or becoming gc safe) and some need to * be recached later (like after popping a frame). We could use one * macro to cache or decache everything, but this would be less then * optimal because we don't always need to cache or decache everything @@ -755,7 +755,7 @@ run: // need at entry to the loop. // DEBUGGER_SINGLE_STEP_NOTIFY(); /* Using this labels avoids double breakpoints when quickening and - * when returing from transition frames. + * when returning from transition frames. */ opcode_switch: assert(istate == orig, "Corrupted istate"); @@ -1564,7 +1564,7 @@ run: Klass* rhsKlass = rhsObject->klass(); // EBX (subclass) Klass* elemKlass = ObjArrayKlass::cast(arrObj->klass())->element_klass(); // superklass EAX // - // Check for compatibilty. This check must not GC!! + // Check for compatibility. This check must not GC!! // Seems way more expensive now that we must dispatch // if (rhsKlass != elemKlass && !rhsKlass->is_subtype_of(elemKlass)) { // ebx->is... @@ -2009,7 +2009,7 @@ run: Klass* klassOf = (Klass*) METHOD->constants()->resolved_klass_at(index); Klass* objKlass = STACK_OBJECT(-1)->klass(); // ebx // - // Check for compatibilty. This check must not GC!! + // Check for compatibility. This check must not GC!! // Seems way more expensive now that we must dispatch. // if (objKlass != klassOf && !objKlass->is_subtype_of(klassOf)) { @@ -2035,7 +2035,7 @@ run: Klass* klassOf = (Klass*) METHOD->constants()->resolved_klass_at(index); Klass* objKlass = STACK_OBJECT(-1)->klass(); // - // Check for compatibilty. This check must not GC!! + // Check for compatibility. This check must not GC!! // Seems way more expensive now that we must dispatch. // if ( objKlass == klassOf || objKlass->is_subtype_of(klassOf)) { @@ -3021,7 +3021,7 @@ run: // We'd like a HandleMark here to prevent any subsequent HandleMarkCleaner // in any following VM entries from freeing our live handles, but illegal_state_oop // isn't really allocated yet and so doesn't become live until later and - // in unpredicatable places. Instead we must protect the places where we enter the + // in unpredictable places. Instead we must protect the places where we enter the // VM. It would be much simpler (and safer) if we could allocate a real handle with // a NULL oop in it and then overwrite the oop later as needed. This isn't // unfortunately isn't possible. @@ -3242,7 +3242,7 @@ finish: return; } -// This constructor should only be used to contruct the object to signal +// This constructor should only be used to construct the object to signal // interpreter initialization. All other instances should be created by // the frame manager. BytecodeInterpreter::BytecodeInterpreter(messages msg) { diff --git a/src/hotspot/share/jfr/dcmd/jfrDcmds.cpp b/src/hotspot/share/jfr/dcmd/jfrDcmds.cpp index 4790506bf97..e5f55be10be 100644 --- a/src/hotspot/share/jfr/dcmd/jfrDcmds.cpp +++ b/src/hotspot/share/jfr/dcmd/jfrDcmds.cpp @@ -379,13 +379,13 @@ void JfrConfigureFlightRecorderDCmd::print_help(const char* name) const { out->print_cr(" globalbuffercount (Optional) Number of global buffers. This option is a legacy"); out->print_cr(" option: change the memorysize parameter to alter the number of"); out->print_cr(" global buffers. This value cannot be changed once JFR has been"); - out->print_cr(" initalized. (STRING, default determined by the value for"); + out->print_cr(" initialized. (STRING, default determined by the value for"); out->print_cr(" memorysize)"); out->print_cr(""); out->print_cr(" globalbuffersize (Optional) Size of the global buffers, in bytes. This option is a"); out->print_cr(" legacy option: change the memorysize parameter to alter the size"); out->print_cr(" of the global buffers. This value cannot be changed once JFR has"); - out->print_cr(" been initalized. (STRING, default determined by the value for"); + out->print_cr(" been initialized. (STRING, default determined by the value for"); out->print_cr(" memorysize)"); out->print_cr(""); out->print_cr(" maxchunksize (Optional) Maximum size of an individual data chunk in bytes if"); diff --git a/src/hotspot/share/jfr/instrumentation/jfrEventClassTransformer.cpp b/src/hotspot/share/jfr/instrumentation/jfrEventClassTransformer.cpp index cf87a835a9f..8f9265aaac2 100644 --- a/src/hotspot/share/jfr/instrumentation/jfrEventClassTransformer.cpp +++ b/src/hotspot/share/jfr/instrumentation/jfrEventClassTransformer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1365,7 +1365,7 @@ static u1* new_bytes_for_lazy_instrumentation(const InstanceKlass* ik, // We would need to do: // 1. Nothing (@Registered(false) annotation) // 2. Build up a new - and if the original class already contains a , - // merging will be neccessary. + // merging will be necessary. // if (register_klass) { insert_clinit_method(ik, parser, writer, orig_cp_len, utf8_indexes, flr_register_method_ref_index, clinit_method, THREAD); diff --git a/src/hotspot/share/jfr/leakprofiler/chains/dfsClosure.cpp b/src/hotspot/share/jfr/leakprofiler/chains/dfsClosure.cpp index 5670166574e..00e7ff126f8 100644 --- a/src/hotspot/share/jfr/leakprofiler/chains/dfsClosure.cpp +++ b/src/hotspot/share/jfr/leakprofiler/chains/dfsClosure.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -46,7 +46,7 @@ void DFSClosure::find_leaks_from_edge(EdgeStore* edge_store, assert(mark_bits != NULL," invariant"); assert(start_edge != NULL, "invariant"); - // Depth-first search, starting from a BFS egde + // Depth-first search, starting from a BFS edge DFSClosure dfs(edge_store, mark_bits, start_edge); start_edge->pointee()->oop_iterate(&dfs); } diff --git a/src/hotspot/share/jfr/leakprofiler/checkpoint/objectSampleWriter.cpp b/src/hotspot/share/jfr/leakprofiler/checkpoint/objectSampleWriter.cpp index 35952615db9..eeed5c10709 100644 --- a/src/hotspot/share/jfr/leakprofiler/checkpoint/objectSampleWriter.cpp +++ b/src/hotspot/share/jfr/leakprofiler/checkpoint/objectSampleWriter.cpp @@ -626,7 +626,7 @@ ObjectSampleWriter::~ObjectSampleWriter() { write_field_infos(_writer); write_root_descriptors(_writer); - // Followings are RA allocated, memory will be released automatically. + // Following are RA allocated, memory will be released automatically. if (field_infos != NULL) { field_infos->~FieldTable(); field_infos = NULL; diff --git a/src/hotspot/share/jfr/leakprofiler/sampling/objectSampler.hpp b/src/hotspot/share/jfr/leakprofiler/sampling/objectSampler.hpp index 1e942cba5b0..ccf40d17a9e 100644 --- a/src/hotspot/share/jfr/leakprofiler/sampling/objectSampler.hpp +++ b/src/hotspot/share/jfr/leakprofiler/sampling/objectSampler.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2014, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -35,7 +35,7 @@ class ObjectSample; class SampleList; class SamplePriorityQueue; -// Class reponsible for holding samples and +// Class responsible for holding samples and // making sure the samples are evenly distributed as // new entries are added and removed. class ObjectSampler : public CHeapObj { diff --git a/src/hotspot/share/jfr/metadata/metadata.xml b/src/hotspot/share/jfr/metadata/metadata.xml index 0b17b5da715..39d7c34a717 100644 --- a/src/hotspot/share/jfr/metadata/metadata.xml +++ b/src/hotspot/share/jfr/metadata/metadata.xml @@ -1,7 +1,7 @@ - + @@ -424,25 +424,25 @@ + description="Tenuring age of a surviving object before being copied. The tenuring age of an object is a value between 0-15 and is incremented each scavenge the object survives. Newly allocated objects have tenuring age 0." /> + description="Tenuring age of a surviving object before being copied. The tenuring age of an object is a value between 0-15 and is incremented each scavenge the object survives. Newly allocated objects have tenuring age 0." /> @@ -622,7 +622,7 @@ - + diff --git a/src/hotspot/share/jfr/recorder/checkpoint/types/jfrTypeSetUtils.hpp b/src/hotspot/share/jfr/recorder/checkpoint/types/jfrTypeSetUtils.hpp index d82811fe84c..f9cd1d0f690 100644 --- a/src/hotspot/share/jfr/recorder/checkpoint/types/jfrTypeSetUtils.hpp +++ b/src/hotspot/share/jfr/recorder/checkpoint/types/jfrTypeSetUtils.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -198,7 +198,7 @@ class LeakPredicate { * during the write process itself. * * It can also provide opportunities for caching, as the ideal should - * be to reduce the amount of iterations neccessary for locating artifacts + * be to reduce the amount of iterations necessary for locating artifacts * in the respective VM subsystems. */ class JfrArtifactSet : public JfrCHeapObj { diff --git a/src/hotspot/share/jfr/recorder/repository/jfrRepository.hpp b/src/hotspot/share/jfr/recorder/repository/jfrRepository.hpp index 76ff714f6c9..2a091439f7b 100644 --- a/src/hotspot/share/jfr/recorder/repository/jfrRepository.hpp +++ b/src/hotspot/share/jfr/recorder/repository/jfrRepository.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -37,7 +37,7 @@ class JfrPostBox; // has been moved out of process memory. // // Chunk files are associated with recordings and are managed at a higher level in Java. -// Java continously keeps the VM informed about new chunk locations via set_chunk_path(). +// Java continuously keeps the VM informed about new chunk locations via set_chunk_path(). // // A JfrChunkWriter will open the next chunk file which it maintains as the current chunk. // There is a rotation scheme in place for creating new chunks at certain intervals. diff --git a/src/hotspot/share/jfr/recorder/service/jfrEvent.hpp b/src/hotspot/share/jfr/recorder/service/jfrEvent.hpp index 7c1e953f4e8..e87c34c2530 100644 --- a/src/hotspot/share/jfr/recorder/service/jfrEvent.hpp +++ b/src/hotspot/share/jfr/recorder/service/jfrEvent.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -197,13 +197,13 @@ class JfrEvent { } bool large = is_large(); if (write_sized_event(buffer, event_thread, tl, large)) { - // Event written succesfully + // Event written successfully return; } if (!large) { // Try large size if (write_sized_event(buffer, event_thread, tl, true)) { - // Event written succesfully, use large size from now on + // Event written successfully, use large size from now on set_large(); } } diff --git a/src/hotspot/share/jfr/recorder/service/jfrEventThrottler.cpp b/src/hotspot/share/jfr/recorder/service/jfrEventThrottler.cpp index 0f5777c8b00..e30bdc36e48 100644 --- a/src/hotspot/share/jfr/recorder/service/jfrEventThrottler.cpp +++ b/src/hotspot/share/jfr/recorder/service/jfrEventThrottler.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, Datadog, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -99,7 +99,7 @@ bool JfrEventThrottler::accept(JfrEventId event_id, int64_t timestamp /* 0 */) { /* * The window_lookback_count defines the history in number of windows to take into account - * when the JfrAdaptiveSampler engine is calcualting an expected weigthed moving average (EWMA) over the population. + * when the JfrAdaptiveSampler engine is calculating an expected weighted moving average (EWMA) over the population. * Technically, it determines the alpha coefficient in the EMWA formula. */ constexpr static const size_t default_window_lookback_count = 25; // 25 windows == 5 seconds (for default window duration of 200 ms) diff --git a/src/hotspot/share/jfr/recorder/service/jfrOptionSet.cpp b/src/hotspot/share/jfr/recorder/service/jfrOptionSet.cpp index a23ab95acbe..b91851d0f11 100644 --- a/src/hotspot/share/jfr/recorder/service/jfrOptionSet.cpp +++ b/src/hotspot/share/jfr/recorder/service/jfrOptionSet.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -467,7 +467,7 @@ static void log_adjustments(MemoryArg& original_memory_size, julong new_memory_s // All "triangular" options are explicitly set // check that they are congruent and not causing -// an ambiguous situtation +// an ambiguous situation template static bool check_for_ambiguity(MemoryArg& memory_size, MemoryArg& global_buffer_size, NumberArg& num_global_buffers) { assert(memory_size.is_set(), "invariant"); @@ -488,7 +488,7 @@ static bool check_for_ambiguity(MemoryArg& memory_size, MemoryArg& global_buffer num_global_buffers.name(), memory_size.name()); log_error(arguments) ( - "Try to remove one of the involved options or make sure they are unambigous"); + "Try to remove one of the involved options or make sure they are unambiguous"); return false; } return true; diff --git a/src/hotspot/share/jfr/recorder/storage/jfrMemorySpace.hpp b/src/hotspot/share/jfr/recorder/storage/jfrMemorySpace.hpp index 8aaf4336f0b..365c0243a10 100644 --- a/src/hotspot/share/jfr/recorder/storage/jfrMemorySpace.hpp +++ b/src/hotspot/share/jfr/recorder/storage/jfrMemorySpace.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -50,7 +50,7 @@ const size_t JFR_MSPACE_UNLIMITED_CACHE_SIZE = max_uintx; * the type parameter for the RetrivalPolicy template class is JfrMemorySpace and the policy class must provide: * FreeListType::Node* acquire(JfrMemorySpace* mspace, FreeListType* free_list, Thread*, size_t size, bool previous_epoch); * - * FreeListType the type of the free list. The syntactic interface to be fullfilled is most conveniently read from an example, + * FreeListType the type of the free list. The syntactic interface to be fulfilled is most conveniently read from an example, * please see utilities/jfrConcurrentQueue.hpp. * * FreeListType::Node gives the basic node type for each individual unit to be managed by the memory space. diff --git a/src/hotspot/share/jfr/support/jfrAdaptiveSampler.cpp b/src/hotspot/share/jfr/support/jfrAdaptiveSampler.cpp index 3eb53a54a10..2246b8daea1 100644 --- a/src/hotspot/share/jfr/support/jfrAdaptiveSampler.cpp +++ b/src/hotspot/share/jfr/support/jfrAdaptiveSampler.cpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. +* Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, Datadog, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -131,7 +131,7 @@ void JfrAdaptiveSampler::reconfigure() { rotate(active_window()); } -// Call next_window_param() to report the expired window and to retreive params for the next window. +// Call next_window_param() to report the expired window and to retrieve params for the next window. void JfrAdaptiveSampler::rotate(const JfrSamplerWindow* expired) { assert(expired == active_window(), "invariant"); install(configure(next_window_params(expired), expired)); diff --git a/src/hotspot/share/jfr/support/jfrAdaptiveSampler.hpp b/src/hotspot/share/jfr/support/jfrAdaptiveSampler.hpp index e518cb53dd0..d9231ca7a65 100644 --- a/src/hotspot/share/jfr/support/jfrAdaptiveSampler.hpp +++ b/src/hotspot/share/jfr/support/jfrAdaptiveSampler.hpp @@ -1,5 +1,5 @@ /* -* Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. +* Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, Datadog, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -66,7 +66,7 @@ * report a rate higher than n per second. * * One good use of the sampler is to employ it as a throttler, or regulator, to help shape large data sets into smaller, - * more managable subsets while still keeping the data somewhat representative. + * more manageable subsets while still keeping the data somewhat representative. * */ diff --git a/src/hotspot/share/jfr/utilities/jfrConcurrentLinkedListHost.inline.hpp b/src/hotspot/share/jfr/utilities/jfrConcurrentLinkedListHost.inline.hpp index 31443b4d56a..94780d95704 100644 --- a/src/hotspot/share/jfr/utilities/jfrConcurrentLinkedListHost.inline.hpp +++ b/src/hotspot/share/jfr/utilities/jfrConcurrentLinkedListHost.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -47,7 +47,7 @@ inline Node* mark_for_removal(Node* node) { /* * The insertion marker (i.e. the insertion bit) is represented by '[ ]' as part of state description comments: - * "node --> next" becomes "[node] --> next", in an attempt to convey the node as exlusively reserved. + * "node --> next" becomes "[node] --> next", in an attempt to convey the node as exclusively reserved. */ template inline bool mark_for_insertion(Node* node, const Node* tail) { diff --git a/src/hotspot/share/jfr/utilities/jfrVersionSystem.hpp b/src/hotspot/share/jfr/utilities/jfrVersionSystem.hpp index e46861191c0..5005b5b8f3f 100644 --- a/src/hotspot/share/jfr/utilities/jfrVersionSystem.hpp +++ b/src/hotspot/share/jfr/utilities/jfrVersionSystem.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -28,7 +28,7 @@ /* * A lock-free data structure usually require support for tracking references * in the service of Safe Memory Reclamation (SMR). JfrVersionSystem provides local, - * compared to global, reference tracking for an assoicated data structure. + * compared to global, reference tracking for an associated data structure. * * A client, before accessing a structure, will perform a "checkout" from the JfrVersionSystem. * This checkout is associated with the current, or latest, version, analogous to the "tip" in a version control system. diff --git a/src/hotspot/share/jfr/writers/jfrStorageAdapter.hpp b/src/hotspot/share/jfr/writers/jfrStorageAdapter.hpp index bb0ca60605f..c8459bae7af 100644 --- a/src/hotspot/share/jfr/writers/jfrStorageAdapter.hpp +++ b/src/hotspot/share/jfr/writers/jfrStorageAdapter.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -90,7 +90,7 @@ class Adapter { // This flush call will return the lease // of a temporary storage area. // Since the requested size is 0, - // the flush implementation will accomodate + // the flush implementation will accommodate // that 'size' request in the // original thread local storage, // by implication restoring the original diff --git a/src/hotspot/share/jvmci/jvmciEnv.hpp b/src/hotspot/share/jvmci/jvmciEnv.hpp index 61b7cd4e331..4d3d317bc1a 100644 --- a/src/hotspot/share/jvmci/jvmciEnv.hpp +++ b/src/hotspot/share/jvmci/jvmciEnv.hpp @@ -395,7 +395,7 @@ public: jlong make_handle(const Handle& obj); oop resolve_handle(jlong objectHandle); - // These are analagous to the JNI routines + // These are analogous to the JNI routines JVMCIObject make_local(JVMCIObject object); void destroy_local(JVMCIObject object); diff --git a/src/hotspot/share/jvmci/jvmciExceptions.hpp b/src/hotspot/share/jvmci/jvmciExceptions.hpp index 285b955bec9..5d1015e8db3 100644 --- a/src/hotspot/share/jvmci/jvmciExceptions.hpp +++ b/src/hotspot/share/jvmci/jvmciExceptions.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -27,7 +27,7 @@ class JVMCIEnv; -// JVMCIEnv exception utility macros. Analagous to the regular CHECK, TRAP and THREAD macros. +// JVMCIEnv exception utility macros. Analogous to the regular CHECK, TRAP and THREAD macros. #define JVMCIENV __jvmci_env__ #define JVMCI_TRAPS JVMCIEnv* JVMCIENV diff --git a/src/hotspot/share/jvmci/jvmciRuntime.cpp b/src/hotspot/share/jvmci/jvmciRuntime.cpp index ae9c77b36e3..4ffe18dc626 100644 --- a/src/hotspot/share/jvmci/jvmciRuntime.cpp +++ b/src/hotspot/share/jvmci/jvmciRuntime.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -279,7 +279,7 @@ JRT_ENTRY_NO_ASYNC(static address, exception_handler_for_pc_helper(JavaThread* c // for AbortVMOnException flag Exceptions::debug_check_abort(exception); - // Check the stack guard pages and reenable them if necessary and there is + // Check the stack guard pages and re-enable them if necessary and there is // enough space on the stack to do so. Use fast exceptions only if the guard // pages are enabled. bool guard_pages_enabled = current->stack_overflow_state()->reguard_stack_if_needed(); diff --git a/src/hotspot/share/jvmci/jvmciRuntime.hpp b/src/hotspot/share/jvmci/jvmciRuntime.hpp index f5181c49c82..0dfff8dd0d7 100644 --- a/src/hotspot/share/jvmci/jvmciRuntime.hpp +++ b/src/hotspot/share/jvmci/jvmciRuntime.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -414,7 +414,7 @@ class JVMCIRuntime: public CHeapObj { // A helper to allow invocation of an arbitrary Java method. For simplicity the method is // restricted to a static method that takes at most one argument. For calling convention - // simplicty all types are passed by being converted into a jlong + // simplicity all types are passed by being converted into a jlong static jlong invoke_static_method_one_arg(JavaThread* current, Method* method, jlong argument); // Test only function diff --git a/src/hotspot/share/libadt/dict.hpp b/src/hotspot/share/libadt/dict.hpp index 97007883e94..9e56dbc7e4e 100644 --- a/src/hotspot/share/libadt/dict.hpp +++ b/src/hotspot/share/libadt/dict.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -55,7 +55,7 @@ class Dict : public ResourceObj { // Dictionary structure public: friend class DictI; // Friendly iterator function - // cmp is a key comparision routine. hash is a routine to hash a key. + // cmp is a key comparison routine. hash is a routine to hash a key. Dict(CmpKey cmp, Hash hash); Dict(CmpKey cmp, Hash hash, Arena* arena, int size = 16); Dict(const Dict &base, Arena* arena); // Deep-copy diff --git a/src/hotspot/share/logging/logAsyncWriter.cpp b/src/hotspot/share/logging/logAsyncWriter.cpp index ab040ba61f8..d59bd092bc4 100644 --- a/src/hotspot/share/logging/logAsyncWriter.cpp +++ b/src/hotspot/share/logging/logAsyncWriter.cpp @@ -66,7 +66,7 @@ void AsyncLogWriter::enqueue(LogFileStreamOutput& output, const LogDecorations& } } -// LogMessageBuffer consists of a multiple-part/multiple-line messsage. +// LogMessageBuffer consists of a multiple-part/multiple-line message. // The lock here guarantees its integrity. void AsyncLogWriter::enqueue(LogFileStreamOutput& output, LogMessageBuffer::Iterator msg_iterator) { AsyncLogLocker locker; diff --git a/src/hotspot/share/logging/logAsyncWriter.hpp b/src/hotspot/share/logging/logAsyncWriter.hpp index 6c8ddfbaf7f..5ff37f57286 100644 --- a/src/hotspot/share/logging/logAsyncWriter.hpp +++ b/src/hotspot/share/logging/logAsyncWriter.hpp @@ -133,7 +133,7 @@ typedef ResourceHashtable class MmapArrayAllocator : public AllStatic { diff --git a/src/hotspot/share/memory/heapInspection.cpp b/src/hotspot/share/memory/heapInspection.cpp index da5a793cb91..a54fa97a7a0 100644 --- a/src/hotspot/share/memory/heapInspection.cpp +++ b/src/hotspot/share/memory/heapInspection.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -436,7 +436,7 @@ static void print_indent(outputStream* st, int indent) { } } -// Print the class name and its unique ClassLoader identifer. +// Print the class name and its unique ClassLoader identifier. static void print_classname(outputStream* st, Klass* klass) { oop loader_oop = klass->class_loader_data()->class_loader(); st->print("%s/", klass->external_name()); @@ -468,7 +468,7 @@ void KlassHierarchy::print_class(outputStream* st, KlassInfoEntry* cie, bool pri print_indent(st, indent); if (indent != 0) st->print("--"); - // Print the class name, its unique ClassLoader identifer, and if it is an interface. + // Print the class name, its unique ClassLoader identifier, and if it is an interface. print_classname(st, klass); if (klass->is_interface()) { st->print(" (intf)"); diff --git a/src/hotspot/share/memory/iterator.hpp b/src/hotspot/share/memory/iterator.hpp index d442cd1ccdd..9f707a266f5 100644 --- a/src/hotspot/share/memory/iterator.hpp +++ b/src/hotspot/share/memory/iterator.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -289,7 +289,7 @@ class VoidClosure : public StackObj { // YieldClosure is intended for use by iteration loops // to incrementalize their work, allowing interleaving -// of an interruptable task so as to allow other +// of an interruptible task so as to allow other // threads to run (which may not otherwise be able to access // exclusive resources, for instance). Additionally, the // closure also allows for aborting an ongoing iteration diff --git a/src/hotspot/share/memory/memRegion.cpp b/src/hotspot/share/memory/memRegion.cpp index ed8adc7df94..5712cfc0057 100644 --- a/src/hotspot/share/memory/memRegion.cpp +++ b/src/hotspot/share/memory/memRegion.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -28,7 +28,7 @@ #include "memory/memRegion.hpp" #include "runtime/globals.hpp" -// A very simple data structure representing a contigous word-aligned +// A very simple data structure representing a contiguous word-aligned // region of address space. MemRegion MemRegion::intersection(const MemRegion mr2) const { diff --git a/src/hotspot/share/memory/memRegion.hpp b/src/hotspot/share/memory/memRegion.hpp index 53756448154..e3eb39195d7 100644 --- a/src/hotspot/share/memory/memRegion.hpp +++ b/src/hotspot/share/memory/memRegion.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -29,7 +29,7 @@ #include "utilities/debug.hpp" #include "utilities/globalDefinitions.hpp" -// A very simple data structure representing a contigous region +// A very simple data structure representing a contiguous region // region of address space. // Note that MemRegions are typically passed by value, not by reference. diff --git a/src/hotspot/share/memory/metaspace.cpp b/src/hotspot/share/memory/metaspace.cpp index d2fadba3a09..b82b7e913a3 100644 --- a/src/hotspot/share/memory/metaspace.cpp +++ b/src/hotspot/share/memory/metaspace.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2017, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -457,7 +457,7 @@ void MetaspaceGC::compute_new_size() { if (expand_bytes >= MinMetaspaceExpansion) { size_t new_capacity_until_GC = 0; bool succeeded = MetaspaceGC::inc_capacity_until_GC(expand_bytes, &new_capacity_until_GC); - assert(succeeded, "Should always succesfully increment HWM when at safepoint"); + assert(succeeded, "Should always successfully increment HWM when at safepoint"); Metaspace::tracer()->report_gc_threshold(capacity_until_GC, new_capacity_until_GC, @@ -764,7 +764,7 @@ void Metaspace::global_initialize() { // If CompressedClassSpaceBaseAddress is set, we attempt to force-map class space to // the given address. This is a debug-only feature aiding tests. Due to the ASLR lottery - // this may fail, in which case the VM will exit after printing an appropiate message. + // this may fail, in which case the VM will exit after printing an appropriate message. // Tests using this switch should cope with that. if (CompressedClassSpaceBaseAddress != 0) { base = (address)CompressedClassSpaceBaseAddress; @@ -777,7 +777,7 @@ void Metaspace::global_initialize() { rs = ReservedSpace(size, Metaspace::reserve_alignment(), os::vm_page_size() /* large */, (char*)base); if (rs.is_reserved()) { - log_info(metaspace)("Sucessfully forced class space address to " PTR_FORMAT, p2i(base)); + log_info(metaspace)("Successfully forced class space address to " PTR_FORMAT, p2i(base)); } else { vm_exit_during_initialization( err_msg("CompressedClassSpaceBaseAddress=" PTR_FORMAT " given, but reserving class space failed.", diff --git a/src/hotspot/share/memory/metaspace/chunkManager.cpp b/src/hotspot/share/memory/metaspace/chunkManager.cpp index 6c80ee8898b..45f40c2db03 100644 --- a/src/hotspot/share/memory/metaspace/chunkManager.cpp +++ b/src/hotspot/share/memory/metaspace/chunkManager.cpp @@ -152,7 +152,7 @@ Metachunk* ChunkManager::get_chunk(chunklevel_t preferred_level, chunklevel_t ma if (c == NULL) { c = _chunks.search_chunk_ascending(preferred_level, max_level, min_committed_words); } - // if we did not get anything yet, there are no free chunks commmitted enough. Repeat search but look for uncommitted chunks too: + // if we did not get anything yet, there are no free chunks committed enough. Repeat search but look for uncommitted chunks too: // 4) Search best or smaller chunks, can be uncommitted: if (c == NULL) { c = _chunks.search_chunk_ascending(preferred_level, max_level, 0); diff --git a/src/hotspot/share/memory/metaspace/commitMask.hpp b/src/hotspot/share/memory/metaspace/commitMask.hpp index 15f7ab3244c..7a769836ad8 100644 --- a/src/hotspot/share/memory/metaspace/commitMask.hpp +++ b/src/hotspot/share/memory/metaspace/commitMask.hpp @@ -61,7 +61,7 @@ class CommitMask : public CHeapBitMap { } // Marks a single commit granule as committed (value == true) - // or uncomitted (value == false) and returns + // or uncommitted (value == false) and returns // its prior state. bool mark_granule(idx_t bitno, bool value) { bool b = at(bitno); diff --git a/src/hotspot/share/memory/metaspace/freeChunkList.hpp b/src/hotspot/share/memory/metaspace/freeChunkList.hpp index be82b24f125..7f63e61d941 100644 --- a/src/hotspot/share/memory/metaspace/freeChunkList.hpp +++ b/src/hotspot/share/memory/metaspace/freeChunkList.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -136,7 +136,7 @@ public: assert(contains(c) == false, "Chunk already in freelist"); assert(_first == NULL || _first->level() == c->level(), "List should only contains chunks of the same level."); - // Uncomitted chunks go to the back, fully or partially committed to the front. + // Uncommitted chunks go to the back, fully or partially committed to the front. if (c->committed_words() == 0) { add_back(c); } else { diff --git a/src/hotspot/share/memory/metaspace/metachunk.cpp b/src/hotspot/share/memory/metaspace/metachunk.cpp index a45de290582..58f8908daee 100644 --- a/src/hotspot/share/memory/metaspace/metachunk.cpp +++ b/src/hotspot/share/memory/metaspace/metachunk.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2017, 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -214,7 +214,7 @@ void Metachunk::verify_neighborhood() const { // One of the neighbors must be the buddy. It can be whole or splintered. - // The chunk following us or preceeding us may be our buddy or a splintered part of it. + // The chunk following us or preceding us may be our buddy or a splintered part of it. Metachunk* buddy = is_leader() ? next_in_vs() : prev_in_vs(); assert(buddy != NULL, "Missing neighbor."); assert(!buddy->is_dead(), "Invalid buddy state."); diff --git a/src/hotspot/share/memory/metaspace/metachunk.hpp b/src/hotspot/share/memory/metaspace/metachunk.hpp index 4f48346b78d..3ee322e86e7 100644 --- a/src/hotspot/share/memory/metaspace/metachunk.hpp +++ b/src/hotspot/share/memory/metaspace/metachunk.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2017, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -101,7 +101,7 @@ class VirtualSpaceNode; // at the base of the payload (since that's where we allocate). // // The Metachunk keeps track of how much space is committed starting -// at the base of the payload - which is a performace optimization - +// at the base of the payload - which is a performance optimization - // while underlying layers (VirtualSpaceNode->commitmask) keep track // of the "real" commit state, aka which granules are committed, // independent on what chunks reside above those granules. @@ -347,7 +347,7 @@ public: return base() <= p && p < top(); } - // Returns true if given pointer points into the commmitted payload area of this chunk. + // Returns true if given pointer points into the committed payload area of this chunk. bool is_valid_committed_pointer(const MetaWord* p) const { return base() <= p && p < committed_top(); } diff --git a/src/hotspot/share/memory/metaspace/metaspaceArena.cpp b/src/hotspot/share/memory/metaspace/metaspaceArena.cpp index 85080b5d4c2..abe153e8df0 100644 --- a/src/hotspot/share/memory/metaspace/metaspaceArena.cpp +++ b/src/hotspot/share/memory/metaspace/metaspaceArena.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -174,7 +174,7 @@ bool MetaspaceArena::attempt_enlarge_current_chunk(size_t requested_word_size) { Metachunk* c = current_chunk(); assert(c->free_words() < requested_word_size, "Sanity"); - // Not if chunk enlargment is switched off... + // Not if chunk enlargement is switched off... if (Settings::enlarge_chunks_in_place() == false) { return false; } diff --git a/src/hotspot/share/memory/metaspace/metaspaceArena.hpp b/src/hotspot/share/memory/metaspace/metaspaceArena.hpp index 0093e7d15fa..8dcc8da517e 100644 --- a/src/hotspot/share/memory/metaspace/metaspaceArena.hpp +++ b/src/hotspot/share/memory/metaspace/metaspaceArena.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -67,7 +67,7 @@ struct ArenaStats; // // -// When the current chunk is used up, MetaspaceArena requestes a new chunk from +// When the current chunk is used up, MetaspaceArena requests a new chunk from // the associated ChunkManager. // // MetaspaceArena also keeps a FreeBlocks structure to manage memory blocks which diff --git a/src/hotspot/share/memory/metaspace/metaspaceSettings.cpp b/src/hotspot/share/memory/metaspace/metaspaceSettings.cpp index 6be39326d07..68000695571 100644 --- a/src/hotspot/share/memory/metaspace/metaspaceSettings.cpp +++ b/src/hotspot/share/memory/metaspace/metaspaceSettings.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -50,7 +50,7 @@ void Settings::ergo_initialize() { _commit_granule_bytes = MAX2((size_t)os::vm_page_size(), 64 * K); _commit_granule_words = _commit_granule_bytes / BytesPerWord; // In "none" reclamation mode, we do not uncommit, and we commit new chunks fully; - // that very closely mimicks the behaviour of old Metaspace. + // that very closely mimics the behaviour of old Metaspace. _new_chunks_are_fully_committed = true; _uncommit_free_chunks = false; } else if (strcmp(MetaspaceReclaimPolicy, "aggressive") == 0) { diff --git a/src/hotspot/share/memory/metaspace/testHelpers.hpp b/src/hotspot/share/memory/metaspace/testHelpers.hpp index ddcdce23930..669a3f61226 100644 --- a/src/hotspot/share/memory/metaspace/testHelpers.hpp +++ b/src/hotspot/share/memory/metaspace/testHelpers.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -85,7 +85,7 @@ public: // Note: limit == 0 means unlimited // Reserve limit > 0 simulates a non-expandable VirtualSpaceList (like CompressedClassSpace) - // Commit limit > 0 simulates a limit to max commitable space (like MaxMetaspaceSize) + // Commit limit > 0 simulates a limit to max committable space (like MaxMetaspaceSize) MetaspaceTestContext(const char* name, size_t commit_limit = 0, size_t reserve_limit = 0); ~MetaspaceTestContext(); diff --git a/src/hotspot/share/memory/metaspace/virtualSpaceNode.hpp b/src/hotspot/share/memory/metaspace/virtualSpaceNode.hpp index 0a1726601ab..5d83f4ea2d4 100644 --- a/src/hotspot/share/memory/metaspace/virtualSpaceNode.hpp +++ b/src/hotspot/share/memory/metaspace/virtualSpaceNode.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2018, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -52,7 +52,7 @@ class FreeChunkListVector; // which may be committed or uncommitted independently from each other. // // (Both root chunk areas and commit granules have not much to do with each other - one is a way to -// reserve memory for the upper regions, see ChunkManager. One is a way to manage commited memory.) +// reserve memory for the upper regions, see ChunkManager. One is a way to manage committed memory.) // // VirtualSpaceNode: // - exposes a function to allocate a new root chunk (see VirtualSpaceNode::allocate_root_chunk()). diff --git a/src/hotspot/share/memory/metaspaceStats.hpp b/src/hotspot/share/memory/metaspaceStats.hpp index 6a8a9735458..33040b361a8 100644 --- a/src/hotspot/share/memory/metaspaceStats.hpp +++ b/src/hotspot/share/memory/metaspaceStats.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2021 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -33,7 +33,7 @@ // retrieve with MetaspaceUtils::get_statistics(MetadataType) for either class space // or non-class space // -// - MetaspaceCombinedStats: keeps reserved, committed and used byte counters, seperately for both class- and non-class-space; +// - MetaspaceCombinedStats: keeps reserved, committed and used byte counters, separately for both class- and non-class-space; // retrieve with MetaspaceUtils::get_combined_statistics() // (Note: just for NMT these objects need to be mutable) diff --git a/src/hotspot/share/memory/universe.cpp b/src/hotspot/share/memory/universe.cpp index ef244b66912..4b98f6977a4 100644 --- a/src/hotspot/share/memory/universe.cpp +++ b/src/hotspot/share/memory/universe.cpp @@ -1221,7 +1221,7 @@ void LatestMethodCache::init(Klass* k, Method* m) { } #ifndef PRODUCT else { - // sharing initilization should have already set up _klass + // sharing initialization should have already set up _klass assert(_klass != NULL, "just checking"); } #endif diff --git a/src/hotspot/share/metaprogramming/enableIf.hpp b/src/hotspot/share/metaprogramming/enableIf.hpp index 83377f18f9e..66ab39944b7 100644 --- a/src/hotspot/share/metaprogramming/enableIf.hpp +++ b/src/hotspot/share/metaprogramming/enableIf.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2017, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -96,7 +96,7 @@ using EnableIf = std::enable_if; // separate from its declaration cannot have a default value. Thus, // ENABLE_IF can't be used in such a definition. But the type expression in // the separate definition must be equivalent (C++14 14.4 and 14.5.6.1) to -// that in the declation. The ENABLE_IF_SDEFN macro provides the common +// that in the declaration. The ENABLE_IF_SDEFN macro provides the common // code for the separate definition that must match the corresponding // declaration code at the token level. // diff --git a/src/hotspot/share/oops/accessDecorators.hpp b/src/hotspot/share/oops/accessDecorators.hpp index 976f2e355e1..4235b4b2e9a 100644 --- a/src/hotspot/share/oops/accessDecorators.hpp +++ b/src/hotspot/share/oops/accessDecorators.hpp @@ -131,7 +131,7 @@ const DecoratorSet MO_DECORATOR_MASK = MO_UNORDERED | MO_RELAXED | // === Barrier Strength Decorators === // * AS_RAW: The access will translate into a raw memory access, hence ignoring all semantic concerns // except memory ordering and compressed oops. This will bypass runtime function pointer dispatching -// in the pipeline and hardwire to raw accesses without going trough the GC access barriers. +// in the pipeline and hardwire to raw accesses without going through the GC access barriers. // - Accesses on oop* translate to raw memory accesses without runtime checks // - Accesses on narrowOop* translate to encoded/decoded memory accesses without runtime checks // - Accesses on HeapWord* translate to a runtime check choosing one of the above diff --git a/src/hotspot/share/oops/arrayKlass.cpp b/src/hotspot/share/oops/arrayKlass.cpp index 5a276fda3d6..c3b0182114b 100644 --- a/src/hotspot/share/oops/arrayKlass.cpp +++ b/src/hotspot/share/oops/arrayKlass.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -99,7 +99,7 @@ ArrayKlass::ArrayKlass(Symbol* name, KlassKind kind) : } -// Initialization of vtables and mirror object is done separatly from base_create_array_klass, +// Initialization of vtables and mirror object is done separately from base_create_array_klass, // since a GC can happen. At this point all instance variables of the ArrayKlass must be setup. void ArrayKlass::complete_create_array_klass(ArrayKlass* k, Klass* super_klass, ModuleEntry* module_entry, TRAPS) { k->initialize_supers(super_klass, NULL, CHECK); diff --git a/src/hotspot/share/oops/compressedOops.cpp b/src/hotspot/share/oops/compressedOops.cpp index bb050673e11..48ab9ae0afb 100644 --- a/src/hotspot/share/oops/compressedOops.cpp +++ b/src/hotspot/share/oops/compressedOops.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -226,7 +226,7 @@ void CompressedKlassPointers::initialize(address addr, size_t len) { // and shift should be zero. The simplest way to fix this for now is to force // shift to zero for both runtime and dumptime. // Note however that this is not a perfect solution. Ideally this whole function - // should be CDS agnostic, that would simplify it - and testing - alot. See JDK-8267141 + // should be CDS agnostic, that would simplify it - and testing - a lot. See JDK-8267141 // for details. shift = 0; diff --git a/src/hotspot/share/oops/constantPool.cpp b/src/hotspot/share/oops/constantPool.cpp index d12ccd64cb6..46b4e4575ae 100644 --- a/src/hotspot/share/oops/constantPool.cpp +++ b/src/hotspot/share/oops/constantPool.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -472,7 +472,7 @@ Klass* ConstantPool::klass_at_impl(const constantPoolHandle& this_cp, int which, // A resolved constantPool entry will contain a Klass*, otherwise a Symbol*. // It is not safe to rely on the tag bit's here, since we don't have a lock, and - // the entry and tag is not updated atomicly. + // the entry and tag is not updated atomically. CPKlassSlot kslot = this_cp->klass_slot_at(which); int resolved_klass_index = kslot.resolved_klass_index(); int name_index = kslot.name_index(); @@ -2205,7 +2205,7 @@ int ConstantPool::copy_cpool_bytes(int cpool_size, } assert(size == cpool_size, "Size mismatch"); - // Keep temorarily for debugging until it's stable. + // Keep temporarily for debugging until it's stable. DBG(print_cpool_bytes(cnt, start_bytes)); return (int)(bytes - start_bytes); } /* end copy_cpool_bytes */ diff --git a/src/hotspot/share/oops/constantPool.hpp b/src/hotspot/share/oops/constantPool.hpp index 3cbe702d4c3..4fddadae088 100644 --- a/src/hotspot/share/oops/constantPool.hpp +++ b/src/hotspot/share/oops/constantPool.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -201,7 +201,7 @@ class ConstantPool : public Metadata { void copy_fields(const ConstantPool* orig); - // Redefine classes support. If a method refering to this constant pool + // Redefine classes support. If a method referring to this constant pool // is on the executing stack, or as a handle in vm code, this constant pool // can't be removed from the set of previous versions saved in the instance // class. @@ -885,7 +885,7 @@ class ConstantPool : public Metadata { void deallocate_contents(ClassLoaderData* loader_data); void release_C_heap_structures(); - // JVMTI accesss - GetConstantPool, RetransformClasses, ... + // JVMTI access - GetConstantPool, RetransformClasses, ... friend class JvmtiConstantPoolReconstituter; private: diff --git a/src/hotspot/share/oops/fieldInfo.hpp b/src/hotspot/share/oops/fieldInfo.hpp index 3e1836c6574..bee2e21213c 100644 --- a/src/hotspot/share/oops/fieldInfo.hpp +++ b/src/hotspot/share/oops/fieldInfo.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -148,7 +148,7 @@ class FieldInfo { void set_contended_group(u2 val) { assert((_shorts[low_packed_offset] & FIELDINFO_TAG_OFFSET) == 0, "Offset must not have been set"); - assert((_shorts[low_packed_offset] & FIELDINFO_TAG_CONTENDED) == 0, "Overwritting contended group"); + assert((_shorts[low_packed_offset] & FIELDINFO_TAG_CONTENDED) == 0, "Overwriting contended group"); _shorts[low_packed_offset] |= FIELDINFO_TAG_CONTENDED; _shorts[high_packed_offset] = val; } diff --git a/src/hotspot/share/oops/generateOopMap.cpp b/src/hotspot/share/oops/generateOopMap.cpp index 2ff3bd61b15..8f5dee06a43 100644 --- a/src/hotspot/share/oops/generateOopMap.cpp +++ b/src/hotspot/share/oops/generateOopMap.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -972,7 +972,7 @@ void GenerateOopMap::init_basic_blocks() { bbNo++; } - // Remember prevous bci. + // Remember previous bci. prev_bci = bci; } // Set @@ -1156,7 +1156,7 @@ void GenerateOopMap::interp_bb(BasicBlock *bb) { if (itr.code() == Bytecodes::_ret) { assert(!fall_through, "cannot be set if ret instruction"); - // Automatically handles 'wide' ret indicies + // Automatically handles 'wide' ret indices ret_jump_targets_do(&itr, GenerateOopMap::merge_state, itr.get_index(), NULL); } else if (fall_through) { // Hit end of BB, but the instr. was a fall-through instruction, @@ -1754,7 +1754,7 @@ void GenerateOopMap::ppop_any(int poplen) { } } -// Replace all occurences of the state 'match' with the state 'replace' +// Replace all occurrences of the state 'match' with the state 'replace' // in our current state vector. void GenerateOopMap::replace_all_CTS_matches(CellTypeState match, CellTypeState replace) { @@ -2346,7 +2346,7 @@ bool GenerateOopMap::rewrite_refval_conflict_inst(BytecodeStream *itr, int from, return rewrite_load_or_store(itr, Bytecodes::_astore, Bytecodes::_astore_0, to); } else { if (TraceOopMapRewrites) { - tty->print_cr("Supress rewriting of astore at bci: %d", bci); + tty->print_cr("Suppress rewriting of astore at bci: %d", bci); } } } @@ -2377,7 +2377,7 @@ bool GenerateOopMap::rewrite_load_or_store(BytecodeStream *bcs, Bytecodes::Code // If we need to relocate in order to patch the byte, we // do the patching in a temp. buffer, that is passed to the reloc. // The patching of the bytecode stream is then done by the Relocator. - // This is neccesary, since relocating the instruction at a certain bci, might + // This is necessary, since relocating the instruction at a certain bci, might // also relocate that instruction, e.g., if a _goto before it gets widen to a _goto_w. // Hence, we do not know which bci to patch after relocation. @@ -2429,7 +2429,7 @@ class RelocCallback : public RelocatorListener { } }; -// Returns true if expanding was succesful. Otherwise, reports an error and +// Returns true if expanding was successful. Otherwise, reports an error and // returns false. void GenerateOopMap::expand_current_instr(int bci, int ilen, int newIlen, u_char inst_buffer[]) { JavaThread* THREAD = JavaThread::current(); // For exception macros. diff --git a/src/hotspot/share/oops/generateOopMap.hpp b/src/hotspot/share/oops/generateOopMap.hpp index 734f85e1bc2..8ab15c92b84 100644 --- a/src/hotspot/share/oops/generateOopMap.hpp +++ b/src/hotspot/share/oops/generateOopMap.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -38,7 +38,7 @@ class BasicBlock; class CellTypeState; class StackMap; -// These two should be removed. But requires som code to be cleaned up +// These two should be removed. But requires some code to be cleaned up #define MAXARGSIZE 256 // This should be enough #define MAX_LOCAL_VARS 65536 // 16-bit entry @@ -47,7 +47,7 @@ typedef void (*jmpFct_t)(GenerateOopMap *c, int bcpDelta, int* data); // RetTable // -// Contains maping between jsr targets and there return addresses. One-to-many mapping +// Contains mapping between jsr targets and there return addresses. One-to-many mapping // class RetTableEntry : public ResourceObj { private: @@ -304,7 +304,7 @@ class GenerateOopMap { bool _got_error; // True, if an error occurred during interpretation. Handle _exception; // Exception if got_error is true. bool _did_rewriting; // was bytecodes rewritten - bool _did_relocation; // was relocation neccessary + bool _did_relocation; // was relocation necessary bool _monitor_safe; // The monitors in this method have been determined // to be safe. @@ -414,7 +414,7 @@ class GenerateOopMap { // Create result set bool _report_result; - bool _report_result_for_send; // Unfortunatly, stackmaps for sends are special, so we need some extra + bool _report_result_for_send; // Unfortunately, stackmaps for sends are special, so we need some extra BytecodeStream *_itr_send; // variables to handle them properly. void report_result (); @@ -450,7 +450,7 @@ class GenerateOopMap { int binsToHold (int no) { return ((no+(BitsPerWord-1))/BitsPerWord); } char *state_vec_to_string (CellTypeState* vec, int len); - // Helper method. Can be used in subclasses to fx. calculate gc_points. If the current instuction + // Helper method. Can be used in subclasses to fx. calculate gc_points. If the current instruction // is a control transfer, then calls the jmpFct all possible destinations. void ret_jump_targets_do (BytecodeStream *bcs, jmpFct_t jmpFct, int varNo,int *data); bool jump_targets_do (BytecodeStream *bcs, jmpFct_t jmpFct, int *data); @@ -485,7 +485,7 @@ class GenerateOopMap { // number of gc points // - fill_stackmap_for_opcodes is called once for each bytecode index in order (0...code_length-1) // - fill_stackmap_epilog is called after all results has been reported. Note: Since the algorithm does not report - // stackmaps for deadcode, fewer gc_points might have been encounted than assumed during the epilog. It is the + // stackmaps for deadcode, fewer gc_points might have been encountered than assumed during the epilog. It is the // responsibility of the subclass to count the correct number. // - fill_init_vars are called once with the result of the init_vars computation // @@ -543,7 +543,7 @@ class ResolveOopMapConflicts: public GenerateOopMap { // -// Subclass used by the compiler to generate pairing infomation +// Subclass used by the compiler to generate pairing information // class GeneratePairingInfo: public GenerateOopMap { private: diff --git a/src/hotspot/share/oops/instanceKlass.cpp b/src/hotspot/share/oops/instanceKlass.cpp index 7e761c07f66..ca98bbe1520 100644 --- a/src/hotspot/share/oops/instanceKlass.cpp +++ b/src/hotspot/share/oops/instanceKlass.cpp @@ -775,7 +775,7 @@ void InstanceKlass::eager_initialize_impl() { if (old_state != _init_state) set_init_state(old_state); } else { - // linking successfull, mark class as initialized + // linking successful, mark class as initialized set_init_state(fully_initialized); fence_and_clear_init_lock(); // trace diff --git a/src/hotspot/share/oops/instanceKlass.hpp b/src/hotspot/share/oops/instanceKlass.hpp index 91465272631..17784107d0a 100644 --- a/src/hotspot/share/oops/instanceKlass.hpp +++ b/src/hotspot/share/oops/instanceKlass.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -148,7 +148,7 @@ class InstanceKlass: public Klass { loaded, // loaded and inserted in class hierarchy (but not linked yet) linked, // successfully linked/verified (but not initialized yet) being_initialized, // currently running class initializer - fully_initialized, // initialized (successfull final state) + fully_initialized, // initialized (successful final state) initialization_error // error happened during initialization }; diff --git a/src/hotspot/share/oops/klass.cpp b/src/hotspot/share/oops/klass.cpp index 856669e44ca..4f2e4dea2a0 100644 --- a/src/hotspot/share/oops/klass.cpp +++ b/src/hotspot/share/oops/klass.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -197,7 +197,7 @@ void* Klass::operator new(size_t size, ClassLoaderData* loader_data, size_t word return Metaspace::allocate(loader_data, word_size, MetaspaceObj::ClassType, THREAD); } -// "Normal" instantiation is preceeded by a MetaspaceObj allocation +// "Normal" instantiation is preceded by a MetaspaceObj allocation // which zeros out memory - calloc equivalent. // The constructor is also used from CppVtableCloner, // which doesn't zero out the memory before calling the constructor. diff --git a/src/hotspot/share/oops/klassVtable.cpp b/src/hotspot/share/oops/klassVtable.cpp index f96db693de3..416d9ec0045 100644 --- a/src/hotspot/share/oops/klassVtable.cpp +++ b/src/hotspot/share/oops/klassVtable.cpp @@ -1147,7 +1147,7 @@ void klassItable::initialize_itable(GrowableArray* supers) { _klass->is_interface() || _klass->itable_length() == itableOffsetEntry::size()) return; - // There's alway an extra itable entry so we can null-terminate it. + // There's always an extra itable entry so we can null-terminate it. guarantee(size_offset_table() >= 1, "too small"); int num_interfaces = size_offset_table() - 1; if (num_interfaces > 0) { @@ -1508,7 +1508,7 @@ int klassItable::compute_itable_size(Array* transitive_interface CountInterfacesClosure cic; visit_all_interfaces(transitive_interfaces, &cic); - // There's alway an extra itable entry so we can null-terminate it. + // There's always an extra itable entry so we can null-terminate it. int itable_size = calc_itable_size(cic.nof_interfaces() + 1, cic.nof_methods()); return itable_size; diff --git a/src/hotspot/share/oops/klassVtable.hpp b/src/hotspot/share/oops/klassVtable.hpp index d00972f4c78..73dd9ae61fa 100644 --- a/src/hotspot/share/oops/klassVtable.hpp +++ b/src/hotspot/share/oops/klassVtable.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -151,7 +151,7 @@ class klassVtable { bool is_interface); void verify_against(outputStream* st, klassVtable* vt, int index); inline InstanceKlass* ik() const; - // When loading a class from CDS archive at run time, and no class redefintion + // When loading a class from CDS archive at run time, and no class redefinition // has happened, it is expected that the class's itable/vtables are // laid out exactly the same way as they had been during dump time. // Therefore, in klassVtable::initialize_[iv]table, we do not layout the diff --git a/src/hotspot/share/oops/method.cpp b/src/hotspot/share/oops/method.cpp index 490ca305046..b3f45753fb1 100644 --- a/src/hotspot/share/oops/method.cpp +++ b/src/hotspot/share/oops/method.cpp @@ -516,7 +516,7 @@ bool Method::register_native(Klass* k, Symbol* name, Symbol* signature, address bool Method::was_executed_more_than(int n) { // Invocation counter is reset when the Method* is compiled. // If the method has compiled code we therefore assume it has - // be excuted more than n times. + // be executed more than n times. if (is_accessor() || is_empty_method() || (code() != NULL)) { // interpreter doesn't bump invocation counter of trivial methods // compiler does not bump invocation counter of compiled methods @@ -1000,7 +1000,7 @@ void Method::set_native_function(address function, bool post_event_flag) { // be passed when post_event_flag is false. assert(function != SharedRuntime::native_method_throw_unsatisfied_link_error_entry(), - "post_event_flag mis-match"); + "post_event_flag mismatch"); // post the bind event, and possible change the bind function JvmtiExport::post_native_method_bind(this, &function); @@ -1372,7 +1372,7 @@ bool Method::is_ignored_by_security_stack_walk() const { return true; } if (method_holder()->is_subclass_of(vmClasses::reflect_MethodAccessorImpl_klass())) { - // This is an auxilary frame -- ignore it + // This is an auxiliary frame -- ignore it return true; } if (is_method_handle_intrinsic() || is_compiled_lambda_form()) { diff --git a/src/hotspot/share/oops/methodData.cpp b/src/hotspot/share/oops/methodData.cpp index bc0b175f511..80dab37812d 100644 --- a/src/hotspot/share/oops/methodData.cpp +++ b/src/hotspot/share/oops/methodData.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -537,7 +537,7 @@ void BranchData::print_data_on(outputStream* st, const char* extra) const { // A MultiBranchData is used to access profiling information for // a multi-way branch (*switch bytecodes). It consists of a series // of (count, displacement) pairs, which count the number of times each -// case was taken and specify the data displacment for each branch target. +// case was taken and specify the data displacement for each branch target. int MultiBranchData::compute_cell_count(BytecodeStream* stream) { int cell_count = 0; diff --git a/src/hotspot/share/oops/methodData.hpp b/src/hotspot/share/oops/methodData.hpp index 55967e9ee19..ed3f85bab4f 100644 --- a/src/hotspot/share/oops/methodData.hpp +++ b/src/hotspot/share/oops/methodData.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -96,7 +96,7 @@ private: } _header; // The data layout has an arbitrary number of cells, each sized - // to accomodate a pointer or an integer. + // to accommodate a pointer or an integer. intptr_t _cells[1]; // Some types of data layouts need a length field. @@ -1604,7 +1604,7 @@ public: // A MultiBranchData is used to access profiling information for // a multi-way branch (*switch bytecodes). It consists of a series // of (count, displacement) pairs, which count the number of times each -// case was taken and specify the data displacment for each branch target. +// case was taken and specify the data displacement for each branch target. class MultiBranchData : public ArrayData { friend class VMStructs; friend class JVMCIVMStructs; @@ -1878,7 +1878,7 @@ public: // During interpretation, if profiling in enabled, the interpreter // maintains a method data pointer (mdp), which points at the entry // in the array corresponding to the current bci. In the course of -// intepretation, when a bytecode is encountered that has profile data +// interpretation, when a bytecode is encountered that has profile data // associated with it, the entry pointed to by mdp is updated, then the // mdp is adjusted to point to the next appropriate DataLayout. If mdp // is NULL to begin with, the interpreter assumes that the current method diff --git a/src/hotspot/share/oops/oop.inline.hpp b/src/hotspot/share/oops/oop.inline.hpp index d8ff94178c5..9491d71e2ed 100644 --- a/src/hotspot/share/oops/oop.inline.hpp +++ b/src/hotspot/share/oops/oop.inline.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -262,14 +262,14 @@ bool oopDesc::is_forwarded() const { void oopDesc::forward_to(oop p) { verify_forwardee(p); markWord m = markWord::encode_pointer_as_mark(p); - assert(m.decode_pointer() == p, "encoding must be reversable"); + assert(m.decode_pointer() == p, "encoding must be reversible"); set_mark(m); } oop oopDesc::forward_to_atomic(oop p, markWord compare, atomic_memory_order order) { verify_forwardee(p); markWord m = markWord::encode_pointer_as_mark(p); - assert(m.decode_pointer() == p, "encoding must be reversable"); + assert(m.decode_pointer() == p, "encoding must be reversible"); markWord old_mark = cas_set_mark(m, compare, order); if (old_mark == compare) { return NULL; diff --git a/src/hotspot/share/oops/symbol.hpp b/src/hotspot/share/oops/symbol.hpp index 703797a88fb..474d05893e6 100644 --- a/src/hotspot/share/oops/symbol.hpp +++ b/src/hotspot/share/oops/symbol.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -58,7 +58,7 @@ // ^ increment on lookup() // and not // Symbol* G = lookup() -// ^ increment on assignmnet +// ^ increment on assignment // The reference count must be decremented manually when the copy of the // pointer G is destroyed. // @@ -261,7 +261,7 @@ class Symbol : public MetaspaceObj { // 'java.lang.Object[][]'. void print_as_signature_external_return_type(outputStream *os); // Treating the symbol as a signature, print the parameter types - // seperated by ', ' to the outputStream. Prints external names as + // separated by ', ' to the outputStream. Prints external names as // 'double' or 'java.lang.Object[][]'. void print_as_signature_external_parameters(outputStream *os); diff --git a/src/hotspot/share/opto/arraycopynode.cpp b/src/hotspot/share/opto/arraycopynode.cpp index b0f30703f91..dc3bceaf45d 100644 --- a/src/hotspot/share/opto/arraycopynode.cpp +++ b/src/hotspot/share/opto/arraycopynode.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -336,7 +336,7 @@ bool ArrayCopyNode::prepare_array_copy(PhaseGVN *phase, bool can_reshape, adr_src = phase->transform(new AddPNode(base_src, base_src, src_offset)); adr_dest = phase->transform(new AddPNode(base_dest, base_dest, dest_offset)); - // The address is offseted to an aligned address where a raw copy would start. + // The address is offsetted to an aligned address where a raw copy would start. // If the clone copy is decomposed into load-stores - the address is adjusted to // point at where the array starts. const Type* toff = phase->type(src_offset); diff --git a/src/hotspot/share/opto/block.cpp b/src/hotspot/share/opto/block.cpp index 566dc4f2755..b13032225dc 100644 --- a/src/hotspot/share/opto/block.cpp +++ b/src/hotspot/share/opto/block.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1083,7 +1083,7 @@ void PhaseCFG::postalloc_expand(PhaseRegAlloc* _ra) { // Collect succs of old node in remove (for projections) and in succs (for // all other nodes) do _not_ collect projections in remove (but in succs) // in case the node is a call. We need the projections for calls as they are - // associated with registes (i.e. they are defs). + // associated with registers (i.e. they are defs). succs.clear(); for (DUIterator k = n->outs(); n->has_out(k); k++) { if (n->out(k)->is_Proj() && !n->is_MachCall() && !n->is_MachBranch()) { diff --git a/src/hotspot/share/opto/bytecodeInfo.cpp b/src/hotspot/share/opto/bytecodeInfo.cpp index 2da95b4edcc..36f6e93454a 100644 --- a/src/hotspot/share/opto/bytecodeInfo.cpp +++ b/src/hotspot/share/opto/bytecodeInfo.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -87,7 +87,7 @@ static bool is_init_with_ea(ciMethod* callee_method, return false; // EA is off } if (callee_method->is_initializer()) { - return true; // constuctor + return true; // constructor } if (caller_method->is_initializer() && caller_method != C->method() && diff --git a/src/hotspot/share/opto/c2_globals.hpp b/src/hotspot/share/opto/c2_globals.hpp index cc6d1d762da..7f96f71f7f8 100644 --- a/src/hotspot/share/opto/c2_globals.hpp +++ b/src/hotspot/share/opto/c2_globals.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -165,7 +165,7 @@ "Print New compiler peephole replacements") \ \ develop(bool, PrintCFGBlockFreq, false, \ - "Print CFG block freqencies") \ + "Print CFG block frequencies") \ \ develop(bool, TraceOptoParse, false, \ "Trace bytecode parse and control-flow merge") \ @@ -334,7 +334,7 @@ "Trace loop unswitching") \ \ product(bool, AllowVectorizeOnDemand, true, \ - "Globally supress vectorization set in VectorizeMethod") \ + "Globally suppress vectorization set in VectorizeMethod") \ \ product(bool, UseSuperWord, true, \ "Transform scalar operations into superword operations") \ @@ -529,7 +529,7 @@ "Use edge frequencies to drive block ordering") \ \ product(intx, BlockLayoutMinDiamondPercentage, 20, \ - "Miniumum %% of a successor (predecessor) for which block " \ + "Minimum %% of a successor (predecessor) for which block " \ "layout a will allow a fork (join) in a single chain") \ range(0, 100) \ \ diff --git a/src/hotspot/share/opto/callGenerator.cpp b/src/hotspot/share/opto/callGenerator.cpp index b987fe0f8fa..79c413ae016 100644 --- a/src/hotspot/share/opto/callGenerator.cpp +++ b/src/hotspot/share/opto/callGenerator.cpp @@ -417,7 +417,7 @@ class LateInlineMHCallGenerator : public LateInlineCallGenerator { bool LateInlineMHCallGenerator::do_late_inline_check(Compile* C, JVMState* jvms) { // When inlining a virtual call, the null check at the call and the call itself can throw. These 2 paths have different - // expression stacks which causes late inlining to break. The MH invoker is not expected to be called from a method wih + // expression stacks which causes late inlining to break. The MH invoker is not expected to be called from a method with // exception handlers. When there is no exception handler, GraphKit::builtin_throw() pops the stack which solves the issue // of late inlining with exceptions. assert(!jvms->method()->has_exception_handlers() || diff --git a/src/hotspot/share/opto/callnode.cpp b/src/hotspot/share/opto/callnode.cpp index 1209cc2d22a..0b5a70ee578 100644 --- a/src/hotspot/share/opto/callnode.cpp +++ b/src/hotspot/share/opto/callnode.cpp @@ -1363,7 +1363,7 @@ void SafePointNode::set_local(JVMState* jvms, uint idx, Node *c) { if (in(loc)->is_top() && idx > 0 && !c->is_top() ) { // If current local idx is top then local idx - 1 could // be a long/double that needs to be killed since top could - // represent the 2nd half ofthe long/double. + // represent the 2nd half of the long/double. uint ideal = in(loc -1)->ideal_reg(); if (ideal == Op_RegD || ideal == Op_RegL) { // set other (low index) half to top @@ -1752,7 +1752,7 @@ uint LockNode::size_of() const { return sizeof(*this); } // // Either of these cases subsumes the simple case of sequential control flow // -// Addtionally we can eliminate versions without the else case: +// Additionally we can eliminate versions without the else case: // // s(); // if (p) diff --git a/src/hotspot/share/opto/callnode.hpp b/src/hotspot/share/opto/callnode.hpp index 0907ec2b7b4..99295b215a6 100644 --- a/src/hotspot/share/opto/callnode.hpp +++ b/src/hotspot/share/opto/callnode.hpp @@ -205,7 +205,7 @@ private: uint _monoff; // Offset to monitors in input edge mapping uint _scloff; // Offset to fields of scalar objs in input edge mapping uint _endoff; // Offset to end of input edge mapping - uint _sp; // Jave Expression Stack Pointer for this state + uint _sp; // Java Expression Stack Pointer for this state int _bci; // Byte Code Index of this JVM point ReexecuteState _reexecute; // Whether this bytecode need to be re-executed ciMethod* _method; // Method Pointer diff --git a/src/hotspot/share/opto/cfgnode.cpp b/src/hotspot/share/opto/cfgnode.cpp index 3daff0b29eb..19517c3f861 100644 --- a/src/hotspot/share/opto/cfgnode.cpp +++ b/src/hotspot/share/opto/cfgnode.cpp @@ -1783,7 +1783,7 @@ static Node* split_flow_path(PhaseGVN *phase, PhiNode *phi) { // GVN transformations. For now it is Con, Proj, Phi, CastPP, CheckCastPP. // I mark Phi nodes as safe node not only because they can reference itself // but also to prevent mistaking the fallthrough case inside an outer loop -// as dead loop when the phi references itselfs through an other phi. +// as dead loop when the phi references itself through an other phi. PhiNode::LoopSafety PhiNode::simple_data_loop_check(Node *in) const { // It is unsafe loop if the phi node references itself directly. if (in == (Node*)this) diff --git a/src/hotspot/share/opto/cfgnode.hpp b/src/hotspot/share/opto/cfgnode.hpp index 3672eaa2ed3..f98fa4d2f87 100644 --- a/src/hotspot/share/opto/cfgnode.hpp +++ b/src/hotspot/share/opto/cfgnode.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -549,7 +549,7 @@ public: virtual const Type* Value(PhaseGVN* phase) const; }; -// CatchProjNode controls which exception handler is targetted after a call. +// CatchProjNode controls which exception handler is targeted after a call. // It is passed in the bci of the target handler, or no_handler_bci in case // the projection doesn't lead to an exception handler. class CatchProjNode : public CProjNode { diff --git a/src/hotspot/share/opto/chaitin.cpp b/src/hotspot/share/opto/chaitin.cpp index fe3c7983c63..86730a799e2 100644 --- a/src/hotspot/share/opto/chaitin.cpp +++ b/src/hotspot/share/opto/chaitin.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -373,7 +373,7 @@ void PhaseChaitin::Register_Allocate() { de_ssa(); #ifdef ASSERT - // Veify the graph before RA. + // Verify the graph before RA. verify(&live_arena); #endif @@ -593,7 +593,7 @@ void PhaseChaitin::Register_Allocate() { merge_multidefs(); #ifdef ASSERT - // Veify the graph after RA. + // Verify the graph after RA. verify(&live_arena); #endif diff --git a/src/hotspot/share/opto/chaitin.hpp b/src/hotspot/share/opto/chaitin.hpp index 2e9213b4bab..3134dbdb9c7 100644 --- a/src/hotspot/share/opto/chaitin.hpp +++ b/src/hotspot/share/opto/chaitin.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -260,10 +260,10 @@ public: PhaseIFG( Arena *arena ); void init( uint maxlrg ); - // Add edge between a and b. Returns true if actually addded. + // Add edge between a and b. Returns true if actually added. int add_edge( uint a, uint b ); - // Test for edge existance + // Test for edge existence int test_edge( uint a, uint b ) const; // Square-up matrix for faster Union diff --git a/src/hotspot/share/opto/coalesce.cpp b/src/hotspot/share/opto/coalesce.cpp index 3fa627d42cb..b95987c4b09 100644 --- a/src/hotspot/share/opto/coalesce.cpp +++ b/src/hotspot/share/opto/coalesce.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -324,7 +324,7 @@ void PhaseAggressiveCoalesce::insert_copies( Matcher &matcher ) { // Get the chosen name for the Node uint name = _phc._lrg_map.find(n); assert (name, "no 2-address specials"); - // Check for name mis-match on the 2-address input + // Check for name mismatch on the 2-address input Node *m = n->in(idx); if (_phc._lrg_map.find(m) != name) { Node *copy; diff --git a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp index 4abc035ee95..418a2cbda0f 100644 --- a/src/hotspot/share/opto/compile.cpp +++ b/src/hotspot/share/opto/compile.cpp @@ -3913,7 +3913,7 @@ bool Compile::final_graph_reshaping() { #ifdef IA32 // If original bytecodes contained a mixture of floats and doubles - // check if the optimizer has made it homogenous, item (3). + // check if the optimizer has made it homogeneous, item (3). if (UseSSE == 0 && frc.get_float_count() > 32 && frc.get_double_count() == 0 && @@ -4280,7 +4280,7 @@ void Compile::print_inlining_stream_free() { } // The message about the current inlining is accumulated in -// _print_inlining_stream and transfered into the _print_inlining_list +// _print_inlining_stream and transferred into the _print_inlining_list // once we know whether inlining succeeds or not. For regular // inlining, messages are appended to the buffer pointed by // _print_inlining_idx in the _print_inlining_list. For late inlining, @@ -4371,7 +4371,7 @@ void Compile::print_inlining_update_delayed(CallGenerator* cg) { } void Compile::print_inlining_assert_ready() { - assert(!_print_inlining || _print_inlining_stream->size() == 0, "loosing data"); + assert(!_print_inlining || _print_inlining_stream->size() == 0, "losing data"); } void Compile::process_print_inlining() { diff --git a/src/hotspot/share/opto/domgraph.cpp b/src/hotspot/share/opto/domgraph.cpp index 03b0c52ab55..0159d9bdc42 100644 --- a/src/hotspot/share/opto/domgraph.cpp +++ b/src/hotspot/share/opto/domgraph.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -526,7 +526,7 @@ int NTarjan::DFS( NTarjan *ntarjan, VectorSet &visited, PhaseIdealLoop *pil, uin w->_semi = dfsnum; // Node to DFS map w->_label = w; // DFS to vertex map w->_ancestor = NULL; // Fast LINK & EVAL setup - w->_child = &ntarjan[0]; // Sentinal + w->_child = &ntarjan[0]; // Sentinel w->_size = 1; w->_bucket = NULL; diff --git a/src/hotspot/share/opto/escape.cpp b/src/hotspot/share/opto/escape.cpp index 3e02b18f50f..53d285dcb3e 100644 --- a/src/hotspot/share/opto/escape.cpp +++ b/src/hotspot/share/opto/escape.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -169,7 +169,7 @@ bool ConnectionGraph::compute_escape() { oop_fields_worklist.append(ptn->as_Field()); } } - // Collect some interesting nodes for futher use. + // Collect some interesting nodes for further use. switch (n->Opcode()) { case Op_MergeMem: // Collect all MergeMem nodes to add memory slices for @@ -1554,7 +1554,7 @@ void ConnectionGraph::add_field_uses_to_worklist(FieldNode* field) { add_fields_to_worklist(field, base); // Check if the base was source object of arraycopy and go over arraycopy's // destination objects since values stored to a field of source object are - // accessable by uses (loads) of fields of destination objects. + // accessible by uses (loads) of fields of destination objects. if (base->arraycopy_src()) { for (UseIterator j(base); j.has_next(); j.next()) { PointsToNode* arycp = j.get(); diff --git a/src/hotspot/share/opto/escape.hpp b/src/hotspot/share/opto/escape.hpp index 20969920d77..613e7ae8db2 100644 --- a/src/hotspot/share/opto/escape.hpp +++ b/src/hotspot/share/opto/escape.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -34,7 +34,7 @@ // // [Choi99] Jong-Deok Shoi, Manish Gupta, Mauricio Seffano, // Vugranam C. Sreedhar, Sam Midkiff, -// "Escape Analysis for Java", Procedings of ACM SIGPLAN +// "Escape Analysis for Java", Proceedings of ACM SIGPLAN // OOPSLA Conference, November 1, 1999 // // The flow-insensitive analysis described in the paper has been implemented. diff --git a/src/hotspot/share/opto/gcm.cpp b/src/hotspot/share/opto/gcm.cpp index 78fd987a422..978d6a0b419 100644 --- a/src/hotspot/share/opto/gcm.cpp +++ b/src/hotspot/share/opto/gcm.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -511,7 +511,7 @@ static Block* memory_early_block(Node* load, Block* early, const PhaseCFG* cfg) if (index != NULL) mem_inputs[mem_inputs_length++] = index; if (store != NULL) mem_inputs[mem_inputs_length++] = store; - // In the comparision below, add one to account for the control input, + // In the comparison below, add one to account for the control input, // which may be null, but always takes up a spot in the in array. if (mem_inputs_length + 1 < (int) load->req()) { // This "load" has more inputs than just the memory, base and index inputs. diff --git a/src/hotspot/share/opto/graphKit.cpp b/src/hotspot/share/opto/graphKit.cpp index 2d790399cdb..e23be7bcf27 100644 --- a/src/hotspot/share/opto/graphKit.cpp +++ b/src/hotspot/share/opto/graphKit.cpp @@ -1201,7 +1201,7 @@ Node* GraphKit::array_ideal_length(AllocateArrayNode* alloc, if (replace_length_in_map == false || map()->find_edge(length) >= 0) { Node* ccast = alloc->make_ideal_length(oop_type, &_gvn); if (ccast != length) { - // do not transfrom ccast here, it might convert to top node for + // do not transform ccast here, it might convert to top node for // negative array length and break assumptions in parsing stage. _gvn.set_type_bottom(ccast); record_for_igvn(ccast); @@ -1620,7 +1620,7 @@ Node* GraphKit::access_store_at(Node* obj, } Node* GraphKit::access_load_at(Node* obj, // containing obj - Node* adr, // actual adress to store val at + Node* adr, // actual address to store val at const TypePtr* adr_type, const Type* val_type, BasicType bt, @@ -1638,7 +1638,7 @@ Node* GraphKit::access_load_at(Node* obj, // containing obj } } -Node* GraphKit::access_load(Node* adr, // actual adress to load val at +Node* GraphKit::access_load(Node* adr, // actual address to load val at const Type* val_type, BasicType bt, DecoratorSet decorators) { diff --git a/src/hotspot/share/opto/graphKit.hpp b/src/hotspot/share/opto/graphKit.hpp index 9ad350d559d..8d602bc7d1c 100644 --- a/src/hotspot/share/opto/graphKit.hpp +++ b/src/hotspot/share/opto/graphKit.hpp @@ -589,7 +589,7 @@ class GraphKit : public Phase { // Perform decorated accesses Node* access_store_at(Node* obj, // containing obj - Node* adr, // actual adress to store val at + Node* adr, // actual address to store val at const TypePtr* adr_type, Node* val, const Type* val_type, @@ -597,13 +597,13 @@ class GraphKit : public Phase { DecoratorSet decorators); Node* access_load_at(Node* obj, // containing obj - Node* adr, // actual adress to load val at + Node* adr, // actual address to load val at const TypePtr* adr_type, const Type* val_type, BasicType bt, DecoratorSet decorators); - Node* access_load(Node* adr, // actual adress to load val at + Node* access_load(Node* adr, // actual address to load val at const Type* val_type, BasicType bt, DecoratorSet decorators); diff --git a/src/hotspot/share/opto/idealKit.cpp b/src/hotspot/share/opto/idealKit.cpp index 7dd28e11787..ee0729918a6 100644 --- a/src/hotspot/share/opto/idealKit.cpp +++ b/src/hotspot/share/opto/idealKit.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -84,7 +84,7 @@ void IdealKit::if_then(Node* left, BoolTest::mask relop, } else { bol = Bool(CmpP(left, right), relop); } - // Delay gvn.tranform on if-nodes until construction is finished + // Delay gvn.transform on if-nodes until construction is finished // to prevent a constant bool input from discarding a control output. IfNode* iff = delay_transform(new IfNode(ctrl(), bol, prob, cnt))->as_If(); Node* then = IfTrue(iff); diff --git a/src/hotspot/share/opto/ifnode.cpp b/src/hotspot/share/opto/ifnode.cpp index 8bf0cd29a8d..ad694f07276 100644 --- a/src/hotspot/share/opto/ifnode.cpp +++ b/src/hotspot/share/opto/ifnode.cpp @@ -186,7 +186,7 @@ static Node* split_if(IfNode *iff, PhaseIterGVN *igvn) { } else if( v->Opcode() == Op_CastII ) { tty->print_cr("Phi has CastII use"); } else { - tty->print_cr("Phi has use I cant be bothered with"); + tty->print_cr("Phi has use I can't be bothered with"); } */ } @@ -1786,7 +1786,7 @@ static IfNode* idealize_test(PhaseGVN* phase, IfNode* iff) { Node* old_if_f = iff->proj_out(false); Node* old_if_t = iff->proj_out(true); - // CountedLoopEnds want the back-control test to be TRUE, irregardless of + // CountedLoopEnds want the back-control test to be TRUE, regardless of // whether they are testing a 'gt' or 'lt' condition. The 'gt' condition // happens in count-down loops if (iff->is_BaseCountedLoopEnd()) return NULL; diff --git a/src/hotspot/share/opto/lcm.cpp b/src/hotspot/share/opto/lcm.cpp index 79ea3713e25..3bbc46f4e1a 100644 --- a/src/hotspot/share/opto/lcm.cpp +++ b/src/hotspot/share/opto/lcm.cpp @@ -276,7 +276,7 @@ void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allo // Give up if offset is not a compile-time constant. if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot) continue; - offset += tptr->_offset; // correct if base is offseted + offset += tptr->_offset; // correct if base is offsetted // Give up if reference is beyond page size. if (MacroAssembler::needs_explicit_null_check(offset)) continue; @@ -628,7 +628,7 @@ Node* PhaseCFG::select( _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); // simulate the notion that we just picked this node to schedule n->add_flag(Node::Flag_is_scheduled); - // now caculate its effect upon the graph if we did + // now calculate its effect upon the graph if we did adjust_register_pressure(n, block, recalc_pressure_nodes, false); // return its state for finalize in case somebody else wins n->remove_flag(Node::Flag_is_scheduled); @@ -970,7 +970,7 @@ bool PhaseCFG::schedule_local(Block* block, GrowableArray& ready_cnt, Vecto bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10); // We track the uses of local definitions as input dependences so that - // we know when a given instruction is avialable to be scheduled. + // we know when a given instruction is available to be scheduled. uint i; if (OptoRegScheduling && block_size_threshold_ok) { for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc diff --git a/src/hotspot/share/opto/library_call.cpp b/src/hotspot/share/opto/library_call.cpp index cb8cede789c..512fdc34fe2 100644 --- a/src/hotspot/share/opto/library_call.cpp +++ b/src/hotspot/share/opto/library_call.cpp @@ -752,7 +752,7 @@ Node* LibraryCallKit::try_to_predicate(int predicate) { } #endif Node* slow_ctl = control(); - set_control(top()); // No fast path instrinsic + set_control(top()); // No fast path intrinsic return slow_ctl; } } @@ -1065,7 +1065,7 @@ bool LibraryCallKit::inline_preconditions_checkIndex(BasicType bt) { return true; } - // length is now known postive, add a cast node to make this explicit + // length is now known positive, add a cast node to make this explicit jlong upper_bound = _gvn.type(length)->is_integer(bt)->hi_as_long(); Node* casted_length = ConstraintCastNode::make(control(), length, TypeInteger::make(0, upper_bound, Type::WidenMax, bt), bt); casted_length = _gvn.transform(casted_length); @@ -2267,7 +2267,7 @@ const TypeOopPtr* LibraryCallKit::sharpen_unsafe_type(Compile::AliasType* alias_ } // The sharpened class might be unloaded if there is no class loader - // contraint in place. + // constraint in place. if (sharpened_klass != NULL && sharpened_klass->is_loaded()) { const TypeOopPtr* tjp = TypeOopPtr::make_from_klass(sharpened_klass); @@ -4475,7 +4475,7 @@ bool LibraryCallKit::inline_native_clone(bool is_virtual) { // If we have a tightly coupled allocation, the arraycopy may take care // of the array initialization. If one of the guards we insert between // the allocation and the arraycopy causes a deoptimization, an -// unitialized array will escape the compiled method. To prevent that +// uninitialized array will escape the compiled method. To prevent that // we set the JVM state for uncommon traps between the allocation and // the arraycopy to the state before the allocation so, in case of // deoptimization, we'll reexecute the allocation and the @@ -5749,7 +5749,7 @@ bool LibraryCallKit::inline_updateDirectByteBufferCRC32C() { // int java.util.zip.Adler32.updateBytes(int crc, byte[] buf, int off, int len) // bool LibraryCallKit::inline_updateBytesAdler32() { - assert(UseAdler32Intrinsics, "Adler32 Instrinsic support need"); // check if we actually need to check this flag or check a different one + assert(UseAdler32Intrinsics, "Adler32 Intrinsic support need"); // check if we actually need to check this flag or check a different one assert(callee()->signature()->size() == 4, "updateBytes has 4 parameters"); assert(callee()->holder()->is_loaded(), "Adler32 class must be loaded"); // no receiver since it is static method @@ -5795,7 +5795,7 @@ bool LibraryCallKit::inline_updateBytesAdler32() { // int java.util.zip.Adler32.updateByteBuffer(int crc, long buf, int off, int len) // bool LibraryCallKit::inline_updateByteBufferAdler32() { - assert(UseAdler32Intrinsics, "Adler32 Instrinsic support need"); // check if we actually need to check this flag or check a different one + assert(UseAdler32Intrinsics, "Adler32 Intrinsic support need"); // check if we actually need to check this flag or check a different one assert(callee()->signature()->size() == 5, "updateByteBuffer has 4 parameters and one is long"); assert(callee()->holder()->is_loaded(), "Adler32 class must be loaded"); // no receiver since it is static method @@ -6285,7 +6285,7 @@ bool LibraryCallKit::inline_counterMode_AESCrypt(vmIntrinsics::ID id) { Node * LibraryCallKit::get_key_start_from_aescrypt_object(Node *aescrypt_object) { #if defined(PPC64) || defined(S390) // MixColumns for decryption can be reduced by preprocessing MixColumns with round keys. - // Intel's extention is based on this optimization and AESCrypt generates round keys by preprocessing MixColumns. + // Intel's extension is based on this optimization and AESCrypt generates round keys by preprocessing MixColumns. // However, ppc64 vncipher processes MixColumns and requires the same round keys with encryption. // The ppc64 stubs of encryption and decryption use the same round keys (sessionK[0]). Node* objSessionK = load_field_from_object(aescrypt_object, "sessionK", "[[I"); diff --git a/src/hotspot/share/opto/locknode.hpp b/src/hotspot/share/opto/locknode.hpp index 57fd7dc8f90..1013111be53 100644 --- a/src/hotspot/share/opto/locknode.hpp +++ b/src/hotspot/share/opto/locknode.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -87,7 +87,7 @@ public: Node* box_node() const { return in(2); } void set_box_node(Node* box) { set_req(2, box); } - // FastLock and FastUnlockNode do not hash, we need one for each correspoding + // FastLock and FastUnlockNode do not hash, we need one for each corresponding // LockNode/UnLockNode to avoid creating Phi's. virtual uint hash() const ; // { return NO_HASH; } virtual uint size_of() const; @@ -113,7 +113,7 @@ public: Node* box_node() const { return in(2); } - // FastLock and FastUnlockNode do not hash, we need one for each correspoding + // FastLock and FastUnlockNode do not hash, we need one for each corresponding // LockNode/UnLockNode to avoid creating Phi's. virtual uint hash() const ; // { return NO_HASH; } virtual bool cmp( const Node &n ) const ; // Always fail, except on self diff --git a/src/hotspot/share/opto/loopPredicate.cpp b/src/hotspot/share/opto/loopPredicate.cpp index ee88d0fabf4..1e02c0c4dc2 100644 --- a/src/hotspot/share/opto/loopPredicate.cpp +++ b/src/hotspot/share/opto/loopPredicate.cpp @@ -145,7 +145,7 @@ ProjNode* PhaseIdealLoop::create_new_if_for_predicate(ProjNode* cont_proj, Node* Node* entry = iff->in(0); if (new_entry != NULL) { - // Clonning the predicate to new location. + // Cloning the predicate to new location. entry = new_entry; } // Create new_iff @@ -1531,7 +1531,7 @@ bool PhaseIdealLoop::loop_predication_impl(IdealLoopTree *loop) { // Both arms are inside the loop. There are two cases: // (1) there is one backward branch. In this case, any remaining proj // in the if_proj list post-dominates "iff". So, the condition of "iff" - // does not determine the execution the remining projs directly, and we + // does not determine the execution the remaining projs directly, and we // can safely continue. // (2) both arms are forwarded, i.e. a diamond shape. In this case, "proj" // does not dominate loop->tail(), so it can not be in the if_proj list. diff --git a/src/hotspot/share/opto/loopnode.cpp b/src/hotspot/share/opto/loopnode.cpp index fcf07d05ee9..3d74caba7ff 100644 --- a/src/hotspot/share/opto/loopnode.cpp +++ b/src/hotspot/share/opto/loopnode.cpp @@ -966,7 +966,7 @@ bool PhaseIdealLoop::create_loop_nest(IdealLoopTree* loop, Node_List &old_new) { LoopNode* inner_head = create_inner_head(loop, head, exit_test); - // Summary of steps from inital loop to loop nest: + // Summary of steps from initial loop to loop nest: // // == old IR nodes => // @@ -1284,7 +1284,7 @@ void PhaseIdealLoop::transform_long_range_checks(int stride_con, const Node_List // i*(long)K + L root()); Node* max_range = new AddLNode(max_jint_plus_one_long, L); @@ -1711,7 +1711,7 @@ bool PhaseIdealLoop::is_counted_loop(Node* x, IdealLoopTree*&loop, BasicType iv_ } if (phi_incr != NULL && bt != BoolTest::ne) { - // check if there is a possiblity of IV overflowing after the first increment + // check if there is a possibility of IV overflowing after the first increment if (stride_con > 0) { if (init_t->hi_as_long() > max_signed_integer(iv_bt) - stride_con) { return false; @@ -4844,7 +4844,7 @@ void PhaseIdealLoop::recompute_dom_depth() { uint i; // Initialize depth to "no depth yet" and realize all lazy updates for (i = 0; i < _idom_size; i++) { - // Only indices with a _dom_depth has a Node* or NULL (otherwise uninitalized). + // Only indices with a _dom_depth has a Node* or NULL (otherwise uninitialized). if (_dom_depth[i] > 0 && _idom[i] != NULL) { _dom_depth[i] = no_depth_marker; @@ -5084,7 +5084,7 @@ int PhaseIdealLoop::build_loop_tree_impl( Node *n, int pre_order ) { } assert(cfg != NULL, "must find the control user of m"); uint k = 0; // Probably cfg->in(0) - while( cfg->in(k) != m ) k++; // But check incase cfg is a Region + while( cfg->in(k) != m ) k++; // But check in case cfg is a Region cfg->set_req( k, if_t ); // Now point to NeverBranch _igvn._worklist.push(cfg); diff --git a/src/hotspot/share/opto/loopopts.cpp b/src/hotspot/share/opto/loopopts.cpp index dc9cddfdabf..841a0fc3401 100644 --- a/src/hotspot/share/opto/loopopts.cpp +++ b/src/hotspot/share/opto/loopopts.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1999, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1429,7 +1429,7 @@ void PhaseIdealLoop::split_if_with_blocks_post(Node *n) { } } -// Tranform: +// Transform: // // if (some_condition) { // // body 1 diff --git a/src/hotspot/share/opto/machnode.hpp b/src/hotspot/share/opto/machnode.hpp index 3c155f6448a..5b51c0cb703 100644 --- a/src/hotspot/share/opto/machnode.hpp +++ b/src/hotspot/share/opto/machnode.hpp @@ -260,10 +260,10 @@ public: virtual const RegMask *cisc_RegMask() const { return NULL; } // If this instruction is a 2-address instruction, then return the - // index of the input which must match the output. Not nessecary + // index of the input which must match the output. Not necessary // for instructions which bind the input and output register to the - // same singleton regiser (e.g., Intel IDIV which binds AX to be - // both an input and an output). It is nessecary when the input and + // same singleton register (e.g., Intel IDIV which binds AX to be + // both an input and an output). It is necessary when the input and // output have choices - but they must use the same choice. virtual uint two_adr( ) const { return 0; } diff --git a/src/hotspot/share/opto/macro.cpp b/src/hotspot/share/opto/macro.cpp index 5f45ffc09c3..a035f1e6ca4 100644 --- a/src/hotspot/share/opto/macro.cpp +++ b/src/hotspot/share/opto/macro.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -585,7 +585,7 @@ bool PhaseMacroExpand::can_eliminate_allocation(AllocateNode *alloc, GrowableArr int offset = addp_type->offset(); if (offset == Type::OffsetTop || offset == Type::OffsetBot) { - NOT_PRODUCT(fail_eliminate = "Undefined field referrence";) + NOT_PRODUCT(fail_eliminate = "Undefined field reference";) can_eliminate = false; break; } @@ -598,7 +598,7 @@ bool PhaseMacroExpand::can_eliminate_allocation(AllocateNode *alloc, GrowableArr if (n->is_Load() || n->is_LoadStore()) { NOT_PRODUCT(fail_eliminate = "Field load";) } else { - NOT_PRODUCT(fail_eliminate = "Not store field referrence";) + NOT_PRODUCT(fail_eliminate = "Not store field reference";) } can_eliminate = false; } @@ -1021,7 +1021,7 @@ bool PhaseMacroExpand::eliminate_allocate_node(AllocateNode *alloc) { const TypeKlassPtr* tklass = _igvn.type(klass)->is_klassptr(); Node* res = alloc->result_cast(); // Eliminate boxing allocations which are not used - // regardless scalar replacable status. + // regardless scalar replaceable status. bool boxing_alloc = C->eliminate_boxing() && tklass->klass()->is_instance_klass() && tklass->klass()->as_instance_klass()->is_box_klass(); @@ -2121,7 +2121,7 @@ bool PhaseMacroExpand::eliminate_locking_node(AbstractLockNode *alock) { // The input to a Lock is merged memory, so extract its RawMem input // (unless the MergeMem has been optimized away.) if (alock->is_Lock()) { - // Seach for MemBarAcquireLock node and delete it also. + // Search for MemBarAcquireLock node and delete it also. MemBarNode* membar = fallthroughproj->unique_ctrl_out()->as_MemBar(); assert(membar != NULL && membar->Opcode() == Op_MemBarAcquireLock, ""); Node* ctrlproj = membar->proj_out(TypeFunc::Control); @@ -2138,7 +2138,7 @@ bool PhaseMacroExpand::eliminate_locking_node(AbstractLockNode *alock) { } } - // Seach for MemBarReleaseLock node and delete it also. + // Search for MemBarReleaseLock node and delete it also. if (alock->is_Unlock() && ctrl->is_Proj() && ctrl->in(0)->is_MemBar()) { MemBarNode* membar = ctrl->in(0)->as_MemBar(); assert(membar->Opcode() == Op_MemBarReleaseLock && diff --git a/src/hotspot/share/opto/matcher.cpp b/src/hotspot/share/opto/matcher.cpp index 20a08e0cb4b..4c7666ab9b2 100644 --- a/src/hotspot/share/opto/matcher.cpp +++ b/src/hotspot/share/opto/matcher.cpp @@ -2230,7 +2230,7 @@ bool Matcher::find_shared_visit(MStack& mstack, Node* n, uint opcode, bool& mem_ n->outcnt() == 1 ) // Not already shared set_shared(n); // Force it to be a root break; - case Op_BoxLock: // Cant match until we get stack-regs in ADLC + case Op_BoxLock: // Can't match until we get stack-regs in ADLC case Op_IfFalse: case Op_IfTrue: case Op_MachProj: diff --git a/src/hotspot/share/opto/memnode.cpp b/src/hotspot/share/opto/memnode.cpp index c2e2e939bf3..5da05db11ec 100644 --- a/src/hotspot/share/opto/memnode.cpp +++ b/src/hotspot/share/opto/memnode.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -379,7 +379,7 @@ Node *MemNode::Ideal_common(PhaseGVN *phase, bool can_reshape) { Node* old_mem = mem; // The code which unhooks non-raw memories from complete (macro-expanded) - // initializations was removed. After macro-expansion all stores catched + // initializations was removed. After macro-expansion all stores caught // by Initialize node became raw stores and there is no information // which memory slices they modify. So it is unsafe to move any memory // operation above these stores. Also in most cases hooked non-raw memories @@ -1509,7 +1509,7 @@ Node *LoadNode::split_through_phi(PhaseGVN *phase) { assert((t_oop != NULL) && (t_oop->is_known_instance_field() || - t_oop->is_ptr_to_boxed_value()), "invalide conditions"); + t_oop->is_ptr_to_boxed_value()), "invalid conditions"); Compile* C = phase->C; intptr_t ignore = 0; diff --git a/src/hotspot/share/opto/memnode.hpp b/src/hotspot/share/opto/memnode.hpp index 7c02a1b0861..ea93ac5615c 100644 --- a/src/hotspot/share/opto/memnode.hpp +++ b/src/hotspot/share/opto/memnode.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -55,7 +55,7 @@ public: Memory, // Chunk of memory is being loaded from Address, // Actually address, derived from base ValueIn, // Value to store - OopStore // Preceeding oop store, only in StoreCM + OopStore // Preceding oop store, only in StoreCM }; typedef enum { unordered = 0, acquire, // Load has to acquire or be succeeded by MemBarAcquire. @@ -770,7 +770,7 @@ public: //------------------------------StoreCMNode----------------------------------- // Store card-mark byte to memory for CM // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store -// Preceeding equivalent StoreCMs may be eliminated. +// Preceding equivalent StoreCMs may be eliminated. class StoreCMNode : public StoreNode { private: virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; } @@ -1169,7 +1169,7 @@ public: //------------------------------MemBar----------------------------------------- // There are different flavors of Memory Barriers to match the Java Memory -// Model. Monitor-enter and volatile-load act as Aquires: no following ref +// Model. Monitor-enter and volatile-load act as Acquires: no following ref // can be moved to before them. We insert a MemBar-Acquire after a FastLock or // volatile-load. Monitor-exit and volatile-store act as Release: no // preceding ref can be moved to after them. We insert a MemBar-Release @@ -1250,7 +1250,7 @@ public: // "Acquire" - no following ref can move before (but earlier refs can // follow, like an early Load stalled in cache). Requires multi-cpu -// visibility. Inserted independ of any load, as required +// visibility. Inserted independent of any load, as required // for intrinsic Unsafe.loadFence(). class LoadFenceNode: public MemBarNode { public: diff --git a/src/hotspot/share/opto/node.hpp b/src/hotspot/share/opto/node.hpp index ea8ca49d2a4..04223a0e257 100644 --- a/src/hotspot/share/opto/node.hpp +++ b/src/hotspot/share/opto/node.hpp @@ -1025,7 +1025,7 @@ public: // Return a node which is more "ideal" than the current node. // The invariants on this call are subtle. If in doubt, read the - // treatise in node.cpp above the default implemention AND TEST WITH + // treatise in node.cpp above the default implementation AND TEST WITH // +VerifyIterativeGVN! virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); diff --git a/src/hotspot/share/opto/optoreg.hpp b/src/hotspot/share/opto/optoreg.hpp index 24d8e86adb1..b2dcc7cb93c 100644 --- a/src/hotspot/share/opto/optoreg.hpp +++ b/src/hotspot/share/opto/optoreg.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2006, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -177,7 +177,7 @@ class OptoReg { // world, notably flags. [ But by design there is "space" in the VMReg world // for such registers they just may not be concrete ]. So if we were to use VMRegPair // then the VMReg world would have to have a representation for these registers -// so that a OptoReg->VMReg->OptoReg would reproduce ther original OptoReg. As it +// so that a OptoReg->VMReg->OptoReg would reproduce the original OptoReg. As it // stands if you convert a flag (condition code) to a VMReg you will get VMRegImpl::Bad // and converting that will return OptoReg::Bad losing the identity of the OptoReg. diff --git a/src/hotspot/share/opto/parse1.cpp b/src/hotspot/share/opto/parse1.cpp index 7819812e1fe..6443657a4f8 100644 --- a/src/hotspot/share/opto/parse1.cpp +++ b/src/hotspot/share/opto/parse1.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -351,7 +351,7 @@ void Parse::load_interpreter_state(Node* osr_buf) { // case and aborts the compile if addresses are live into an OSR // entry point. Because of that we can assume that any address // locals at the OSR entry point are dead. Method liveness - // isn't precise enought to figure out that they are dead in all + // isn't precise enough to figure out that they are dead in all // cases so simply skip checking address locals all // together. Any type check is guaranteed to fail since the // interpreter type is the result of a load which might have any @@ -1444,7 +1444,7 @@ void Parse::BytecodeParseHistogram::print(float cutoff) { tty->print_cr("relative: percentage contribution to compiled nodes"); tty->print_cr("nodes : Average number of nodes constructed per bytecode"); tty->print_cr("rnodes : Significance towards total nodes constructed, (nodes*relative)"); - tty->print_cr("transforms: Average amount of tranform progress per bytecode compiled"); + tty->print_cr("transforms: Average amount of transform progress per bytecode compiled"); tty->print_cr("values : Average number of node values improved per bytecode"); tty->print_cr("name : Bytecode name"); tty->cr(); diff --git a/src/hotspot/share/opto/parse2.cpp b/src/hotspot/share/opto/parse2.cpp index 3731dfaa8d2..a0e99fb0108 100644 --- a/src/hotspot/share/opto/parse2.cpp +++ b/src/hotspot/share/opto/parse2.cpp @@ -1332,7 +1332,7 @@ bool Parse::seems_never_taken(float prob) const { // True if the comparison seems to be the kind that will not change its // statistics from true to false. See comments in adjust_map_after_if. // This question is only asked along paths which are already -// classifed as untaken (by seems_never_taken), so really, +// classified as untaken (by seems_never_taken), so really, // if a path is never taken, its controlling comparison is // already acting in a stable fashion. If the comparison // seems stable, we will put an expensive uncommon trap diff --git a/src/hotspot/share/opto/reg_split.cpp b/src/hotspot/share/opto/reg_split.cpp index d62837202bb..e5469bfecca 100644 --- a/src/hotspot/share/opto/reg_split.cpp +++ b/src/hotspot/share/opto/reg_split.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -599,7 +599,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) { // Grab the live range number uint lidx = lidxs.at(slidx); // Do not bother splitting or putting in Phis for single-def - // rematerialized live ranges. This happens alot to constants + // rematerialized live ranges. This happens a lot to constants // with long live ranges. if( lrgs(lidx).is_singledef() && lrgs(lidx)._def->rematerialize() ) { @@ -771,7 +771,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) { if (defidx < _lrg_map.max_lrg_id()) { // Check for useless Phis. These appear if we spill, then // coalesce away copies. Dont touch Phis in spilling live - // ranges; they are busy getting modifed in this pass. + // ranges; they are busy getting modified in this pass. if( lrgs(defidx).reg() < LRG::SPILL_REG ) { uint i; Node *u = NULL; @@ -810,7 +810,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) { b->_fhrp_index >= b->end_idx() || !b->get_node(b->_fhrp_index)->is_Proj(), "" ); - // ********** Handle Crossing HRP Boundry ********** + // ********** Handle Crossing HRP Boundary ********** if( (insidx == b->_ihrp_index) || (insidx == b->_fhrp_index) ) { for( slidx = 0; slidx < spill_cnt; slidx++ ) { // Check for need to split at HRP boundary - split if UP @@ -880,7 +880,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) { } // end if LRG is UP } // end for all spilling live ranges assert( b->get_node(insidx) == n, "got insidx set incorrectly" ); - } // end if crossing HRP Boundry + } // end if crossing HRP Boundary // If the LRG index is oob, then this is a new spillcopy, skip it. if (defidx >= _lrg_map.max_lrg_id()) { diff --git a/src/hotspot/share/opto/regmask.cpp b/src/hotspot/share/opto/regmask.cpp index a1f1904bfa4..4b3fe291b5c 100644 --- a/src/hotspot/share/opto/regmask.cpp +++ b/src/hotspot/share/opto/regmask.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -432,7 +432,7 @@ void RegMask::dump(outputStream *st) const { st->print("-"); OptoReg::dump(last, st); } - st->print(","); // Seperate start of new run + st->print(","); // Separate start of new run start = last = reg; // Start a new register run OptoReg::dump(start, st); // Print register } // End of if ending a register run or not diff --git a/src/hotspot/share/opto/replacednodes.cpp b/src/hotspot/share/opto/replacednodes.cpp index 0a89b06a7e7..83d8abc8362 100644 --- a/src/hotspot/share/opto/replacednodes.cpp +++ b/src/hotspot/share/opto/replacednodes.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -91,7 +91,7 @@ void ReplacedNodes::reset() { } } -// Perfom node replacement (used when returning to caller) +// Perform node replacement (used when returning to caller) void ReplacedNodes::apply(Node* n, uint idx) { if (is_empty()) { return; diff --git a/src/hotspot/share/opto/stringopts.cpp b/src/hotspot/share/opto/stringopts.cpp index 8c0a060d862..9ebfa2df668 100644 --- a/src/hotspot/share/opto/stringopts.cpp +++ b/src/hotspot/share/opto/stringopts.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2020, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -756,7 +756,7 @@ void PhaseStringOpts::remove_dead_nodes() { } case Op_AddP: case Op_CreateEx: { - // Recurisvely clean up references to CreateEx so EA doesn't + // Recursively clean up references to CreateEx so EA doesn't // get unhappy about the partially collapsed graph. for (SimpleDUIterator i(use); i.has_next(); i.next()) { Node* m = i.get(); @@ -1762,7 +1762,7 @@ void PhaseStringOpts::replace_string_concat(StringConcat* sc) { SafePointNode* map = new SafePointNode(size, jvms); // copy the control and memory state from the final call into our - // new starting state. This allows any preceeding tests to feed + // new starting state. This allows any preceding tests to feed // into the new section of code. for (uint i1 = 0; i1 < TypeFunc::Parms; i1++) { map->init_req(i1, sc->end()->in(i1)); diff --git a/src/hotspot/share/opto/subnode.hpp b/src/hotspot/share/opto/subnode.hpp index 55b0e90a387..b1023fbf8da 100644 --- a/src/hotspot/share/opto/subnode.hpp +++ b/src/hotspot/share/opto/subnode.hpp @@ -376,7 +376,7 @@ public: //------------------------------AbsFNode--------------------------------------- // Absolute value a float, a common float-point idiom with a cheap hardware -// implemention on most chips. Since a naive graph involves control flow, we +// implementation on most chips. Since a naive graph involves control flow, we // "match" it in the ideal world (so the control flow can be removed). class AbsFNode : public AbsNode { public: @@ -388,7 +388,7 @@ public: //------------------------------AbsDNode--------------------------------------- // Absolute value a double, a common float-point idiom with a cheap hardware -// implemention on most chips. Since a naive graph involves control flow, we +// implementation on most chips. Since a naive graph involves control flow, we // "match" it in the ideal world (so the control flow can be removed). class AbsDNode : public AbsNode { public: diff --git a/src/hotspot/share/opto/superword.cpp b/src/hotspot/share/opto/superword.cpp index 7228ff0a60b..d66c20bf72f 100644 --- a/src/hotspot/share/opto/superword.cpp +++ b/src/hotspot/share/opto/superword.cpp @@ -415,7 +415,7 @@ void SuperWord::unrolling_analysis(int &local_loop_unroll_factor) { // this list from first to last, all definitions are visited before their uses. // // 2) A point-to-point dependence graph is constructed between memory references. -// This simplies the upcoming "independence" checker. +// This simplifies the upcoming "independence" checker. // // 3) The maximum depth in the node graph from the beginning of the block // to each node is computed. This is used to prune the graph search @@ -2125,7 +2125,7 @@ void SuperWord::remove_and_insert(MemNode *current, MemNode *prev, MemNode *lip, Node* my_mem = current->in(MemNode::Memory); bool sched_up = sched_before.member(current); - // remove current_store from its current position in the memmory graph + // remove current_store from its current position in the memory graph for (DUIterator i = current->outs(); current->has_out(i); i++) { Node* use = current->out(i); if (use->is_Mem()) { diff --git a/src/hotspot/share/opto/superword.hpp b/src/hotspot/share/opto/superword.hpp index 6a386d36c43..6bb0aa08ed7 100644 --- a/src/hotspot/share/opto/superword.hpp +++ b/src/hotspot/share/opto/superword.hpp @@ -475,7 +475,7 @@ class SuperWord : public ResourceObj { int get_iv_adjustment(MemNode* mem); // Can the preloop align the reference to position zero in the vector? bool ref_is_alignable(SWPointer& p); - // rebuild the graph so all loads in different iterations of cloned loop become dependant on phi node (in _do_vector_loop only) + // rebuild the graph so all loads in different iterations of cloned loop become dependent on phi node (in _do_vector_loop only) bool hoist_loads_in_graph(); // Test whether MemNode::Memory dependency to the same load but in the first iteration of this loop is coming from memory phi // Return false if failed diff --git a/src/hotspot/share/opto/type.cpp b/src/hotspot/share/opto/type.cpp index 5484406beb0..fcae4071c01 100644 --- a/src/hotspot/share/opto/type.cpp +++ b/src/hotspot/share/opto/type.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -1438,7 +1438,7 @@ const TypeInteger* TypeInteger::minus_1(BasicType bt) { } //============================================================================= -// Convience common pre-built types. +// Convenience common pre-built types. const TypeInt *TypeInt::MAX; // INT_MAX const TypeInt *TypeInt::MIN; // INT_MIN const TypeInt *TypeInt::MINUS_1;// -1 @@ -1609,7 +1609,7 @@ const Type *TypeInt::narrow( const Type *old ) const { if (olo == min_jint && ohi == max_jint) return this; if (_lo < olo || _hi > ohi) - return this; // doesn't narrow; pretty wierd + return this; // doesn't narrow; pretty weird // The new type narrows the old type, so look for a "death march". // See comments on PhaseTransform::saturate. @@ -1875,7 +1875,7 @@ const Type *TypeLong::narrow( const Type *old ) const { if (olo == min_jlong && ohi == max_jlong) return this; if (_lo < olo || _hi > ohi) - return this; // doesn't narrow; pretty wierd + return this; // doesn't narrow; pretty weird // The new type narrows the old type, so look for a "death march". // See comments on PhaseTransform::saturate. @@ -3454,7 +3454,7 @@ intptr_t TypeOopPtr::get_con() const { // code and dereferenced at the time the nmethod is made. Until that time, // it is not reasonable to do arithmetic with the addresses of oops (we don't // have access to the addresses!). This does not seem to currently happen, - // but this assertion here is to help prevent its occurence. + // but this assertion here is to help prevent its occurrence. tty->print_cr("Found oop constant with non-zero offset"); ShouldNotReachHere(); } @@ -4941,7 +4941,7 @@ intptr_t TypeMetadataPtr::get_con() const { // code and dereferenced at the time the nmethod is made. Until that time, // it is not reasonable to do arithmetic with the addresses of oops (we don't // have access to the addresses!). This does not seem to currently happen, - // but this assertion here is to help prevent its occurence. + // but this assertion here is to help prevent its occurrence. tty->print_cr("Found oop constant with non-zero offset"); ShouldNotReachHere(); } @@ -5173,7 +5173,7 @@ intptr_t TypeKlassPtr::get_con() const { // code and dereferenced at the time the nmethod is made. Until that time, // it is not reasonable to do arithmetic with the addresses of oops (we don't // have access to the addresses!). This does not seem to currently happen, - // but this assertion here is to help prevent its occurence. + // but this assertion here is to help prevent its occurrence. tty->print_cr("Found oop constant with non-zero offset"); ShouldNotReachHere(); } diff --git a/src/hotspot/share/opto/vectorIntrinsics.cpp b/src/hotspot/share/opto/vectorIntrinsics.cpp index 7454be7b948..a2112fc5bc8 100644 --- a/src/hotspot/share/opto/vectorIntrinsics.cpp +++ b/src/hotspot/share/opto/vectorIntrinsics.cpp @@ -816,7 +816,7 @@ bool LibraryCallKit::inline_vector_frombits_coerced() { const TypeInt* vlen = gvn().type(argument(2))->isa_int(); const TypeLong* bits_type = gvn().type(argument(3))->isa_long(); // Mode argument determines the mode of operation it can take following values:- - // MODE_BROADCAST for vector Vector.boradcast and VectorMask.maskAll operations. + // MODE_BROADCAST for vector Vector.broadcast and VectorMask.maskAll operations. // MODE_BITS_COERCED_LONG_TO_MASK for VectorMask.fromLong operation. const TypeInt* mode = gvn().type(argument(5))->isa_int(); diff --git a/src/hotspot/share/opto/vectornode.cpp b/src/hotspot/share/opto/vectornode.cpp index 8b385f28f40..cf659eb5455 100644 --- a/src/hotspot/share/opto/vectornode.cpp +++ b/src/hotspot/share/opto/vectornode.cpp @@ -341,7 +341,7 @@ bool VectorNode::is_vector_rotate_supported(int vopc, uint vlen, BasicType bt) { // If target does not support variable shift operations then no point // in creating a rotate vector node since it will not be disintegratable. - // Adding a pessimistic check to avoid complex pattern mathing which + // Adding a pessimistic check to avoid complex pattern matching which // may not be full proof. if (!Matcher::supports_vector_variable_shifts()) { return false; diff --git a/src/hotspot/share/prims/forte.cpp b/src/hotspot/share/prims/forte.cpp index ce9b30b17c0..af6dad64c20 100644 --- a/src/hotspot/share/prims/forte.cpp +++ b/src/hotspot/share/prims/forte.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -652,7 +652,7 @@ void AsyncGetCallTrace(ASGCT_CallTrace *trace, jint depth, void* ucontext) { #ifndef _WINDOWS -// Support for the Forte(TM) Peformance Tools collector. +// Support for the Forte(TM) Performance Tools collector. // // The method prototype is derived from libcollector.h. For more // information, please see the libcollect man page. diff --git a/src/hotspot/share/prims/jni.cpp b/src/hotspot/share/prims/jni.cpp index d60edaf03f7..7e37c59dcb7 100644 --- a/src/hotspot/share/prims/jni.cpp +++ b/src/hotspot/share/prims/jni.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012 Red Hat, Inc. * Copyright (c) 2021, Azul Systems, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -108,10 +108,10 @@ extern LONG WINAPI topLevelExceptionFilter(_EXCEPTION_POINTERS* ); // '-return' probe regardless of the return path is taken out of the function. // Methods that have multiple return paths use this to avoid having to // instrument each return path. Methods that use CHECK or THROW must use this -// since those macros can cause an immedate uninstrumented return. +// since those macros can cause an immediate uninstrumented return. // // In order to get the return value, a reference to the variable containing -// the return value must be passed to the contructor of the object, and +// the return value must be passed to the constructor of the object, and // the return value must be set before return (since the mark object has // a reference to it). // diff --git a/src/hotspot/share/prims/jniCheck.cpp b/src/hotspot/share/prims/jniCheck.cpp index 529e7cc4fe8..c380ee07943 100644 --- a/src/hotspot/share/prims/jniCheck.cpp +++ b/src/hotspot/share/prims/jniCheck.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2001, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2001, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -59,7 +59,7 @@ // Execute the given block of source code with the thread in VM state. // To do this, transition from the NATIVE state to the VM state, execute -// the code, and transtition back. The ThreadInVMfromNative constructor +// the code, and transition back. The ThreadInVMfromNative constructor // performs the transition to VM state, its destructor restores the // NATIVE state. diff --git a/src/hotspot/share/prims/jvm.cpp b/src/hotspot/share/prims/jvm.cpp index c574cb3ecc8..4283eb540d8 100644 --- a/src/hotspot/share/prims/jvm.cpp +++ b/src/hotspot/share/prims/jvm.cpp @@ -1490,7 +1490,7 @@ JVM_ENTRY(jstring, JVM_GetClassSignature(JNIEnv *env, jclass cls)) JvmtiVMObjectAllocEventCollector oam; ResourceMark rm(THREAD); oop mirror = JNIHandles::resolve_non_null(cls); - // Return null for arrays and primatives + // Return null for arrays and primitives if (!java_lang_Class::is_primitive(mirror)) { Klass* k = java_lang_Class::as_Klass(mirror); if (k->is_instance_klass()) { diff --git a/src/hotspot/share/prims/jvmti.xml b/src/hotspot/share/prims/jvmti.xml index b05d34cdec2..4857e0a0eac 100644 --- a/src/hotspot/share/prims/jvmti.xml +++ b/src/hotspot/share/prims/jvmti.xml @@ -1,7 +1,7 @@