From 4a6718b062f731ab7e8e3c5e629da97e923d518d Mon Sep 17 00:00:00 2001 From: Gui Cao Date: Sat, 1 Aug 2026 03:05:13 +0000 Subject: [PATCH] 8389312: RISC-V: vector_update_crc32 wrongly assumes undisturbed tail elements Reviewed-by: fyang, dzhang --- src/hotspot/cpu/riscv/macroAssembler_riscv.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp index 116332c1add..65cc4bbf433 100644 --- a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp +++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp @@ -2174,12 +2174,12 @@ void MacroAssembler::vector_update_crc32(Register crc, Register buf, Register le mv(tmp5, 0xff); if (MaxVectorSize == 16) { - vsetivli(zr, N, Assembler::e32, Assembler::m4, Assembler::ma, Assembler::ta); + vsetivli(zr, N, Assembler::e32, Assembler::m4, Assembler::mu, Assembler::tu); } else if (MaxVectorSize == 32) { - vsetivli(zr, N, Assembler::e32, Assembler::m2, Assembler::ma, Assembler::ta); + vsetivli(zr, N, Assembler::e32, Assembler::m2, Assembler::mu, Assembler::tu); } else { assert(MaxVectorSize > 32, "sanity"); - vsetivli(zr, N, Assembler::e32, Assembler::m1, Assembler::ma, Assembler::ta); + vsetivli(zr, N, Assembler::e32, Assembler::m1, Assembler::mu, Assembler::tu); } vmv_v_x(vcrc, zr);