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JDK-8389581

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This commit is contained in:
Guoxiong Li 2026-08-02 17:56:36 +08:00
parent 5b2d6991a1
commit 4af1cc5712
1 changed files with 6 additions and 6 deletions
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12
src/hotspot/cpu/riscv/riscv.ad
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@ -7520,7 +7520,7 @@ instruct maxF_reg_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr) %{
ins_encode %{
__ minmax_fp(as_FloatRegister($dst$$reg),
as_FloatRegister($src1$$reg), as_FloatRegister($src2$$reg),
__ FLOAT_TYPE::single_precision, false /* is_min */);
C2_MacroAssembler::FLOAT_TYPE::single_precision, false /* is_min */);
%}
ins_pipe(pipe_class_default);
@ -7551,7 +7551,7 @@ instruct minF_reg_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr) %{
ins_encode %{
__ minmax_fp(as_FloatRegister($dst$$reg),
as_FloatRegister($src1$$reg), as_FloatRegister($src2$$reg),
__ FLOAT_TYPE::single_precision, true /* is_min */);
C2_MacroAssembler::FLOAT_TYPE::single_precision, true /* is_min */);
%}
ins_pipe(pipe_class_default);
@ -7582,7 +7582,7 @@ instruct maxD_reg_reg(fRegD dst, fRegD src1, fRegD src2, rFlagsReg cr) %{
ins_encode %{
__ minmax_fp(as_FloatRegister($dst$$reg),
as_FloatRegister($src1$$reg), as_FloatRegister($src2$$reg),
__ FLOAT_TYPE::double_precision, false /* is_min */);
C2_MacroAssembler::FLOAT_TYPE::double_precision, false /* is_min */);
%}
ins_pipe(pipe_class_default);
@ -7613,7 +7613,7 @@ instruct minD_reg_reg(fRegD dst, fRegD src1, fRegD src2, rFlagsReg cr) %{
ins_encode %{
__ minmax_fp(as_FloatRegister($dst$$reg),
as_FloatRegister($src1$$reg), as_FloatRegister($src2$$reg),
__ FLOAT_TYPE::double_precision, true /* is_min */);
C2_MacroAssembler::FLOAT_TYPE::double_precision, true /* is_min */);
%}
ins_pipe(pipe_class_default);
@ -8695,7 +8695,7 @@ instruct min_HF_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr)
ins_encode %{
__ minmax_fp($dst$$FloatRegister, $src1$$FloatRegister, $src2$$FloatRegister,
__ FLOAT_TYPE::half_precision, true /* is_min */);
C2_MacroAssembler::FLOAT_TYPE::half_precision, true /* is_min */);
%}
ins_pipe(pipe_class_default);
%}
@ -8725,7 +8725,7 @@ instruct max_HF_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr)
ins_encode %{
__ minmax_fp($dst$$FloatRegister, $src1$$FloatRegister, $src2$$FloatRegister,
__ FLOAT_TYPE::half_precision, false /* is_min */);
C2_MacroAssembler::FLOAT_TYPE::half_precision, false /* is_min */);
%}
ins_pipe(pipe_class_default);
%}