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This commit is contained in:
Vladimir Kozlov 2013-02-12 09:54:34 -08:00
commit 4de970006b
8 changed files with 36 additions and 29 deletions
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9
hotspot/src/cpu/x86/vm/assembler_x86.cpp
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@ -2270,10 +2270,11 @@ void Assembler::vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, boo
}
void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) {
int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256);
emit_int8(0x00);
emit_int8(0xC0 | encode);
emit_int8(imm8);
assert(VM_Version::supports_avx2(), "");
int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256);
emit_int8(0x00);
emit_int8(0xC0 | encode);
emit_int8(imm8);
}
void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) {

2
hotspot/src/cpu/x86/vm/macroAssembler_x86.cpp
View File

@ -5691,7 +5691,7 @@ void MacroAssembler::string_compare(Register str1, Register str2,
Address::ScaleFactor scale = Address::times_2;
int stride = 8;
if (UseAVX >= 2) {
if (UseAVX >= 2 && UseSSE42Intrinsics) {
Label COMPARE_WIDE_VECTORS, VECTOR_NOT_EQUAL, COMPARE_WIDE_TAIL, COMPARE_SMALL_STR;
Label COMPARE_WIDE_VECTORS_LOOP, COMPARE_16_CHARS, COMPARE_INDEX_CHAR;
Label COMPARE_TAIL_LONG;

4
hotspot/src/share/vm/asm/macroAssembler.hpp
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@ -37,10 +37,10 @@
# include "assembler_zero.hpp"
#endif
#ifdef TARGET_ARCH_arm
# include "assembler_arm.hpp"
# include "macroAssembler_arm.hpp"
#endif
#ifdef TARGET_ARCH_ppc
# include "assembler_ppc.hpp"
# include "macroAssembler_ppc.hpp"
#endif
#endif // SHARE_VM_ASM_MACROASSEMBLER_HPP

4
hotspot/src/share/vm/asm/macroAssembler.inline.hpp
View File

@ -37,10 +37,10 @@
# include "assembler_zero.inline.hpp"
#endif
#ifdef TARGET_ARCH_arm
# include "assembler_arm.inline.hpp"
# include "macroAssembler_arm.inline.hpp"
#endif
#ifdef TARGET_ARCH_ppc
# include "assembler_ppc.inline.hpp"
# include "macroAssembler_ppc.inline.hpp"
#endif
#endif // SHARE_VM_ASM_MACROASSEMBLER_INLINE_HPP

21
hotspot/src/share/vm/opto/regmask.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -241,7 +241,8 @@ int RegMask::is_bound_pair() const {
} else { // Else its a split-pair case
if( bit != _A[i] ) return false; // Found many bits, so fail
i++; // Skip iteration forward
if( _A[i] != 1 ) return false; // Require 1 lo bit in next word
if( i >= RM_SIZE || _A[i] != 1 )
return false; // Require 1 lo bit in next word
}
}
}
@ -254,7 +255,7 @@ static int low_bits[3] = { 0x55555555, 0x11111111, 0x01010101 };
// Find the lowest-numbered register set in the mask. Return the
// HIGHEST register number in the set, or BAD if no sets.
// Works also for size 1.
OptoReg::Name RegMask::find_first_set(int size) const {
OptoReg::Name RegMask::find_first_set(const int size) const {
verify_sets(size);
for (int i = 0; i < RM_SIZE; i++) {
if (_A[i]) { // Found some bits
@ -268,7 +269,7 @@ OptoReg::Name RegMask::find_first_set(int size) const {
//------------------------------clear_to_sets----------------------------------
// Clear out partial bits; leave only aligned adjacent bit pairs
void RegMask::clear_to_sets(int size) {
void RegMask::clear_to_sets(const int size) {
if (size == 1) return;
assert(2 <= size && size <= 8, "update low bits table");
assert(is_power_of_2(size), "sanity");
@ -293,7 +294,7 @@ void RegMask::clear_to_sets(int size) {
//------------------------------smear_to_sets----------------------------------
// Smear out partial bits to aligned adjacent bit sets
void RegMask::smear_to_sets(int size) {
void RegMask::smear_to_sets(const int size) {
if (size == 1) return;
assert(2 <= size && size <= 8, "update low bits table");
assert(is_power_of_2(size), "sanity");
@ -318,7 +319,7 @@ void RegMask::smear_to_sets(int size) {
}
//------------------------------is_aligned_set--------------------------------
bool RegMask::is_aligned_sets(int size) const {
bool RegMask::is_aligned_sets(const int size) const {
if (size == 1) return true;
assert(2 <= size && size <= 8, "update low bits table");
assert(is_power_of_2(size), "sanity");
@ -344,7 +345,7 @@ bool RegMask::is_aligned_sets(int size) const {
//------------------------------is_bound_set-----------------------------------
// Return TRUE if the mask contains one adjacent set of bits and no other bits.
// Works also for size 1.
int RegMask::is_bound_set(int size) const {
int RegMask::is_bound_set(const int size) const {
if( is_AllStack() ) return false;
assert(1 <= size && size <= 8, "update low bits table");
int bit = -1; // Set to hold the one bit allowed
@ -352,7 +353,7 @@ int RegMask::is_bound_set(int size) const {
if (_A[i] ) { // Found some bits
if (bit != -1)
return false; // Already had bits, so fail
bit = _A[i] & -_A[i]; // Extract 1 bit from mask
bit = _A[i] & -_A[i]; // Extract low bit from mask
int hi_bit = bit << (size-1); // high bit
if (hi_bit != 0) { // Bit set stays in same word?
int set = hi_bit + ((hi_bit-1) & ~(bit-1));
@ -362,12 +363,12 @@ int RegMask::is_bound_set(int size) const {
if (((-1) & ~(bit-1)) != _A[i])
return false; // Found many bits, so fail
i++; // Skip iteration forward and check high part
assert(size <= 8, "update next code");
// The lower 24 bits should be 0 since it is split case and size <= 8.
int set = bit>>24;
set = set & -set; // Remove sign extension.
set = (((set << size) - 1) >> 8);
if (_A[i] != set) return false; // Require 1 lo bit in next word
if (i >= RM_SIZE || _A[i] != set)
return false; // Require expected low bits in next word
}
}
}

12
hotspot/src/share/vm/opto/regmask.hpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -225,22 +225,22 @@ public:
// Find the lowest-numbered register set in the mask. Return the
// HIGHEST register number in the set, or BAD if no sets.
// Assert that the mask contains only bit sets.
OptoReg::Name find_first_set(int size) const;
OptoReg::Name find_first_set(const int size) const;
// Clear out partial bits; leave only aligned adjacent bit sets of size.
void clear_to_sets(int size);
void clear_to_sets(const int size);
// Smear out partial bits to aligned adjacent bit sets.
void smear_to_sets(int size);
void smear_to_sets(const int size);
// Verify that the mask contains only aligned adjacent bit sets
void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
// Test that the mask contains only aligned adjacent bit sets
bool is_aligned_sets(int size) const;
bool is_aligned_sets(const int size) const;
// mask is a set of misaligned registers
bool is_misaligned_set(int size) const { return (int)Size()==size && !is_aligned_sets(size);}
// Test for a single adjacent set
int is_bound_set(int size) const;
int is_bound_set(const int size) const;
static bool is_vector(uint ireg);
static int num_registers(uint ireg);

2
hotspot/src/share/vm/runtime/arguments.cpp
View File

@ -1086,7 +1086,7 @@ void Arguments::set_tiered_flags() {
}
// Increase the code cache size - tiered compiles a lot more.
if (FLAG_IS_DEFAULT(ReservedCodeCacheSize)) {
FLAG_SET_DEFAULT(ReservedCodeCacheSize, ReservedCodeCacheSize * 2);
FLAG_SET_DEFAULT(ReservedCodeCacheSize, ReservedCodeCacheSize * 5);
}
}

11
hotspot/src/share/vm/runtime/globals.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -69,7 +69,10 @@ bool Flag::is_unlocker() const {
}
bool Flag::is_unlocked() const {
if (strcmp(kind, "{diagnostic}") == 0) {
if (strcmp(kind, "{diagnostic}") == 0 ||
strcmp(kind, "{C2 diagnostic}") == 0 ||
strcmp(kind, "{ARCH diagnostic}") == 0 ||
strcmp(kind, "{Shark diagnostic}") == 0) {
if (strcmp(name, "EnableInvokeDynamic") == 0 && UnlockExperimentalVMOptions && !UnlockDiagnosticVMOptions) {
// transitional logic to allow tests to run until they are changed
static int warned;
@ -78,7 +81,9 @@ bool Flag::is_unlocked() const {
}
return UnlockDiagnosticVMOptions;
} else if (strcmp(kind, "{experimental}") == 0 ||
strcmp(kind, "{C2 experimental}") == 0) {
strcmp(kind, "{C2 experimental}") == 0 ||
strcmp(kind, "{ARCH experimental}") == 0 ||
strcmp(kind, "{Shark experimental}") == 0) {
return UnlockExperimentalVMOptions;
} else {
return is_unlocked_ext();