8365633: Incorrect info is reported on hybrid CPU

Reviewed-by: kvn, dholmes
This commit is contained in:
Yasumasa Suenaga 2025-08-26 07:05:02 +00:00
parent e38c6f9827
commit 5013d69d96
3 changed files with 15 additions and 5 deletions

View File

@ -1099,8 +1099,12 @@ void VM_Version::get_processor_features() {
}
stringStream ss(2048);
ss.print("(%u cores per cpu, %u threads per core) family %d model %d stepping %d microcode 0x%x",
cores_per_cpu(), threads_per_core(),
if (supports_hybrid()) {
ss.print("(hybrid)");
} else {
ss.print("(%u cores per cpu, %u threads per core)", cores_per_cpu(), threads_per_core());
}
ss.print(" family %d model %d stepping %d microcode 0x%x",
cpu_family(), _model, _stepping, os::cpu_microcode_revision());
ss.print(", ");
int features_offset = (int)ss.size();
@ -3043,6 +3047,8 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const {
if (is_intel()) {
if (sef_cpuid7_edx.bits.serialize != 0)
vm_features.set_feature(CPU_SERIALIZE);
if (sef_cpuid7_edx.bits.hybrid != 0)
vm_features.set_feature(CPU_HYBRID);
if (_cpuid_info.sef_cpuid7_edx.bits.avx512_fp16 != 0)
vm_features.set_feature(CPU_AVX512_FP16);
}

View File

@ -276,7 +276,8 @@ class VM_Version : public Abstract_VM_Version {
fast_short_rep_mov : 1,
: 9,
serialize : 1,
: 5,
hybrid: 1,
: 4,
cet_ibt : 1,
: 2,
avx512_fp16 : 1,
@ -444,7 +445,8 @@ protected:
decl(SHA512, "sha512", 61) /* SHA512 instructions*/ \
decl(AVX512_FP16, "avx512_fp16", 62) /* AVX512 FP16 ISA support*/ \
decl(AVX10_1, "avx10_1", 63) /* AVX10 512 bit vector ISA Version 1 support*/ \
decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/
decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/ \
decl(HYBRID, "hybrid", 65) /* Hybrid architecture */
#define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (bit),
CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG)
@ -877,6 +879,7 @@ public:
static bool supports_avx512_fp16() { return _features.supports_feature(CPU_AVX512_FP16); }
static bool supports_hv() { return _features.supports_feature(CPU_HV); }
static bool supports_serialize() { return _features.supports_feature(CPU_SERIALIZE); }
static bool supports_hybrid() { return _features.supports_feature(CPU_HYBRID); }
static bool supports_f16c() { return _features.supports_feature(CPU_F16C); }
static bool supports_pku() { return _features.supports_feature(CPU_PKU); }
static bool supports_ospke() { return _features.supports_feature(CPU_OSPKE); }

View File

@ -287,7 +287,8 @@ public class AMD64 extends Architecture {
SHA512,
AVX512_FP16,
AVX10_1,
AVX10_2
AVX10_2,
HYBRID
}
private final EnumSet<CPUFeature> features;