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8365633: Incorrect info is reported on hybrid CPU
Reviewed-by: kvn, dholmes
This commit is contained in:
parent
e38c6f9827
commit
5013d69d96
@ -1099,8 +1099,12 @@ void VM_Version::get_processor_features() {
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}
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stringStream ss(2048);
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ss.print("(%u cores per cpu, %u threads per core) family %d model %d stepping %d microcode 0x%x",
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cores_per_cpu(), threads_per_core(),
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if (supports_hybrid()) {
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ss.print("(hybrid)");
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} else {
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ss.print("(%u cores per cpu, %u threads per core)", cores_per_cpu(), threads_per_core());
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}
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ss.print(" family %d model %d stepping %d microcode 0x%x",
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cpu_family(), _model, _stepping, os::cpu_microcode_revision());
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ss.print(", ");
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int features_offset = (int)ss.size();
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@ -3043,6 +3047,8 @@ VM_Version::VM_Features VM_Version::CpuidInfo::feature_flags() const {
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if (is_intel()) {
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if (sef_cpuid7_edx.bits.serialize != 0)
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vm_features.set_feature(CPU_SERIALIZE);
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if (sef_cpuid7_edx.bits.hybrid != 0)
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vm_features.set_feature(CPU_HYBRID);
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if (_cpuid_info.sef_cpuid7_edx.bits.avx512_fp16 != 0)
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vm_features.set_feature(CPU_AVX512_FP16);
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}
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@ -276,7 +276,8 @@ class VM_Version : public Abstract_VM_Version {
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fast_short_rep_mov : 1,
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: 9,
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serialize : 1,
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: 5,
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hybrid: 1,
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: 4,
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cet_ibt : 1,
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: 2,
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avx512_fp16 : 1,
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@ -444,7 +445,8 @@ protected:
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decl(SHA512, "sha512", 61) /* SHA512 instructions*/ \
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decl(AVX512_FP16, "avx512_fp16", 62) /* AVX512 FP16 ISA support*/ \
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decl(AVX10_1, "avx10_1", 63) /* AVX10 512 bit vector ISA Version 1 support*/ \
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decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/
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decl(AVX10_2, "avx10_2", 64) /* AVX10 512 bit vector ISA Version 2 support*/ \
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decl(HYBRID, "hybrid", 65) /* Hybrid architecture */
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#define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (bit),
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CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG)
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@ -877,6 +879,7 @@ public:
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static bool supports_avx512_fp16() { return _features.supports_feature(CPU_AVX512_FP16); }
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static bool supports_hv() { return _features.supports_feature(CPU_HV); }
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static bool supports_serialize() { return _features.supports_feature(CPU_SERIALIZE); }
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static bool supports_hybrid() { return _features.supports_feature(CPU_HYBRID); }
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static bool supports_f16c() { return _features.supports_feature(CPU_F16C); }
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static bool supports_pku() { return _features.supports_feature(CPU_PKU); }
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static bool supports_ospke() { return _features.supports_feature(CPU_OSPKE); }
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@ -287,7 +287,8 @@ public class AMD64 extends Architecture {
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SHA512,
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AVX512_FP16,
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AVX10_1,
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AVX10_2
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AVX10_2,
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HYBRID
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}
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private final EnumSet<CPUFeature> features;
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