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8365732: RISC-V: implement AES CTR intrinsics
Reviewed-by: fyang, mli
This commit is contained in:
Anjian Wen
Fei Yang
parent
15f2538943
commit
7e91d34f3e
@ -2493,8 +2493,8 @@ class StubGenerator: public StubCodeGenerator {
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__ vsetivli(x0, 4, Assembler::e32, Assembler::m1);
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__ vle32_v(res, from);
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__ mv(t2, 52);
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__ blt(keylen, t2, L_aes128);
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__ mv(t2, 52); // key length could be only {11, 13, 15} * 4 = {44, 52, 60}
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__ bltu(keylen, t2, L_aes128);
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__ beq(keylen, t2, L_aes192);
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// Else we fallthrough to the biggest case (256-bit key size)
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@ -2572,8 +2572,8 @@ class StubGenerator: public StubCodeGenerator {
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__ vsetivli(x0, 4, Assembler::e32, Assembler::m1);
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__ vle32_v(res, from);
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__ mv(t2, 52);
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__ blt(keylen, t2, L_aes128);
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__ mv(t2, 52); // key length could be only {11, 13, 15} * 4 = {44, 52, 60}
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__ bltu(keylen, t2, L_aes128);
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__ beq(keylen, t2, L_aes192);
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// Else we fallthrough to the biggest case (256-bit key size)
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@ -2606,6 +2606,223 @@ class StubGenerator: public StubCodeGenerator {
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return start;
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}
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// Load big-endian 128-bit from memory.
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void be_load_counter_128(Register counter_hi, Register counter_lo, Register counter) {
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__ ld(counter_lo, Address(counter, 8)); // Load 128-bits from counter
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__ ld(counter_hi, Address(counter));
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__ rev8(counter_lo, counter_lo); // Convert big-endian to little-endian
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__ rev8(counter_hi, counter_hi);
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}
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// Little-endian 128-bit + 64-bit -> 128-bit addition.
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void add_counter_128(Register counter_hi, Register counter_lo) {
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assert_different_registers(counter_hi, counter_lo, t0);
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__ addi(counter_lo, counter_lo, 1);
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__ seqz(t0, counter_lo); // Check for result overflow
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__ add(counter_hi, counter_hi, t0); // Add 1 if overflow otherwise 0
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}
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// Store big-endian 128-bit to memory.
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void be_store_counter_128(Register counter_hi, Register counter_lo, Register counter) {
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assert_different_registers(counter_hi, counter_lo, t0, t1);
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__ rev8(t0, counter_lo); // Convert little-endian to big-endian
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__ rev8(t1, counter_hi);
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__ sd(t0, Address(counter, 8)); // Store 128-bits to counter
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__ sd(t1, Address(counter));
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}
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void counterMode_AESCrypt(int round, Register in, Register out, Register key, Register counter,
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Register input_len, Register saved_encrypted_ctr, Register used_ptr) {
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// Algorithm:
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//
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// generate_aes_loadkeys();
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// load_counter_128(counter_hi, counter_lo, counter);
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//
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// L_next:
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// if (used >= BLOCK_SIZE) goto L_main_loop;
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//
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// L_encrypt_next:
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// *out = *in ^ saved_encrypted_ctr[used]);
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// out++; in++; used++; len--;
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// if (len == 0) goto L_exit;
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// goto L_next;
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//
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// L_main_loop:
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// if (len == 0) goto L_exit;
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// saved_encrypted_ctr = generate_aes_encrypt(counter);
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//
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// add_counter_128(counter_hi, counter_lo);
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// be_store_counter_128(counter_hi, counter_lo, counter);
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// used = 0;
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//
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// if(len < BLOCK_SIZE) goto L_encrypt_next;
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//
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// v_in = load_16Byte(in);
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// v_out = load_16Byte(out);
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// v_saved_encrypted_ctr = load_16Byte(saved_encrypted_ctr);
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// v_out = v_in ^ v_saved_encrypted_ctr;
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// out += BLOCK_SIZE;
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// in += BLOCK_SIZE;
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// len -= BLOCK_SIZE;
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// used = BLOCK_SIZE;
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// goto L_main_loop;
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//
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//
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// L_exit:
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// store(used);
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// result = input_len
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// return result;
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const Register used = x28;
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const Register len = x29;
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const Register counter_hi = x30;
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const Register counter_lo = x31;
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const Register block_size = t2;
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const unsigned int BLOCK_SIZE = 16;
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VectorRegister working_vregs[] = {
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v1, v2, v3, v4, v5, v6, v7, v8,
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v9, v10, v11, v12, v13, v14, v15
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};
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__ vsetivli(x0, 4, Assembler::e32, Assembler::m1);
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__ lwu(used, Address(used_ptr));
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__ mv(len, input_len);
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__ mv(block_size, BLOCK_SIZE);
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// load keys to working_vregs according to round
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generate_aes_loadkeys(key, working_vregs, round);
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// 128-bit big-endian load
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be_load_counter_128(counter_hi, counter_lo, counter);
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Label L_next, L_encrypt_next, L_main_loop, L_exit;
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// Check the last saved_encrypted_ctr used value, we fall through
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// to L_encrypt_next when the used value lower than block_size
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__ bind(L_next);
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__ bgeu(used, block_size, L_main_loop);
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// There is still data left fewer than block_size after L_main_loop
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// or last used, we encrypt them one by one.
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__ bind(L_encrypt_next);
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__ add(t0, saved_encrypted_ctr, used);
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__ lbu(t1, Address(t0));
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__ lbu(t0, Address(in));
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__ xorr(t1, t1, t0);
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__ sb(t1, Address(out));
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__ addi(in, in, 1);
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__ addi(out, out, 1);
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__ addi(used, used, 1);
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__ subi(len, len, 1);
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__ beqz(len, L_exit);
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__ j(L_next);
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// We will calculate the next saved_encrypted_ctr and encrypt the blocks of data
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// one by one until there is less than a full block remaining if len not zero
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__ bind(L_main_loop);
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__ beqz(len, L_exit);
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__ vle32_v(v16, counter);
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// encrypt counter according to round
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generate_aes_encrypt(v16, working_vregs, round);
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__ vse32_v(v16, saved_encrypted_ctr);
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// 128-bit little-endian increment
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add_counter_128(counter_hi, counter_lo);
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// 128-bit big-endian store
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be_store_counter_128(counter_hi, counter_lo, counter);
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__ mv(used, 0);
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// Check if we have a full block_size
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__ bltu(len, block_size, L_encrypt_next);
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// We have one full block to encrypt at least
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__ vle32_v(v17, in);
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__ vxor_vv(v16, v16, v17);
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__ vse32_v(v16, out);
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__ add(out, out, block_size);
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__ add(in, in, block_size);
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__ sub(len, len, block_size);
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__ mv(used, block_size);
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__ j(L_main_loop);
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__ bind(L_exit);
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__ sw(used, Address(used_ptr));
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__ mv(x10, input_len);
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__ leave();
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__ ret();
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};
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// CTR AES crypt.
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// Arguments:
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//
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// Inputs:
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// c_rarg0 - source byte array address
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// c_rarg1 - destination byte array address
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// c_rarg2 - K (key) in little endian int array
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// c_rarg3 - counter vector byte array address
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// c_rarg4 - input length
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// c_rarg5 - saved encryptedCounter start
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// c_rarg6 - saved used length
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//
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// Output:
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// x10 - input length
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//
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address generate_counterMode_AESCrypt() {
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assert(UseZvkn, "need AES instructions (Zvkned extension) support");
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assert(UseAESCTRIntrinsics, "need AES instructions (Zvkned extension) support");
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assert(UseZbb, "need basic bit manipulation (Zbb extension) support");
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__ align(CodeEntryAlignment);
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StubId stub_id = StubId::stubgen_counterMode_AESCrypt_id;
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StubCodeMark mark(this, stub_id);
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const Register in = c_rarg0;
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const Register out = c_rarg1;
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const Register key = c_rarg2;
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const Register counter = c_rarg3;
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const Register input_len = c_rarg4;
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const Register saved_encrypted_ctr = c_rarg5;
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const Register used_len_ptr = c_rarg6;
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const Register keylen = c_rarg7; // temporary register
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const address start = __ pc();
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__ enter();
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Label L_exit;
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__ beqz(input_len, L_exit);
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Label L_aes128, L_aes192;
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// Compute #rounds for AES based on the length of the key array
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__ lwu(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
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__ mv(t0, 52); // key length could be only {11, 13, 15} * 4 = {44, 52, 60}
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__ bltu(keylen, t0, L_aes128);
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__ beq(keylen, t0, L_aes192);
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// Else we fallthrough to the biggest case (256-bit key size)
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// Note: the following function performs crypt with key += 15*16
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counterMode_AESCrypt(15, in, out, key, counter, input_len, saved_encrypted_ctr, used_len_ptr);
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// Note: the following function performs crypt with key += 13*16
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__ bind(L_aes192);
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counterMode_AESCrypt(13, in, out, key, counter, input_len, saved_encrypted_ctr, used_len_ptr);
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// Note: the following function performs crypt with key += 11*16
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__ bind(L_aes128);
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counterMode_AESCrypt(11, in, out, key, counter, input_len, saved_encrypted_ctr, used_len_ptr);
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__ bind(L_exit);
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__ mv(x10, input_len);
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__ leave();
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__ ret();
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return start;
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}
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// code for comparing 8 characters of strings with Latin1 and Utf16 encoding
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void compare_string_8_x_LU(Register tmpL, Register tmpU,
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Register strL, Register strU, Label& DIFF) {
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@ -6826,6 +7043,10 @@ static const int64_t right_3_bits = right_n_bits(3);
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StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
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}
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if (UseAESCTRIntrinsics) {
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StubRoutines::_counterMode_AESCrypt = generate_counterMode_AESCrypt();
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}
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if (UsePoly1305Intrinsics) {
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StubRoutines::_poly1305_processBlocks = generate_poly1305_processBlocks();
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}
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@ -434,6 +434,15 @@ void VM_Version::c2_initialize() {
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warning("UseAESIntrinsics enabled, but UseAES not, enabling");
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UseAES = true;
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}
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if (FLAG_IS_DEFAULT(UseAESCTRIntrinsics) && UseZbb) {
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, true);
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}
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if (UseAESCTRIntrinsics && !UseZbb) {
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warning("Cannot enable UseAESCTRIntrinsics on cpu without UseZbb support.");
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
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}
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} else {
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if (UseAES) {
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warning("AES instructions are not available on this CPU");
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@ -443,11 +452,10 @@ void VM_Version::c2_initialize() {
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warning("AES intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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}
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if (UseAESCTRIntrinsics) {
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warning("AES/CTR intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
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if (UseAESCTRIntrinsics) {
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warning("Cannot enable UseAESCTRIntrinsics on cpu without UseZvkn support.");
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
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}
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}
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}
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