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8283740: C1: Convert flag TwoOperandLIRForm to a constant on all platforms
Reviewed-by: thartmann, chagedorn
This commit is contained in:
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ec95991470
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86d588b035
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -78,4 +78,8 @@ enum {
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pd_float_saved_as_double = false
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};
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enum {
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pd_two_operand_lir_form = false
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};
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#endif // CPU_AARCH64_C1_DEFS_AARCH64_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2014, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -60,6 +60,5 @@ define_pd_global(bool, UseTypeProfile, false);
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define_pd_global(bool, OptimizeSinglePrecision, true );
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define_pd_global(bool, CSEArrayLength, false);
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define_pd_global(bool, TwoOperandLIRForm, false );
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#endif // CPU_AARCH64_C1_GLOBALS_AARCH64_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -74,6 +74,10 @@ enum {
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pd_float_saved_as_double = false
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};
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enum {
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pd_two_operand_lir_form = false
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};
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#define PATCHED_ADDR (204)
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#define CARDTABLEBARRIERSET_POST_BARRIER_HELPER
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -61,6 +61,5 @@ define_pd_global(bool, UseTypeProfile, false);
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define_pd_global(bool, OptimizeSinglePrecision, true);
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define_pd_global(bool, CSEArrayLength, true);
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define_pd_global(bool, TwoOperandLIRForm, false);
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#endif // CPU_ARM_C1_GLOBALS_ARM_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -73,4 +73,8 @@ enum {
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pd_float_saved_as_double = true
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};
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enum {
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pd_two_operand_lir_form = false
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};
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#endif // CPU_PPC_C1_DEFS_PPC_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012, 2019 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -61,6 +61,5 @@ define_pd_global(bool, UseTypeProfile, false);
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define_pd_global(bool, OptimizeSinglePrecision, false);
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define_pd_global(bool, CSEArrayLength, true);
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define_pd_global(bool, TwoOperandLIRForm, false);
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#endif // CPU_PPC_C1_GLOBALS_PPC_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -81,4 +81,8 @@ enum {
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pd_float_saved_as_double = false
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};
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enum {
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pd_two_operand_lir_form = false
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};
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#endif // CPU_RISCV_C1_DEFS_RISCV_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -60,6 +60,5 @@ define_pd_global(bool, UseTypeProfile, false);
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define_pd_global(bool, OptimizeSinglePrecision, true );
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define_pd_global(bool, CSEArrayLength, false);
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define_pd_global(bool, TwoOperandLIRForm, false);
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#endif // CPU_RISCV_C1_GLOBALS_RISCV_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -68,4 +68,8 @@ enum {
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pd_float_saved_as_double = false
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};
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enum {
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pd_two_operand_lir_form = true
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};
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#endif // CPU_S390_C1_DEFS_S390_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2016, 2018 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -61,6 +61,5 @@ define_pd_global(bool, UseTypeProfile, false);
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define_pd_global(bool, OptimizeSinglePrecision, false);
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define_pd_global(bool, CSEArrayLength, true);
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define_pd_global(bool, TwoOperandLIRForm, true);
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#endif // CPU_S390_C1_GLOBALS_S390_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -75,4 +75,8 @@ enum {
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pd_float_saved_as_double = true
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};
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enum {
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pd_two_operand_lir_form = true
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};
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#endif // CPU_X86_C1_DEFS_X86_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -59,6 +59,5 @@ define_pd_global(bool, UseTypeProfile, false);
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define_pd_global(bool, OptimizeSinglePrecision, true );
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define_pd_global(bool, CSEArrayLength, false);
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define_pd_global(bool, TwoOperandLIRForm, true );
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#endif // CPU_X86_C1_GLOBALS_X86_HPP
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2000, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -56,4 +56,9 @@ enum {
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float_saved_as_double = pd_float_saved_as_double
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};
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// true if LIR requires src1 and dst to match in binary LIR ops
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enum {
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two_operand_lir_form = pd_two_operand_lir_form
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};
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#endif // SHARE_C1_C1_DEFS_HPP
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@ -194,7 +194,7 @@ void LIR_Op2::verify() const {
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"can't produce oops from arith");
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}
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if (TwoOperandLIRForm) {
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if (two_operand_lir_form) {
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#ifdef ASSERT
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bool threeOperandForm = false;
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@ -491,7 +491,7 @@ void LIRGenerator::arithmetic_op(Bytecodes::Code code, LIR_Opr result, LIR_Opr l
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LIR_Opr left_op = left;
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LIR_Opr right_op = right;
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if (TwoOperandLIRForm && left_op != result_op) {
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if (two_operand_lir_form && left_op != result_op) {
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assert(right_op != result_op, "malformed");
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__ move(left_op, result_op);
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left_op = result_op;
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@ -563,7 +563,7 @@ void LIRGenerator::arithmetic_op_fpu(Bytecodes::Code code, LIR_Opr result, LIR_O
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void LIRGenerator::shift_op(Bytecodes::Code code, LIR_Opr result_op, LIR_Opr value, LIR_Opr count, LIR_Opr tmp) {
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if (TwoOperandLIRForm && value != result_op
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if (two_operand_lir_form && value != result_op
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// Only 32bit right shifts require two operand form on S390.
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S390_ONLY(&& (code == Bytecodes::_ishr || code == Bytecodes::_iushr))) {
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assert(count != result_op, "malformed");
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@ -585,7 +585,7 @@ void LIRGenerator::shift_op(Bytecodes::Code code, LIR_Opr result_op, LIR_Opr val
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void LIRGenerator::logic_op (Bytecodes::Code code, LIR_Opr result_op, LIR_Opr left_op, LIR_Opr right_op) {
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if (TwoOperandLIRForm && left_op != result_op) {
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if (two_operand_lir_form && left_op != result_op) {
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assert(right_op != result_op, "malformed");
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__ move(left_op, result_op);
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left_op = result_op;
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@ -3547,7 +3547,7 @@ void LIRGenerator::do_MemBar(MemBar* x) {
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LIR_Opr LIRGenerator::mask_boolean(LIR_Opr array, LIR_Opr value, CodeEmitInfo*& null_check_info) {
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LIR_Opr value_fixed = rlock_byte(T_BYTE);
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if (TwoOperandLIRForm) {
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if (two_operand_lir_form) {
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__ move(value, value_fixed);
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__ logical_and(value_fixed, LIR_OprFact::intConst(1), value_fixed);
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} else {
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@ -203,9 +203,6 @@
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develop_pd(bool, CSEArrayLength, \
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"Create separate nodes for length in array accesses") \
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\
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develop_pd(bool, TwoOperandLIRForm, \
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"true if LIR requires src1 and dst to match in binary LIR ops") \
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\
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develop(intx, TraceLinearScanLevel, 0, \
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"Debug levels for the linear scan allocator") \
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range(0, 4) \
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -153,7 +153,7 @@ void G1BarrierSetC1::post_barrier(LIRAccess& access, LIR_Opr addr, LIR_Opr new_v
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LIR_Opr xor_res = gen->new_pointer_register();
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LIR_Opr xor_shift_res = gen->new_pointer_register();
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if (TwoOperandLIRForm) {
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if (two_operand_lir_form) {
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__ move(addr, xor_res);
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__ logical_xor(xor_res, new_val, xor_res);
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__ move(xor_res, xor_shift_res);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, 2021, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -66,7 +66,7 @@ void CardTableBarrierSetC1::post_barrier(LIRAccess& access, LIR_Opr addr, LIR_Op
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gen->CardTableBarrierSet_post_barrier_helper(addr, card_table_base);
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#else
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LIR_Opr tmp = gen->new_pointer_register();
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if (TwoOperandLIRForm) {
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if (two_operand_lir_form) {
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LIR_Opr addr_opr = LIR_OprFact::address(new LIR_Address(addr, addr->type()));
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__ leal(addr_opr, tmp);
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__ unsigned_shift_right(tmp, CardTable::card_shift(), tmp);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
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* Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -146,7 +146,7 @@ LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier_impl(LIRGenerator* gen, L
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LIR_Opr mask_reg = gen->new_register(T_INT);
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__ move(mask, mask_reg);
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if (TwoOperandLIRForm) {
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if (two_operand_lir_form) {
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__ logical_and(flag_val, mask_reg, flag_val);
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} else {
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LIR_Opr masked_flag = gen->new_register(T_INT);
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