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8220420: Cleanup c1_LinearScan
Reviewed-by: thartmann, neliasso
This commit is contained in:
Claes Redestad
parent
bacddb40eb
commit
8c047147f9
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -81,7 +81,7 @@ LinearScan::LinearScan(IR* ir, LIRGenerator* gen, FrameMap* frame_map)
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, _max_spills(0)
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, _unused_spill_slot(-1)
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, _intervals(0) // initialized later with correct length
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, _new_intervals_from_allocation(new IntervalList())
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, _new_intervals_from_allocation(NULL)
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, _sorted_intervals(NULL)
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, _needs_full_resort(false)
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, _lir_ops(0) // initialized later with correct length
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@ -287,7 +287,11 @@ Interval* LinearScan::create_interval(int reg_num) {
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void LinearScan::append_interval(Interval* it) {
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it->set_reg_num(_intervals.length());
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_intervals.append(it);
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_new_intervals_from_allocation->append(it);
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IntervalList* new_intervals = _new_intervals_from_allocation;
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if (new_intervals == NULL) {
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new_intervals = _new_intervals_from_allocation = new IntervalList();
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}
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new_intervals->append(it);
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}
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// copy the vreg-flags if an interval is split
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@ -1283,7 +1287,7 @@ void LinearScan::build_intervals() {
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// temp ranges for fpu registers are only created when the method has
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// virtual fpu operands. Otherwise no allocation for fpu registers is
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// perfomed and so the temp ranges would be useless
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// performed and so the temp ranges would be useless
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if (has_fpu_registers()) {
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#ifdef X86
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if (UseSSE < 2) {
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@ -1616,7 +1620,7 @@ void LinearScan::sort_intervals_after_allocation() {
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IntervalArray* old_list = _sorted_intervals;
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IntervalList* new_list = _new_intervals_from_allocation;
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int old_len = old_list->length();
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int new_len = new_list->length();
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int new_len = new_list == NULL ? 0 : new_list->length();
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if (new_len == 0) {
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// no intervals have been added during allocation, so sorted list is already up to date
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@ -1721,13 +1725,12 @@ Interval* LinearScan::interval_at_op_id(int reg_num, int op_id) {
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void LinearScan::resolve_collect_mappings(BlockBegin* from_block, BlockBegin* to_block, MoveResolver &move_resolver) {
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DEBUG_ONLY(move_resolver.check_empty());
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const int num_regs = num_virtual_regs();
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const int size = live_set_size();
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const ResourceBitMap live_at_edge = to_block->live_in();
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// visit all registers where the live_at_edge bit is set
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for (int r = (int)live_at_edge.get_next_one_offset(0, size); r < size; r = (int)live_at_edge.get_next_one_offset(r + 1, size)) {
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assert(r < num_regs, "live information set for not exisiting interval");
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assert(r < num_virtual_regs(), "live information set for not exisiting interval");
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assert(from_block->live_out().at(r) && to_block->live_in().at(r), "interval not live at this edge");
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Interval* from_interval = interval_at_block_end(from_block, r);
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@ -4124,7 +4127,7 @@ Interval::Interval(int reg_num) :
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_cached_to(-1),
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_cached_opr(LIR_OprFact::illegalOpr),
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_cached_vm_reg(VMRegImpl::Bad()),
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_split_children(0),
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_split_children(NULL),
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_canonical_spill_slot(-1),
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_insert_move_when_activated(false),
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_spill_state(noDefinitionFound),
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@ -4149,18 +4152,18 @@ int Interval::calc_to() {
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#ifdef ASSERT
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// consistency check of split-children
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void Interval::check_split_children() {
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if (_split_children.length() > 0) {
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if (_split_children != NULL && _split_children->length() > 0) {
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assert(is_split_parent(), "only split parents can have children");
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for (int i = 0; i < _split_children.length(); i++) {
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Interval* i1 = _split_children.at(i);
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for (int i = 0; i < _split_children->length(); i++) {
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Interval* i1 = _split_children->at(i);
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assert(i1->split_parent() == this, "not a split child of this interval");
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assert(i1->type() == type(), "must be equal for all split children");
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assert(i1->canonical_spill_slot() == canonical_spill_slot(), "must be equal for all split children");
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for (int j = i + 1; j < _split_children.length(); j++) {
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Interval* i2 = _split_children.at(j);
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for (int j = i + 1; j < _split_children->length(); j++) {
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Interval* i2 = _split_children->at(j);
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assert(i1->reg_num() != i2->reg_num(), "same register number");
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@ -4187,11 +4190,11 @@ Interval* Interval::register_hint(bool search_split_child) const {
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if (_register_hint->assigned_reg() >= 0 && _register_hint->assigned_reg() < LinearScan::nof_regs) {
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return _register_hint;
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} else if (_register_hint->_split_children.length() > 0) {
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} else if (_register_hint->_split_children != NULL && _register_hint->_split_children->length() > 0) {
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// search the first split child that has a register assigned
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int len = _register_hint->_split_children.length();
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int len = _register_hint->_split_children->length();
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for (int i = 0; i < len; i++) {
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Interval* cur = _register_hint->_split_children.at(i);
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Interval* cur = _register_hint->_split_children->at(i);
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if (cur->assigned_reg() >= 0 && cur->assigned_reg() < LinearScan::nof_regs) {
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return cur;
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@ -4210,23 +4213,23 @@ Interval* Interval::split_child_at_op_id(int op_id, LIR_OpVisitState::OprMode mo
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assert(op_id >= 0, "invalid op_id (method can not be called for spill moves)");
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Interval* result;
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if (_split_children.length() == 0) {
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if (_split_children == NULL || _split_children->length() == 0) {
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result = this;
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} else {
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result = NULL;
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int len = _split_children.length();
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int len = _split_children->length();
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// in outputMode, the end of the interval (op_id == cur->to()) is not valid
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int to_offset = (mode == LIR_OpVisitState::outputMode ? 0 : 1);
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int i;
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for (i = 0; i < len; i++) {
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Interval* cur = _split_children.at(i);
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Interval* cur = _split_children->at(i);
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if (cur->from() <= op_id && op_id < cur->to() + to_offset) {
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if (i > 0) {
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// exchange current split child to start of list (faster access for next call)
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_split_children.at_put(i, _split_children.at(0));
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_split_children.at_put(0, cur);
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_split_children->at_put(i, _split_children->at(0));
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_split_children->at_put(0, cur);
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}
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// interval found
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@ -4237,7 +4240,7 @@ Interval* Interval::split_child_at_op_id(int op_id, LIR_OpVisitState::OprMode mo
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#ifdef ASSERT
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for (i = 0; i < len; i++) {
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Interval* tmp = _split_children.at(i);
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Interval* tmp = _split_children->at(i);
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if (tmp != result && tmp->from() <= op_id && op_id < tmp->to() + to_offset) {
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tty->print_cr("two valid result intervals found for op_id %d: %d and %d", op_id, result->reg_num(), tmp->reg_num());
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result->print();
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@ -4262,11 +4265,12 @@ Interval* Interval::split_child_before_op_id(int op_id) {
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Interval* parent = split_parent();
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Interval* result = NULL;
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int len = parent->_split_children.length();
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assert(parent->_split_children != NULL, "no split children available");
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int len = parent->_split_children->length();
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assert(len > 0, "no split children available");
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for (int i = len - 1; i >= 0; i--) {
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Interval* cur = parent->_split_children.at(i);
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Interval* cur = parent->_split_children->at(i);
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if (cur->to() <= op_id && (result == NULL || result->to() < cur->to())) {
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result = cur;
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}
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@ -4277,29 +4281,6 @@ Interval* Interval::split_child_before_op_id(int op_id) {
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}
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// checks if op_id is covered by any split child
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bool Interval::split_child_covers(int op_id, LIR_OpVisitState::OprMode mode) {
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assert(is_split_parent(), "can only be called for split parents");
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assert(op_id >= 0, "invalid op_id (method can not be called for spill moves)");
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if (_split_children.length() == 0) {
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// simple case if interval was not split
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return covers(op_id, mode);
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} else {
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// extended case: check all split children
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int len = _split_children.length();
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for (int i = 0; i < len; i++) {
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Interval* cur = _split_children.at(i);
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if (cur->covers(op_id, mode)) {
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return true;
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}
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}
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return false;
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}
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}
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// Note: use positions are sorted descending -> first use has highest index
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int Interval::first_usage(IntervalUseKind min_use_kind) const {
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assert(LinearScan::is_virtual_interval(this), "cannot access use positions for fixed intervals");
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@ -4404,13 +4385,13 @@ Interval* Interval::new_split_child() {
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result->set_register_hint(parent);
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// insert new interval in children-list of parent
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if (parent->_split_children.length() == 0) {
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if (parent->_split_children == NULL) {
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assert(is_split_parent(), "list must be initialized at first split");
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parent->_split_children = IntervalList(4);
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parent->_split_children.append(this);
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parent->_split_children = new IntervalList(4);
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parent->_split_children->append(this);
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}
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parent->_split_children.append(result);
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parent->_split_children->append(result);
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return result;
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}
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@ -4655,12 +4636,6 @@ IntervalWalker::IntervalWalker(LinearScan* allocator, Interval* unhandled_fixed_
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}
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// append interval at top of list
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void IntervalWalker::append_unsorted(Interval** list, Interval* interval) {
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interval->set_next(*list); *list = interval;
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}
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// append interval in order of current range from()
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void IntervalWalker::append_sorted(Interval** list, Interval* interval) {
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Interval* prev = NULL;
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@ -4964,17 +4939,6 @@ void LinearScanWalker::free_collect_inactive_any(Interval* cur) {
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}
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}
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void LinearScanWalker::free_collect_unhandled(IntervalKind kind, Interval* cur) {
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Interval* list = unhandled_first(kind);
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while (list != Interval::end()) {
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set_use_pos(list, list->intersects_at(cur), true);
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if (kind == fixedKind && cur->to() <= list->from()) {
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set_use_pos(list, list->from(), true);
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}
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list = list->next();
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}
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}
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void LinearScanWalker::spill_exclude_active_fixed() {
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Interval* list = active_first(fixedKind);
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while (list != Interval::end()) {
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@ -4983,14 +4947,6 @@ void LinearScanWalker::spill_exclude_active_fixed() {
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}
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}
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void LinearScanWalker::spill_block_unhandled_fixed(Interval* cur) {
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Interval* list = unhandled_first(fixedKind);
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while (list != Interval::end()) {
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set_block_pos(list, list->intersects_at(cur));
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list = list->next();
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}
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}
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void LinearScanWalker::spill_block_inactive_fixed(Interval* cur) {
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Interval* list = inactive_first(fixedKind);
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while (list != Interval::end()) {
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@ -5412,7 +5368,6 @@ bool LinearScanWalker::alloc_free_reg(Interval* cur) {
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free_exclude_active_any();
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free_collect_inactive_fixed(cur);
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free_collect_inactive_any(cur);
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// free_collect_unhandled(fixedKind, cur);
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assert(unhandled_first(fixedKind) == Interval::end(), "must not have unhandled fixed intervals because all fixed intervals have a use at position 0");
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// _use_pos contains the start of the next interval that has this register assigned
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@ -5445,8 +5400,8 @@ bool LinearScanWalker::alloc_free_reg(Interval* cur) {
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int interval_to = cur->to();
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bool need_split = false;
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int split_pos = -1;
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int reg = any_reg;
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int split_pos;
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int reg;
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int regHi = any_reg;
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if (_adjacent_regs) {
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@ -5500,7 +5455,7 @@ bool LinearScanWalker::alloc_free_reg(Interval* cur) {
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}
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int LinearScanWalker::find_locked_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split) {
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int LinearScanWalker::find_locked_reg(int reg_needed_until, int interval_to, int ignore_reg, bool* need_split) {
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int max_reg = any_reg;
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for (int i = _first_reg; i <= _last_reg; i++) {
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@ -5508,7 +5463,7 @@ int LinearScanWalker::find_locked_reg(int reg_needed_until, int interval_to, int
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// this register must be ignored
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} else if (_use_pos[i] > reg_needed_until) {
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if (max_reg == any_reg || i == hint_reg || (_use_pos[i] > _use_pos[max_reg] && max_reg != hint_reg)) {
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if (max_reg == any_reg || _use_pos[i] > _use_pos[max_reg]) {
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max_reg = i;
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}
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}
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@ -5521,7 +5476,7 @@ int LinearScanWalker::find_locked_reg(int reg_needed_until, int interval_to, int
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return max_reg;
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}
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int LinearScanWalker::find_locked_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split) {
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int LinearScanWalker::find_locked_double_reg(int reg_needed_until, int interval_to, bool* need_split) {
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assert((_last_reg - _first_reg + 1) % 2 == 0, "adjust algorithm");
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int max_reg = any_reg;
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@ -5571,7 +5526,6 @@ void LinearScanWalker::alloc_locked_reg(Interval* cur) {
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// collect current usage of registers
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init_use_lists(false);
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spill_exclude_active_fixed();
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// spill_block_unhandled_fixed(cur);
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assert(unhandled_first(fixedKind) == Interval::end(), "must not have unhandled fixed intervals because all fixed intervals have a use at position 0");
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spill_block_inactive_fixed(cur);
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spill_collect_active_any();
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@ -5601,7 +5555,7 @@ void LinearScanWalker::alloc_locked_reg(Interval* cur) {
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int reg, regHi;
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if (_adjacent_regs) {
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reg = find_locked_double_reg(reg_needed_until, interval_to, any_reg, &need_split);
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reg = find_locked_double_reg(reg_needed_until, interval_to, &need_split);
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regHi = reg + 1;
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if (reg != any_reg) {
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@ -5609,7 +5563,7 @@ void LinearScanWalker::alloc_locked_reg(Interval* cur) {
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split_pos = MIN2(_block_pos[reg], _block_pos[regHi]);
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}
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} else {
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reg = find_locked_reg(reg_needed_until, interval_to, any_reg, cur->assigned_reg(), &need_split);
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reg = find_locked_reg(reg_needed_until, interval_to, cur->assigned_reg(), &need_split);
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regHi = any_reg;
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if (reg != any_reg) {
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@ -5621,7 +5575,7 @@ void LinearScanWalker::alloc_locked_reg(Interval* cur) {
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regHi = reg;
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reg = cur->assigned_reg();
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} else {
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regHi = find_locked_reg(reg_needed_until, interval_to, any_reg, reg, &need_split);
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regHi = find_locked_reg(reg_needed_until, interval_to, reg, &need_split);
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if (regHi != any_reg) {
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use_pos = MIN2(use_pos, _use_pos[regHi]);
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split_pos = MIN2(split_pos, _block_pos[regHi]);
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@ -34,7 +34,6 @@
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#include "utilities/align.hpp"
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#include "utilities/macros.hpp"
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class DebugInfoCache;
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class FpuStackAllocator;
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class IRScopeDebugInfo;
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class Interval;
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@ -190,15 +189,12 @@ class LinearScan : public CompilationResourceObj {
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int interval_count() const { return _intervals.length(); }
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Interval* interval_at(int reg_num) const { return _intervals.at(reg_num); }
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IntervalList* new_intervals_from_allocation() const { return _new_intervals_from_allocation; }
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// access to LIR_Ops and Blocks indexed by op_id
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int max_lir_op_id() const { assert(_lir_ops.length() > 0, "no operations"); return (_lir_ops.length() - 1) << 1; }
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LIR_Op* lir_op_with_id(int op_id) const { assert(op_id >= 0 && op_id <= max_lir_op_id() && op_id % 2 == 0, "op_id out of range or not even"); return _lir_ops.at(op_id >> 1); }
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BlockBegin* block_of_op_with_id(int op_id) const { assert(_block_of_op.length() > 0 && op_id >= 0 && op_id <= max_lir_op_id() + 1, "op_id out of range"); return _block_of_op.at(op_id >> 1); }
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bool is_block_begin(int op_id) { return op_id == 0 || block_of_op_with_id(op_id) != block_of_op_with_id(op_id - 1); }
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bool covers_block_begin(int op_id_1, int op_id_2) { return block_of_op_with_id(op_id_1) != block_of_op_with_id(op_id_2); }
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bool has_call(int op_id) { assert(op_id % 2 == 0, "must be even"); return _has_call.at(op_id >> 1); }
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bool has_info(int op_id) { assert(op_id % 2 == 0, "must be even"); return _has_info.at(op_id >> 1); }
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@ -523,7 +519,7 @@ class Interval : public CompilationResourceObj {
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VMReg _cached_vm_reg;
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Interval* _split_parent; // the original interval where this interval is derived from
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IntervalList _split_children; // list of all intervals that are split off from this interval (only available for split parents)
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IntervalList* _split_children; // list of all intervals that are split off from this interval (only available for split parents)
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Interval* _current_split_child; // the current split child that has been active or inactive last (always stored in split parents)
|
||||
|
||||
int _canonical_spill_slot; // the stack slot where all split parts of this interval are spilled to (always stored in split parents)
|
||||
@ -549,7 +545,10 @@ class Interval : public CompilationResourceObj {
|
||||
Range* first() const { return _first; }
|
||||
int from() const { return _first->from(); }
|
||||
int to() { if (_cached_to == -1) _cached_to = calc_to(); assert(_cached_to == calc_to(), "invalid cached value"); return _cached_to; }
|
||||
|
||||
#ifndef PRODUCT
|
||||
int num_use_positions() const { return _use_pos_and_kinds.length() / 2; }
|
||||
#endif
|
||||
|
||||
Interval* next() const { return _next; }
|
||||
Interval** next_addr() { return &_next; }
|
||||
@ -572,7 +571,6 @@ class Interval : public CompilationResourceObj {
|
||||
Interval* split_parent() const { assert(_split_parent->is_split_parent(), "must be"); return _split_parent; }
|
||||
Interval* split_child_at_op_id(int op_id, LIR_OpVisitState::OprMode mode);
|
||||
Interval* split_child_before_op_id(int op_id);
|
||||
bool split_child_covers(int op_id, LIR_OpVisitState::OprMode mode);
|
||||
DEBUG_ONLY(void check_split_children();)
|
||||
|
||||
// information stored in split parent, but available for all children
|
||||
@ -658,7 +656,6 @@ class IntervalWalker : public CompilationResourceObj {
|
||||
Interval** active_first_addr(IntervalKind kind) { check_bounds(kind); return &_active_first[kind]; }
|
||||
Interval** inactive_first_addr(IntervalKind kind) { check_bounds(kind); return &_inactive_first[kind]; }
|
||||
|
||||
void append_unsorted(Interval** first, Interval* interval);
|
||||
void append_sorted(Interval** first, Interval* interval);
|
||||
void append_to_unhandled(Interval** list, Interval* interval);
|
||||
|
||||
@ -733,9 +730,7 @@ class LinearScanWalker : public IntervalWalker {
|
||||
void free_exclude_active_any();
|
||||
void free_collect_inactive_fixed(Interval* cur);
|
||||
void free_collect_inactive_any(Interval* cur);
|
||||
void free_collect_unhandled(IntervalKind kind, Interval* cur);
|
||||
void spill_exclude_active_fixed();
|
||||
void spill_block_unhandled_fixed(Interval* cur);
|
||||
void spill_block_inactive_fixed(Interval* cur);
|
||||
void spill_collect_active_any();
|
||||
void spill_collect_inactive_any(Interval* cur);
|
||||
@ -753,13 +748,12 @@ class LinearScanWalker : public IntervalWalker {
|
||||
int find_free_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split);
|
||||
bool alloc_free_reg(Interval* cur);
|
||||
|
||||
int find_locked_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split);
|
||||
int find_locked_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split);
|
||||
int find_locked_reg(int reg_needed_until, int interval_to, int ignore_reg, bool* need_split);
|
||||
int find_locked_double_reg(int reg_needed_until, int interval_to, bool* need_split);
|
||||
void split_and_spill_intersecting_intervals(int reg, int regHi);
|
||||
void alloc_locked_reg(Interval* cur);
|
||||
|
||||
bool no_allocation_possible(Interval* cur);
|
||||
void update_phys_reg_range(bool requires_cpu_register);
|
||||
void init_vars_for_alloc(Interval* cur);
|
||||
bool pd_init_regs_for_alloc(Interval* cur);
|
||||
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user