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8186325: AArch64: jtreg test hotspot/test/gc/g1/TestJNIWeakG1/TestJNIWeakG1.java SEGV

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Reviewed-by: adinn, aph
This commit is contained in:
Stuart Monteith 2017-08-24 16:12:40 +08:00 committed by Ningsheng Jian
parent 897a7b3f67
commit 8d75bd2ea6
3 changed files with 20 additions and 6 deletions
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22
hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
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@ -3630,6 +3630,12 @@ void MacroAssembler::store_heap_oop_null(Address dst) {
}
#if INCLUDE_ALL_GCS
/*
* g1_write_barrier_pre -- G1GC pre-write barrier for store of new_val at
* store_addr.
*
* Allocates rscratch1
*/
void MacroAssembler::g1_write_barrier_pre(Register obj,
Register pre_val,
Register thread,
@ -3645,10 +3651,8 @@ void MacroAssembler::g1_write_barrier_pre(Register obj,
Label done;
Label runtime;
assert(pre_val != noreg, "check this code");
if (obj != noreg)
assert_different_registers(obj, pre_val, tmp);
assert_different_registers(obj, pre_val, tmp, rscratch1);
assert(pre_val != noreg && tmp != noreg, "expecting a register");
Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
SATBMarkQueue::byte_offset_of_active()));
@ -3722,12 +3726,22 @@ void MacroAssembler::g1_write_barrier_pre(Register obj,
bind(done);
}
/*
* g1_write_barrier_post -- G1GC post-write barrier for store of new_val at
* store_addr
*
* Allocates rscratch1
*/
void MacroAssembler::g1_write_barrier_post(Register store_addr,
Register new_val,
Register thread,
Register tmp,
Register tmp2) {
assert(thread == rthread, "must be");
assert_different_registers(store_addr, new_val, thread, tmp, tmp2,
rscratch1);
assert(store_addr != noreg && new_val != noreg && tmp != noreg
&& tmp2 != noreg, "expecting a register");
Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
DirtyCardQueue::byte_offset_of_index()));

2
hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp
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@ -2067,7 +2067,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
__ g1_write_barrier_pre(noreg /* obj */,
r0 /* pre_val */,
rthread /* thread */,
rscratch1 /* tmp */,
rscratch2 /* tmp */,
true /* tosca_live */,
true /* expand_call */);
}

2
hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp
View File

@ -170,7 +170,7 @@ static void do_oop_store(InterpreterMacroAssembler* _masm,
// G1 barrier needs uncompressed oop for region cross check.
Register new_val = val;
if (UseCompressedOops) {
new_val = rscratch1;
new_val = rscratch2;
__ mov(new_val, val);
}
__ store_heap_oop(Address(r3, 0), val);