From 95093ee7f6b0acf0bb22ced7d61ecec01831850b Mon Sep 17 00:00:00 2001 From: Andrew Haley Date: Wed, 19 Apr 2017 16:41:27 +0100 Subject: [PATCH] 8178968: AArch64: Remove non-standard code cache size Reviewed-by: roland --- hotspot/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hotspot/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp b/hotspot/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp index 0d78e2da1fe..ad6b12de22d 100644 --- a/hotspot/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp +++ b/hotspot/src/cpu/aarch64/vm/globalDefinitions_aarch64.hpp @@ -34,10 +34,6 @@ const bool CCallingConventionRequiresIntsAsLongs = false; #define SUPPORTS_NATIVE_CX8 -// The maximum B/BL offset range on AArch64 is 128MB. -#undef CODE_CACHE_DEFAULT_LIMIT -#define CODE_CACHE_DEFAULT_LIMIT (128*M) - // According to the ARMv8 ARM, "Concurrent modification and execution // of instructions can lead to the resulting instruction performing // any behavior that can be achieved by executing any sequence of