From 96fa2751e8bbc05d6d064d80c07720cc9db05c54 Mon Sep 17 00:00:00 2001 From: Xiaolin Zheng Date: Wed, 29 Mar 2023 02:53:58 +0000 Subject: [PATCH] 8305112: RISC-V: Typo fix for RVC description Reviewed-by: dholmes --- src/hotspot/cpu/riscv/assembler_riscv.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/hotspot/cpu/riscv/assembler_riscv.hpp b/src/hotspot/cpu/riscv/assembler_riscv.hpp index e39e6737685..4536b23b912 100644 --- a/src/hotspot/cpu/riscv/assembler_riscv.hpp +++ b/src/hotspot/cpu/riscv/assembler_riscv.hpp @@ -1852,13 +1852,13 @@ enum Nf { // versions. An example: // // CompressibleRegion cr(_masm); -// __ add(...); // this instruction will be compressed into 'c.and' when possible +// __ add(...); // this instruction will be compressed into 'c.add' when possible // { // IncompressibleRegion ir(_masm); // __ add(...); // this instruction will not be compressed // { // CompressibleRegion cr(_masm); -// __ add(...); // this instruction will be compressed into 'c.and' when possible +// __ add(...); // this instruction will be compressed into 'c.add' when possible // } // } //