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8345178: RISC-V: Add gtests for narrow cmpxchg

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Reviewed-by: fyang, mli
This commit is contained in:
Robbin Ehn 2024-12-04 07:53:30 +00:00
parent 4c33caa185
commit 9e2b66fb0f
1 changed files with 81 additions and 0 deletions
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81
test/hotspot/gtest/riscv/test_assembler_riscv.cpp
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@ -260,4 +260,85 @@ TEST_VM(RiscV, cmpxchg_int32_plain_maybe_zacas) {
}
}
template <typename TESTSIZE, Assembler::operand_size ASMSIZE>
class NarrowCmpxchgTester {
public:
typedef TESTSIZE (*cmpxchg_func)(intptr_t addr, TESTSIZE expected, TESTSIZE new_value, TESTSIZE result,
int64_t scratch0, int64_t scratch1, int64_t scratch2);
static TESTSIZE narrow_cmpxchg(intptr_t addr, TESTSIZE expected, TESTSIZE new_value, TESTSIZE result, bool boolean_result = false) {
BufferBlob* bb = BufferBlob::create("riscvTest", 128);
CodeBuffer code(bb);
MacroAssembler _masm(&code);
address entry = _masm.pc();
{
_masm.cmpxchg_narrow_value(/*addr*/ c_rarg0, /*expected*/ c_rarg1, /*new_value*/c_rarg2,
ASMSIZE, Assembler::relaxed, Assembler::relaxed,
/*result*/ c_rarg3, boolean_result, c_rarg4, c_rarg5, c_rarg6); /* Uses also t0-t1, caller saved */
_masm.mv(c_rarg0, c_rarg3);
_masm.ret();
}
_masm.flush(); // icache invalidate
TESTSIZE ret = ((cmpxchg_func)entry)(addr, expected, new_value, result, -1, -1, -1);
BufferBlob::free(bb);
return ret;
}
};
template <typename TESTSIZE, Assembler::operand_size ASMSIZE>
void run_narrow_cmpxchg_tests() {
// Assume natural aligned
TESTSIZE data[8];
TESTSIZE ret;
for (int i = 0; i < 7; i++) {
memset(data, -1, sizeof(data));
data[i] = 121;
ret = NarrowCmpxchgTester<TESTSIZE, ASMSIZE>::narrow_cmpxchg((intptr_t)&data[i], 121, 42, /* result */ 67, false);
ASSERT_EQ(ret, 121);
ASSERT_EQ(data[i], 42);
data[i] = 121;
ret = NarrowCmpxchgTester<TESTSIZE, ASMSIZE>::narrow_cmpxchg((intptr_t)&data[i], 120, 42, /* result */ 67, false);
ASSERT_EQ(ret, 121);
ASSERT_EQ(data[i], 121);
data[i] = 121;
ret = NarrowCmpxchgTester<TESTSIZE, ASMSIZE>::narrow_cmpxchg((intptr_t)&data[i], 121, 42, /* result */ 67, true);
ASSERT_EQ(ret, 1);
ASSERT_EQ(data[i], 42);
data[i] = 121;
ret = NarrowCmpxchgTester<TESTSIZE, ASMSIZE>::narrow_cmpxchg((intptr_t)&data[i], 120, 42, /* result */ 67, true);
ASSERT_EQ(ret, 0);
ASSERT_EQ(data[i], 121);
}
}
TEST_VM(RiscV, cmpxchg_int16_lr_sc) {
bool zacas = UseZacas;
UseZacas = false;
run_narrow_cmpxchg_tests<int16_t, Assembler::int16>();
UseZacas = zacas;
}
TEST_VM(RiscV, cmpxchg_int8_lr_sc) {
bool zacas = UseZacas;
UseZacas = false;
run_narrow_cmpxchg_tests<int8_t, Assembler::int8>();
UseZacas = zacas;
}
TEST_VM(RiscV, cmpxchg_int16_maybe_zacas) {
if (UseZacas) {
run_narrow_cmpxchg_tests<int16_t, Assembler::int16>();
}
}
TEST_VM(RiscV, cmpxchg_int8_maybe_zacas) {
if (UseZacas) {
run_narrow_cmpxchg_tests<int8_t, Assembler::int8>();
}
}
#endif // RISCV