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8201185: AARCH64: bfm instruction encoding hits assert on zero register

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Reviewed-by: dsamersoff
This commit is contained in:
Dmitrij Pochepko 2018-04-09 18:40:20 +03:00
parent 389d720746
commit bf8a34b7a9
1 changed files with 1 additions and 1 deletions
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2
src/hotspot/cpu/aarch64/assembler_aarch64.hpp
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@ -819,7 +819,7 @@ public:
void NAME(Register Rd, Register Rn, unsigned immr, unsigned imms) { \
starti; \
f(opcode, 31, 22), f(immr, 21, 16), f(imms, 15, 10); \
rf(Rn, 5), rf(Rd, 0); \
zrf(Rn, 5), rf(Rd, 0); \
}
INSN(sbfmw, 0b0001001100);