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8381650: Vector rotate operations on AArch64 with NEON
Reviewed-by: aph, haosun
This commit is contained in:
Ashay Rane
Andrew Haley
parent
ca405d0eb2
commit
c8bb46be72
@ -311,6 +311,12 @@ source %{
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return false;
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}
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break;
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case Op_RotateLeftV:
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case Op_RotateRightV:
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if (length_in_bytes > 16) {
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return false; // NEON only, since SLI/USHR are not available in SVE
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}
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break;
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default:
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break;
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}
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@ -370,6 +376,11 @@ source %{
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case Op_SqrtVHF:
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case Op_FmaVHF:
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return false;
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// There's no SLI instruction in SVE, so we can't have an optimal vector
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// rotate with masking when emitting code for SVE.
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case Op_RotateLeftV:
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case Op_RotateRightV:
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return false;
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default:
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break;
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}
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@ -3229,6 +3240,25 @@ instruct vlsra_imm(vReg dst, vReg src, immI_positive shift) %{
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ins_pipe(pipe_slow);
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%}
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// vector rotate with constant shift count (NEON only)
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// Uses USHR+SLI 2-instruction sequence instead of SHL+USHR+ORR 3-instruction decomposition.
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instruct vrotateconstant(vReg dst, vReg src, immI shift) %{
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predicate(Matcher::vector_length_in_bytes(n) <= 16);
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match(Set dst (RotateLeftV src shift));
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match(Set dst (RotateRightV src shift));
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effect(TEMP_DEF dst);
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format %{ "vrotateconstant $dst, $src, $shift" %}
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ins_encode %{
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int opc = this->ideal_Opcode();
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int raw_shift = checked_cast<int>(opc == Op_RotateLeftV ?
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$shift$$constant : -$shift$$constant);
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__ neon_vector_rotate($dst$$FloatRegister, get_arrangement(this),
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$src$$FloatRegister, raw_shift);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector shift - predicated
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instruct vlsl_masked(vReg dst_src1, vReg src2, pRegGov pg) %{
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@ -301,6 +301,12 @@ source %{
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return false;
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}
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break;
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case Op_RotateLeftV:
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case Op_RotateRightV:
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if (length_in_bytes > 16) {
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return false; // NEON only, since SLI/USHR are not available in SVE
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}
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break;
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default:
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break;
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}
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@ -360,6 +366,11 @@ source %{
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case Op_SqrtVHF:
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case Op_FmaVHF:
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return false;
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// There's no SLI instruction in SVE, so we can't have an optimal vector
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// rotate with masking when emitting code for SVE.
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case Op_RotateLeftV:
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case Op_RotateRightV:
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return false;
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default:
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break;
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}
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@ -1965,6 +1976,25 @@ instruct vlsra_imm(vReg dst, vReg src, immI_positive shift) %{
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ins_pipe(pipe_slow);
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%}
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// vector rotate with constant shift count (NEON only)
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// Uses USHR+SLI 2-instruction sequence instead of SHL+USHR+ORR 3-instruction decomposition.
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instruct vrotateconstant(vReg dst, vReg src, immI shift) %{
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predicate(Matcher::vector_length_in_bytes(n) <= 16);
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match(Set dst (RotateLeftV src shift));
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match(Set dst (RotateRightV src shift));
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effect(TEMP_DEF dst);
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format %{ "vrotateconstant $dst, $src, $shift" %}
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ins_encode %{
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int opc = this->ideal_Opcode();
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int raw_shift = checked_cast<int>(opc == Op_RotateLeftV ?
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$shift$$constant : -$shift$$constant);
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__ neon_vector_rotate($dst$$FloatRegister, get_arrangement(this),
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$src$$FloatRegister, raw_shift);
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%}
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ins_pipe(pipe_slow);
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%}
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dnl
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dnl VSHIFT_PREDICATE($1, $2, $3 )
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dnl VSHIFT_PREDICATE(type, op_name, insn)
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@ -7274,3 +7274,20 @@ void MacroAssembler::fast_unlock(Register obj, Register t1, Register t2, Registe
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bind(unlocked);
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}
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// Rotate using USHR and SLI instructions (or copy, if rotate count is zero)
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void MacroAssembler::neon_vector_rotate(FloatRegister dst, SIMD_Arrangement T,
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FloatRegister src, int shift_amount) {
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assert(src != dst, "did not expect src and dst to be the same register");
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int esize = BitsPerByte << (T / 2);
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int lshift = shift_amount & (esize - 1);
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if (lshift == 0) {
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// T & 1 == 0 => 64-bit arrangements, else 128-bit arrangements
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orr(dst, (T & 1) == 0 ? T8B : T16B, src, src);
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} else {
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ushr(dst, T, src, esize - lshift);
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sli(dst, T, src, lshift);
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}
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}
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@ -1627,6 +1627,10 @@ public:
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const FloatRegister (&stateVectors)[16], int idx1, int idx2,
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int idx3, int idx4);
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// Rotate using ORR (for identity) or USHR + SLI.
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void neon_vector_rotate(FloatRegister dst, SIMD_Arrangement T,
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FloatRegister src, int shift_amount);
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// Place an ISB after code may have been modified due to a safepoint.
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void safepoint_isb();
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@ -141,8 +141,10 @@
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}
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// Does the CPU supports vector constant rotate instructions?
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// NEON supports constant rotates via USHR+SLI (2-instruction sequence).
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// The shift value will be masked to the element width in the .ad rule.
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static constexpr bool supports_vector_constant_rotates(int shift) {
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return false;
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return true;
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}
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// Does the CPU supports vector unsigned comparison instructions?
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@ -0,0 +1,450 @@
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/*
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* Copyright (c) 2026, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package compiler.vectorapi;
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import compiler.lib.ir_framework.*;
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import java.util.Random;
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import jdk.incubator.vector.IntVector;
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import jdk.incubator.vector.ByteVector;
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import jdk.incubator.vector.LongVector;
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import jdk.incubator.vector.ShortVector;
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import jdk.incubator.vector.VectorOperators;
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import jdk.incubator.vector.VectorSpecies;
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import jdk.test.lib.Asserts;
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/*
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* @test
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* @summary Test that constant-count vector rotates on AArch64 NEON emit
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* RotateLeftV / RotateRightV IR nodes instead of decomposing them.
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* @requires vm.compiler2.enabled
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* @requires os.arch == "aarch64" & vm.cpu.features ~= ".*simd.*"
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* @modules jdk.incubator.vector
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* @library /test/lib /
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* @run driver compiler.vectorapi.TestVectorRotateConstantAArch64
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*/
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public class TestVectorRotateConstantAArch64 {
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static final VectorSpecies<Long> L_SPECIES_128 = LongVector.SPECIES_128;
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static final VectorSpecies<Integer> I_SPECIES_128 = IntVector.SPECIES_128;
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static final VectorSpecies<Short> S_SPECIES_128 = ShortVector.SPECIES_128;
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static final VectorSpecies<Byte> B_SPECIES_128 = ByteVector.SPECIES_128;
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static final int SIZE = 256;
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static final int INT_INCR = I_SPECIES_128.length();
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static final int BYTE_INCR = B_SPECIES_128.length();
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static final int LONG_INCR = L_SPECIES_128.length();
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static final int SHORT_INCR = S_SPECIES_128.length();
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static final int INT_BOUND = I_SPECIES_128.loopBound(SIZE);
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static final int BYTE_BOUND = B_SPECIES_128.loopBound(SIZE);
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static final int LONG_BOUND = L_SPECIES_128.loopBound(SIZE);
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static final int SHORT_BOUND = S_SPECIES_128.loopBound(SIZE);
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static int[] iinp = new int[SIZE];
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static int[] iout = new int[SIZE];
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static byte[] binp = new byte[SIZE];
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static byte[] bout = new byte[SIZE];
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static long[] linp = new long[SIZE];
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static long[] lout = new long[SIZE];
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static short[] sinp = new short[SIZE];
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static short[] sout = new short[SIZE];
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static {
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Random r = new Random(42);
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for (int i = 0; i < SIZE; i++) {
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iinp[i] = r.nextInt();
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linp[i] = r.nextLong();
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binp[i] = (byte) r.nextInt();
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sinp[i] = (short) r.nextInt();
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}
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}
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public static void main(String[] args) {
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TestFramework.runWithFlags("--add-modules=jdk.incubator.vector");
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftInt_shift0() {
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for (int i = 0; i < INT_BOUND; i += INT_INCR) {
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IntVector.fromArray(I_SPECIES_128, iinp, i)
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.lanewise(VectorOperators.ROL, 0)
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.intoArray(iout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftInt_shift31() {
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for (int i = 0; i < INT_BOUND; i += INT_INCR) {
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IntVector.fromArray(I_SPECIES_128, iinp, i)
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.lanewise(VectorOperators.ROL, 31)
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.intoArray(iout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftInt_shift37() {
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for (int i = 0; i < INT_BOUND; i += INT_INCR) {
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IntVector.fromArray(I_SPECIES_128, iinp, i)
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.lanewise(VectorOperators.ROL, 37)
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.intoArray(iout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_RIGHT_V, "> 0"})
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public static void testRotateRightInt_shift13() {
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for (int i = 0; i < INT_BOUND; i += INT_INCR) {
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IntVector.fromArray(I_SPECIES_128, iinp, i)
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.lanewise(VectorOperators.ROR, 13)
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.intoArray(iout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_RIGHT_V, "> 0"})
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public static void testRotateRightInt_shift31() {
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for (int i = 0; i < INT_BOUND; i += INT_INCR) {
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IntVector.fromArray(I_SPECIES_128, iinp, i)
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.lanewise(VectorOperators.ROR, 31)
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.intoArray(iout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftLong_shift0() {
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for (int i = 0; i < LONG_BOUND; i += LONG_INCR) {
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LongVector.fromArray(L_SPECIES_128, linp, i)
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.lanewise(VectorOperators.ROL, 0)
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.intoArray(lout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftLong_shift63() {
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for (int i = 0; i < LONG_BOUND; i += LONG_INCR) {
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LongVector.fromArray(L_SPECIES_128, linp, i)
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.lanewise(VectorOperators.ROL, 63)
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.intoArray(lout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftLong_shift67() {
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for (int i = 0; i < LONG_BOUND; i += LONG_INCR) {
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LongVector.fromArray(L_SPECIES_128, linp, i)
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.lanewise(VectorOperators.ROL, 67)
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.intoArray(lout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_RIGHT_V, "> 0"})
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public static void testRotateRightLong_shift13() {
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for (int i = 0; i < LONG_BOUND; i += LONG_INCR) {
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LongVector.fromArray(L_SPECIES_128, linp, i)
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.lanewise(VectorOperators.ROR, 13)
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.intoArray(lout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_RIGHT_V, "> 0"})
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public static void testRotateRightLong_shift63() {
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for (int i = 0; i < LONG_BOUND; i += LONG_INCR) {
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LongVector.fromArray(L_SPECIES_128, linp, i)
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.lanewise(VectorOperators.ROR, 63)
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.intoArray(lout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftShort_shift0() {
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for (int i = 0; i < SHORT_BOUND; i += SHORT_INCR) {
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ShortVector.fromArray(S_SPECIES_128, sinp, i)
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.lanewise(VectorOperators.ROL, 0)
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.intoArray(sout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftShort_shift7() {
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for (int i = 0; i < SHORT_BOUND; i += SHORT_INCR) {
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ShortVector.fromArray(S_SPECIES_128, sinp, i)
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.lanewise(VectorOperators.ROL, 7)
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.intoArray(sout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftShort_shift15() {
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for (int i = 0; i < SHORT_BOUND; i += SHORT_INCR) {
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ShortVector.fromArray(S_SPECIES_128, sinp, i)
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.lanewise(VectorOperators.ROL, 15)
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.intoArray(sout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftShort_shift16() {
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for (int i = 0; i < SHORT_BOUND; i += SHORT_INCR) {
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ShortVector.fromArray(S_SPECIES_128, sinp, i)
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.lanewise(VectorOperators.ROL, 16)
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.intoArray(sout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftShort_shift19() {
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for (int i = 0; i < SHORT_BOUND; i += SHORT_INCR) {
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ShortVector.fromArray(S_SPECIES_128, sinp, i)
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.lanewise(VectorOperators.ROL, 19)
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.intoArray(sout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_RIGHT_V, "> 0"})
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public static void testRotateRightShort_shift5() {
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for (int i = 0; i < SHORT_BOUND; i += SHORT_INCR) {
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ShortVector.fromArray(S_SPECIES_128, sinp, i)
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.lanewise(VectorOperators.ROR, 5)
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.intoArray(sout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftByte_shift0() {
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for (int i = 0; i < BYTE_BOUND; i += BYTE_INCR) {
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ByteVector.fromArray(B_SPECIES_128, binp, i)
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.lanewise(VectorOperators.ROL, 0)
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.intoArray(bout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftByte_shift4() {
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for (int i = 0; i < BYTE_BOUND; i += BYTE_INCR) {
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ByteVector.fromArray(B_SPECIES_128, binp, i)
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.lanewise(VectorOperators.ROL, 4)
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.intoArray(bout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftByte_shift7() {
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for (int i = 0; i < BYTE_BOUND; i += BYTE_INCR) {
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ByteVector.fromArray(B_SPECIES_128, binp, i)
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.lanewise(VectorOperators.ROL, 7)
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.intoArray(bout, i);
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}
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}
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@Test
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@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
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public static void testRotateLeftByte_shift8() {
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for (int i = 0; i < BYTE_BOUND; i += BYTE_INCR) {
|
||||
ByteVector.fromArray(B_SPECIES_128, binp, i)
|
||||
.lanewise(VectorOperators.ROL, 8)
|
||||
.intoArray(bout, i);
|
||||
}
|
||||
}
|
||||
|
||||
@Test
|
||||
@IR(counts = {IRNode.ROTATE_LEFT_V, "> 0"})
|
||||
public static void testRotateLeftByte_shift11() {
|
||||
for (int i = 0; i < BYTE_BOUND; i += BYTE_INCR) {
|
||||
ByteVector.fromArray(B_SPECIES_128, binp, i)
|
||||
.lanewise(VectorOperators.ROL, 11)
|
||||
.intoArray(bout, i);
|
||||
}
|
||||
}
|
||||
|
||||
@Test
|
||||
@IR(counts = {IRNode.ROTATE_RIGHT_V, "> 0"})
|
||||
public static void testRotateRightByte_shift3() {
|
||||
for (int i = 0; i < BYTE_BOUND; i += BYTE_INCR) {
|
||||
ByteVector.fromArray(B_SPECIES_128, binp, i)
|
||||
.lanewise(VectorOperators.ROR, 3)
|
||||
.intoArray(bout, i);
|
||||
}
|
||||
}
|
||||
|
||||
@Run(test = {
|
||||
// Int tests
|
||||
"testRotateLeftInt_shift0", "testRotateLeftInt_shift31",
|
||||
"testRotateLeftInt_shift37", "testRotateRightInt_shift13",
|
||||
"testRotateRightInt_shift31",
|
||||
|
||||
// Long tests
|
||||
"testRotateLeftLong_shift0", "testRotateLeftLong_shift63",
|
||||
"testRotateLeftLong_shift67", "testRotateRightLong_shift13",
|
||||
"testRotateRightLong_shift63",
|
||||
|
||||
// Short tests
|
||||
"testRotateLeftShort_shift0", "testRotateLeftShort_shift7",
|
||||
"testRotateLeftShort_shift15", "testRotateLeftShort_shift16",
|
||||
"testRotateLeftShort_shift19", "testRotateRightShort_shift5",
|
||||
|
||||
// Byte tests
|
||||
"testRotateLeftByte_shift0", "testRotateLeftByte_shift4",
|
||||
"testRotateLeftByte_shift7", "testRotateLeftByte_shift8",
|
||||
"testRotateLeftByte_shift11", "testRotateRightByte_shift3",
|
||||
})
|
||||
public void verifyAllRotates() {
|
||||
testRotateLeftInt_shift0();
|
||||
verifyInt(iout, iinp, 0, true);
|
||||
|
||||
testRotateLeftInt_shift31();
|
||||
verifyInt(iout, iinp, 31, true);
|
||||
|
||||
testRotateLeftInt_shift37();
|
||||
verifyInt(iout, iinp, 37, true);
|
||||
|
||||
testRotateRightInt_shift13();
|
||||
verifyInt(iout, iinp, 13, false);
|
||||
|
||||
testRotateRightInt_shift31();
|
||||
verifyInt(iout, iinp, 31, false);
|
||||
|
||||
testRotateLeftLong_shift0();
|
||||
verifyLong(lout, linp, 0, true);
|
||||
|
||||
testRotateLeftLong_shift63();
|
||||
verifyLong(lout, linp, 63, true);
|
||||
|
||||
testRotateLeftLong_shift67();
|
||||
verifyLong(lout, linp, 67, true);
|
||||
|
||||
testRotateRightLong_shift13();
|
||||
verifyLong(lout, linp, 13, false);
|
||||
|
||||
testRotateRightLong_shift63();
|
||||
verifyLong(lout, linp, 63, false);
|
||||
|
||||
testRotateLeftShort_shift0();
|
||||
verifyShort(sout, sinp, 0, true);
|
||||
|
||||
testRotateLeftShort_shift7();
|
||||
verifyShort(sout, sinp, 7, true);
|
||||
|
||||
testRotateLeftShort_shift15();
|
||||
verifyShort(sout, sinp, 15, true);
|
||||
|
||||
testRotateLeftShort_shift16();
|
||||
verifyShort(sout, sinp, 16, true);
|
||||
|
||||
testRotateLeftShort_shift19();
|
||||
verifyShort(sout, sinp, 19, true);
|
||||
|
||||
testRotateRightShort_shift5();
|
||||
verifyShort(sout, sinp, 5, false);
|
||||
|
||||
testRotateLeftByte_shift0();
|
||||
verifyByte(bout, binp, 0, true);
|
||||
|
||||
testRotateLeftByte_shift4();
|
||||
verifyByte(bout, binp, 4, true);
|
||||
|
||||
testRotateLeftByte_shift7();
|
||||
verifyByte(bout, binp, 7, true);
|
||||
|
||||
testRotateLeftByte_shift8();
|
||||
verifyByte(bout, binp, 8, true);
|
||||
|
||||
testRotateLeftByte_shift11();
|
||||
verifyByte(bout, binp, 11, true);
|
||||
|
||||
testRotateRightByte_shift3();
|
||||
verifyByte(bout, binp, 3, false);
|
||||
}
|
||||
|
||||
static void verifyInt(int[] dst, int[] src, int shift, boolean left) {
|
||||
int bound = I_SPECIES_128.loopBound(src.length);
|
||||
for (int i = 0; i < bound; i++) {
|
||||
int expected = left ? Integer.rotateLeft(src[i], shift)
|
||||
: Integer.rotateRight(src[i], shift);
|
||||
Asserts.assertEquals(dst[i], expected,
|
||||
"int rotate" + (left ? "Left" : "Right") + " failed at index " + i +
|
||||
": src=" + Integer.toHexString(src[i]) + " shift=" + shift);
|
||||
}
|
||||
}
|
||||
|
||||
static void verifyLong(long[] dst, long[] src, int shift, boolean left) {
|
||||
int bound = L_SPECIES_128.loopBound(src.length);
|
||||
for (int i = 0; i < bound; i++) {
|
||||
long expected = left ? Long.rotateLeft(src[i], shift)
|
||||
: Long.rotateRight(src[i], shift);
|
||||
Asserts.assertEquals(dst[i], expected,
|
||||
"long rotate" + (left ? "Left" : "Right") + " failed at index " + i +
|
||||
": src=" + Long.toHexString(src[i]) + " shift=" + shift);
|
||||
}
|
||||
}
|
||||
|
||||
static short rotateShort(short val, int shift, boolean left) {
|
||||
int n = left ? (shift & 15) : ((-shift) & 15);
|
||||
int unsigned = val & 0xFFFF;
|
||||
return (short) ((unsigned << n) | (unsigned >>> (16 - n)));
|
||||
}
|
||||
|
||||
static void verifyShort(short[] dst, short[] src, int shift, boolean left) {
|
||||
int bound = S_SPECIES_128.loopBound(src.length);
|
||||
for (int i = 0; i < bound; i++) {
|
||||
short expected = rotateShort(src[i], shift, left);
|
||||
Asserts.assertEquals(dst[i], expected,
|
||||
"short rotate" + (left ? "Left" : "Right") + " failed at index " + i +
|
||||
": src=" + Integer.toHexString(src[i] & 0xFFFF) + " shift=" + shift);
|
||||
}
|
||||
}
|
||||
|
||||
static byte rotateByte(byte val, int shift, boolean left) {
|
||||
int n = left ? (shift & 7) : ((-shift) & 7);
|
||||
int unsigned = val & 0xFF;
|
||||
return (byte) ((unsigned << n) | (unsigned >>> (8 - n)));
|
||||
}
|
||||
|
||||
static void verifyByte(byte[] dst, byte[] src, int shift, boolean left) {
|
||||
int bound = B_SPECIES_128.loopBound(src.length);
|
||||
for (int i = 0; i < bound; i++) {
|
||||
byte expected = rotateByte(src[i], shift, left);
|
||||
Asserts.assertEquals(dst[i], expected,
|
||||
"byte rotate" + (left ? "Left" : "Right") + " failed at index " + i +
|
||||
": src=" + Integer.toHexString(src[i] & 0xFF) + " shift=" + shift);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -80,6 +80,9 @@ public class ArrayShiftOpTest extends VectorizationTestRunner {
|
||||
counts = {IRNode.STORE_VECTOR, ">0"})
|
||||
@IR(applyIfCPUFeatureOr = {"avx512f", "true", "zvbb", "true"},
|
||||
counts = {IRNode.ROTATE_RIGHT_V, ">0"})
|
||||
@IR(applyIfCPUFeature = {"asimd", "true"},
|
||||
applyIf = {"MaxVectorSize", "<= 16"},
|
||||
counts = {IRNode.ROTATE_RIGHT_V, ">0"})
|
||||
public int[] intCombinedRotateShift() {
|
||||
int[] res = new int[SIZE];
|
||||
for (int i = 0; i < SIZE; i++) {
|
||||
@ -109,6 +112,9 @@ public class ArrayShiftOpTest extends VectorizationTestRunner {
|
||||
counts = {IRNode.STORE_VECTOR, ">0"})
|
||||
@IR(applyIfCPUFeatureOr = {"avx512f", "true", "zvbb", "true"},
|
||||
counts = {IRNode.ROTATE_RIGHT_V, ">0"})
|
||||
@IR(applyIfCPUFeature = {"asimd", "true"},
|
||||
applyIf = {"MaxVectorSize", "<= 16"},
|
||||
counts = {IRNode.ROTATE_RIGHT_V, ">0"})
|
||||
public long[] longCombinedRotateShift() {
|
||||
long[] res = new long[SIZE];
|
||||
for (int i = 0; i < SIZE; i++) {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user