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8371205: AArch64: Remove unused cmpxchg* methods

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Co-authored-by: Samuel Chee <samche01@arm.com>
Reviewed-by: aph, kbarrett, haosun
This commit is contained in:
Samuel Chee 2025-11-05 13:56:26 +00:00 committed by Fei Gao
parent f6f87bb675
commit c9a98169cb
2 changed files with 0 additions and 101 deletions
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91
src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
View File

@ -3315,97 +3315,6 @@ void MacroAssembler::reinit_heapbase()
}
}
// this simulates the behaviour of the x86 cmpxchg instruction using a
// load linked/store conditional pair. we use the acquire/release
// versions of these instructions so that we flush pending writes as
// per Java semantics.
// n.b the x86 version assumes the old value to be compared against is
// in rax and updates rax with the value located in memory if the
// cmpxchg fails. we supply a register for the old value explicitly
// the aarch64 load linked/store conditional instructions do not
// accept an offset. so, unlike x86, we must provide a plain register
// to identify the memory word to be compared/exchanged rather than a
// register+offset Address.
void MacroAssembler::cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp,
Label &succeed, Label *fail) {
// oldv holds comparison value
// newv holds value to write in exchange
// addr identifies memory word to compare against/update
if (UseLSE) {
mov(tmp, oldv);
casal(Assembler::xword, oldv, newv, addr);
cmp(tmp, oldv);
br(Assembler::EQ, succeed);
membar(AnyAny);
} else {
Label retry_load, nope;
prfm(Address(addr), PSTL1STRM);
bind(retry_load);
// flush and load exclusive from the memory location
// and fail if it is not what we expect
ldaxr(tmp, addr);
cmp(tmp, oldv);
br(Assembler::NE, nope);
// if we store+flush with no intervening write tmp will be zero
stlxr(tmp, newv, addr);
cbzw(tmp, succeed);
// retry so we only ever return after a load fails to compare
// ensures we don't return a stale value after a failed write.
b(retry_load);
// if the memory word differs we return it in oldv and signal a fail
bind(nope);
membar(AnyAny);
mov(oldv, tmp);
}
if (fail)
b(*fail);
}
void MacroAssembler::cmpxchg_obj_header(Register oldv, Register newv, Register obj, Register tmp,
Label &succeed, Label *fail) {
assert(oopDesc::mark_offset_in_bytes() == 0, "assumption");
cmpxchgptr(oldv, newv, obj, tmp, succeed, fail);
}
void MacroAssembler::cmpxchgw(Register oldv, Register newv, Register addr, Register tmp,
Label &succeed, Label *fail) {
// oldv holds comparison value
// newv holds value to write in exchange
// addr identifies memory word to compare against/update
// tmp returns 0/1 for success/failure
if (UseLSE) {
mov(tmp, oldv);
casal(Assembler::word, oldv, newv, addr);
cmp(tmp, oldv);
br(Assembler::EQ, succeed);
membar(AnyAny);
} else {
Label retry_load, nope;
prfm(Address(addr), PSTL1STRM);
bind(retry_load);
// flush and load exclusive from the memory location
// and fail if it is not what we expect
ldaxrw(tmp, addr);
cmp(tmp, oldv);
br(Assembler::NE, nope);
// if we store+flush with no intervening write tmp will be zero
stlxrw(tmp, newv, addr);
cbzw(tmp, succeed);
// retry so we only ever return after a load fails to compare
// ensures we don't return a stale value after a failed write.
b(retry_load);
// if the memory word differs we return it in oldv and signal a fail
bind(nope);
membar(AnyAny);
mov(oldv, tmp);
}
if (fail)
b(*fail);
}
// A generic CAS; success or failure is in the EQ flag. A weak CAS
// doesn't retry and may fail spuriously. If the oldval is wanted,
// Pass a register for the result, otherwise pass noreg.

10
src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp
View File

@ -1200,16 +1200,6 @@ public:
void cmpoop(Register obj1, Register obj2);
// Various forms of CAS
void cmpxchg_obj_header(Register oldv, Register newv, Register obj, Register tmp,
Label &succeed, Label *fail);
void cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp,
Label &succeed, Label *fail);
void cmpxchgw(Register oldv, Register newv, Register addr, Register tmp,
Label &succeed, Label *fail);
void atomic_add(Register prev, RegisterOrConstant incr, Register addr);
void atomic_addw(Register prev, RegisterOrConstant incr, Register addr);
void atomic_addal(Register prev, RegisterOrConstant incr, Register addr);