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8292587: AArch64: Support SVE fabd instruction
Reviewed-by: njian, fgao, ngasson
This commit is contained in:
Hao Sun
Ningsheng Jian
parent
68645ebffb
commit
cbee0bc9ef
@ -1655,11 +1655,12 @@ instruct vabsD_masked(vReg dst_src, pRegGov pg) %{
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// vector fabs diff
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instruct vfabd(vReg dst, vReg src1, vReg src2) %{
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predicate(Matcher::vector_length_in_bytes(n) <= 16);
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instruct vfabd_neon(vReg dst, vReg src1, vReg src2) %{
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predicate(VM_Version::use_neon_for_vector(Matcher::vector_length_in_bytes(n)) &&
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!n->as_Vector()->is_predicated_vector());
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match(Set dst (AbsVF (SubVF src1 src2)));
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match(Set dst (AbsVD (SubVD src1 src2)));
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format %{ "vfabd $dst, $src1, $src2\t# vector <= 128 bits" %}
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format %{ "vfabd_neon $dst, $src1, $src2" %}
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ins_encode %{
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__ fabd($dst$$FloatRegister, get_arrangement(this),
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$src1$$FloatRegister, $src2$$FloatRegister);
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@ -1667,6 +1668,36 @@ instruct vfabd(vReg dst, vReg src1, vReg src2) %{
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ins_pipe(pipe_slow);
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%}
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instruct vfabd_sve(vReg dst_src1, vReg src2) %{
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predicate(!VM_Version::use_neon_for_vector(Matcher::vector_length_in_bytes(n)) &&
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!n->as_Vector()->is_predicated_vector());
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match(Set dst_src1 (AbsVF (SubVF dst_src1 src2)));
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match(Set dst_src1 (AbsVD (SubVD dst_src1 src2)));
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format %{ "vfabd_sve $dst_src1, $dst_src1, $src2" %}
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ins_encode %{
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assert(UseSVE > 0, "must be sve");
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ sve_fabd($dst_src1$$FloatRegister, __ elemType_to_regVariant(bt),
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ptrue, $src2$$FloatRegister);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector fabs diff - predicated
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instruct vfabd_masked(vReg dst_src1, vReg src2, pRegGov pg) %{
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predicate(UseSVE > 0);
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match(Set dst_src1 (AbsVF (SubVF (Binary dst_src1 src2) pg) pg));
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match(Set dst_src1 (AbsVD (SubVD (Binary dst_src1 src2) pg) pg));
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format %{ "vfabd_masked $dst_src1, $pg, $dst_src1, $src2" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ sve_fabd($dst_src1$$FloatRegister, __ elemType_to_regVariant(bt),
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$pg$$PRegister, $src2$$FloatRegister);
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%}
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ins_pipe(pipe_slow);
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%}
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// ------------------------------ Vector neg -----------------------------------
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// vector neg
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@ -871,11 +871,12 @@ UNARY_OP_PREDICATE_WITH_SIZE(vabsD, AbsVD, sve_fabs, D)
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// vector fabs diff
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instruct vfabd(vReg dst, vReg src1, vReg src2) %{
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predicate(Matcher::vector_length_in_bytes(n) <= 16);
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instruct vfabd_neon(vReg dst, vReg src1, vReg src2) %{
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predicate(VM_Version::use_neon_for_vector(Matcher::vector_length_in_bytes(n)) &&
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!n->as_Vector()->is_predicated_vector());
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match(Set dst (AbsVF (SubVF src1 src2)));
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match(Set dst (AbsVD (SubVD src1 src2)));
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format %{ "vfabd $dst, $src1, $src2\t# vector <= 128 bits" %}
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format %{ "vfabd_neon $dst, $src1, $src2" %}
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ins_encode %{
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__ fabd($dst$$FloatRegister, get_arrangement(this),
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$src1$$FloatRegister, $src2$$FloatRegister);
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@ -883,6 +884,36 @@ instruct vfabd(vReg dst, vReg src1, vReg src2) %{
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ins_pipe(pipe_slow);
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%}
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instruct vfabd_sve(vReg dst_src1, vReg src2) %{
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predicate(!VM_Version::use_neon_for_vector(Matcher::vector_length_in_bytes(n)) &&
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!n->as_Vector()->is_predicated_vector());
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match(Set dst_src1 (AbsVF (SubVF dst_src1 src2)));
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match(Set dst_src1 (AbsVD (SubVD dst_src1 src2)));
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format %{ "vfabd_sve $dst_src1, $dst_src1, $src2" %}
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ins_encode %{
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assert(UseSVE > 0, "must be sve");
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ sve_fabd($dst_src1$$FloatRegister, __ elemType_to_regVariant(bt),
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ptrue, $src2$$FloatRegister);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector fabs diff - predicated
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instruct vfabd_masked(vReg dst_src1, vReg src2, pRegGov pg) %{
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predicate(UseSVE > 0);
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match(Set dst_src1 (AbsVF (SubVF (Binary dst_src1 src2) pg) pg));
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match(Set dst_src1 (AbsVD (SubVD (Binary dst_src1 src2) pg) pg));
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format %{ "vfabd_masked $dst_src1, $pg, $dst_src1, $src2" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ sve_fabd($dst_src1$$FloatRegister, __ elemType_to_regVariant(bt),
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$pg$$PRegister, $src2$$FloatRegister);
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%}
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ins_pipe(pipe_slow);
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%}
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// ------------------------------ Vector neg -----------------------------------
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// vector neg
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@ -3142,6 +3142,7 @@ public:
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sve_predicate_reg_insn(op1, op2, Zd_or_Zdn_or_Vd, T, Pg, Zn_or_Zm); \
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}
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INSN(sve_fabd, 0b01100101, 0b001000100); // floating-point absolute difference
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INSN(sve_fabs, 0b00000100, 0b011100101);
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INSN(sve_fadd, 0b01100101, 0b000000100);
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INSN(sve_fadda, 0b01100101, 0b011000001); // add strictly-ordered reduction to scalar Vd
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@ -1918,6 +1918,7 @@ generate(SVEVectorOp, [["add", "ZZZ"],
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["bic", "ZZZ"],
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["uzp1", "ZZZ"],
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["uzp2", "ZZZ"],
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["fabd", "ZPZ", "m", "dn"],
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# SVE2 instructions
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["bext", "ZZZ"],
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["bdep", "ZZZ"],
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@ -1207,19 +1207,20 @@
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__ sve_bic(z1, z10, z19); // bic z1.d, z10.d, z19.d
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__ sve_uzp1(z19, __ H, z23, z23); // uzp1 z19.h, z23.h, z23.h
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__ sve_uzp2(z30, __ S, z17, z19); // uzp2 z30.s, z17.s, z19.s
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__ sve_bext(z20, __ H, z4, z20); // bext z20.h, z4.h, z20.h
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__ sve_bdep(z30, __ D, z22, z30); // bdep z30.d, z22.d, z30.d
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__ sve_fabd(z20, __ S, p1, z20); // fabd z20.s, p1/m, z20.s, z20.s
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__ sve_bext(z30, __ D, z22, z30); // bext z30.d, z22.d, z30.d
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__ sve_bdep(z25, __ H, z17, z17); // bdep z25.h, z17.h, z17.h
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// SVEReductionOp
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__ sve_andv(v25, __ H, p4, z17); // andv h25, p4, z17.h
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__ sve_orv(v11, __ S, p3, z28); // orv s11, p3, z28.s
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__ sve_eorv(v5, __ H, p0, z13); // eorv h5, p0, z13.h
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__ sve_smaxv(v2, __ H, p1, z10); // smaxv h2, p1, z10.h
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__ sve_sminv(v19, __ H, p1, z25); // sminv h19, p1, z25.h
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__ sve_fminv(v2, __ S, p0, z29); // fminv s2, p0, z29.s
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__ sve_fmaxv(v20, __ D, p1, z20); // fmaxv d20, p1, z20.d
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__ sve_fadda(v28, __ S, p3, z13); // fadda s28, p3, s28, z13.s
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__ sve_uaddv(v13, __ H, p7, z1); // uaddv d13, p7, z1.h
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__ sve_andv(v11, __ S, p3, z28); // andv s11, p3, z28.s
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__ sve_orv(v5, __ H, p0, z13); // orv h5, p0, z13.h
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__ sve_eorv(v2, __ H, p1, z10); // eorv h2, p1, z10.h
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__ sve_smaxv(v19, __ H, p1, z25); // smaxv h19, p1, z25.h
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__ sve_sminv(v2, __ B, p0, z29); // sminv b2, p0, z29.b
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__ sve_fminv(v20, __ D, p1, z20); // fminv d20, p1, z20.d
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__ sve_fmaxv(v28, __ S, p3, z13); // fmaxv s28, p3, z13.s
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__ sve_fadda(v13, __ S, p7, z1); // fadda s13, p7, s13, z1.s
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__ sve_uaddv(v27, __ D, p0, z3); // uaddv d27, p0, z3.d
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__ bind(forth);
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@ -1238,30 +1239,30 @@
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0x9101a1a0, 0xb10a5cc8, 0xd10810aa, 0xf10fd061,
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0x120cb166, 0x321764bc, 0x52174681, 0x720c0227,
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0x9241018e, 0xb25a2969, 0xd278b411, 0xf26aad01,
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0x14000000, 0x17ffffd7, 0x140003fe, 0x94000000,
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0x97ffffd4, 0x940003fb, 0x3400000a, 0x34fffa2a,
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0x34007f0a, 0x35000008, 0x35fff9c8, 0x35007ea8,
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0xb400000b, 0xb4fff96b, 0xb4007e4b, 0xb500001d,
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0xb5fff91d, 0xb5007dfd, 0x10000013, 0x10fff8b3,
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0x10007d93, 0x90000013, 0x36300016, 0x3637f836,
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0x36307d16, 0x3758000c, 0x375ff7cc, 0x37587cac,
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0x14000000, 0x17ffffd7, 0x140003ff, 0x94000000,
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0x97ffffd4, 0x940003fc, 0x3400000a, 0x34fffa2a,
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0x34007f2a, 0x35000008, 0x35fff9c8, 0x35007ec8,
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0xb400000b, 0xb4fff96b, 0xb4007e6b, 0xb500001d,
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0xb5fff91d, 0xb5007e1d, 0x10000013, 0x10fff8b3,
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0x10007db3, 0x90000013, 0x36300016, 0x3637f836,
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0x36307d36, 0x3758000c, 0x375ff7cc, 0x37587ccc,
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0x128313a0, 0x528a32c7, 0x7289173b, 0x92ab3acc,
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0xd2a0bf94, 0xf2c285e8, 0x9358722f, 0x330e652f,
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0x53067f3b, 0x93577c53, 0xb34a1aac, 0xd35a4016,
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0x13946c63, 0x93c3dbc8, 0x54000000, 0x54fff5a0,
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0x54007a80, 0x54000001, 0x54fff541, 0x54007a21,
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0x54000002, 0x54fff4e2, 0x540079c2, 0x54000002,
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0x54fff482, 0x54007962, 0x54000003, 0x54fff423,
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0x54007903, 0x54000003, 0x54fff3c3, 0x540078a3,
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0x54000004, 0x54fff364, 0x54007844, 0x54000005,
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0x54fff305, 0x540077e5, 0x54000006, 0x54fff2a6,
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0x54007786, 0x54000007, 0x54fff247, 0x54007727,
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0x54000008, 0x54fff1e8, 0x540076c8, 0x54000009,
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0x54fff189, 0x54007669, 0x5400000a, 0x54fff12a,
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0x5400760a, 0x5400000b, 0x54fff0cb, 0x540075ab,
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0x5400000c, 0x54fff06c, 0x5400754c, 0x5400000d,
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0x54fff00d, 0x540074ed, 0x5400000e, 0x54ffefae,
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0x5400748e, 0x5400000f, 0x54ffef4f, 0x5400742f,
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0x54007aa0, 0x54000001, 0x54fff541, 0x54007a41,
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0x54000002, 0x54fff4e2, 0x540079e2, 0x54000002,
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0x54fff482, 0x54007982, 0x54000003, 0x54fff423,
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0x54007923, 0x54000003, 0x54fff3c3, 0x540078c3,
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0x54000004, 0x54fff364, 0x54007864, 0x54000005,
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0x54fff305, 0x54007805, 0x54000006, 0x54fff2a6,
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0x540077a6, 0x54000007, 0x54fff247, 0x54007747,
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0x54000008, 0x54fff1e8, 0x540076e8, 0x54000009,
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0x54fff189, 0x54007689, 0x5400000a, 0x54fff12a,
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0x5400762a, 0x5400000b, 0x54fff0cb, 0x540075cb,
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0x5400000c, 0x54fff06c, 0x5400756c, 0x5400000d,
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0x54fff00d, 0x5400750d, 0x5400000e, 0x54ffefae,
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0x540074ae, 0x5400000f, 0x54ffef4f, 0x5400744f,
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0xd40658e1, 0xd4014d22, 0xd4046543, 0xd4273f60,
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0xd44cad80, 0xd503201f, 0xd503203f, 0xd503205f,
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0xd503209f, 0xd50320bf, 0xd503219f, 0xd50323bf,
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@ -1491,9 +1492,9 @@
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0x65aabf65, 0x65b4daae, 0x65e5f723, 0x65a1523d,
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0x65e07dae, 0x04965e82, 0x04026d1d, 0x043632ee,
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0x04ba3333, 0x047532ac, 0x04f33141, 0x05776af3,
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0x05b36e3e, 0x4554b094, 0x45deb6de, 0x045a3239,
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0x04982f8b, 0x045921a5, 0x04482542, 0x044a2733,
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0x658723a2, 0x65c62694, 0x65982dbc, 0x04413c2d,
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0x05b36e3e, 0x65888694, 0x45deb2de, 0x4551b639,
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0x049a2f8b, 0x045821a5, 0x04592542, 0x04482733,
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0x040a23a2, 0x65c72694, 0x65862dbc, 0x65983c2d,
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0x04c1207b,
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};
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// END Generated code -- do not edit
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169
test/hotspot/jtreg/compiler/vectorapi/VectorAbsDiffTest.java
Normal file
169
test/hotspot/jtreg/compiler/vectorapi/VectorAbsDiffTest.java
Normal file
@ -0,0 +1,169 @@
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/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
|
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* 2 along with this work; if not, write to the Free Software Foundation,
|
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package compiler.vectorapi;
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import compiler.lib.ir_framework.*;
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import java.util.Random;
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import jdk.incubator.vector.DoubleVector;
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import jdk.incubator.vector.FloatVector;
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import jdk.incubator.vector.VectorMask;
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import jdk.incubator.vector.VectorOperators;
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import jdk.incubator.vector.VectorSpecies;
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import jdk.test.lib.Asserts;
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import jdk.test.lib.Utils;
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/**
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* @test
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* @bug 8292587
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* @key randomness
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* @library /test/lib /
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* @requires os.arch=="aarch64"
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* @summary AArch64: Support SVE fabd instruction
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* @modules jdk.incubator.vector
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*
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* @run driver compiler.vectorapi.VectorAbsDiffTest
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*/
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public class VectorAbsDiffTest {
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private static final VectorSpecies<Double> D_SPECIES = DoubleVector.SPECIES_MAX;
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private static final VectorSpecies<Float> F_SPECIES = FloatVector.SPECIES_MAX;
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private static int LENGTH = 1024;
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private static final Random RD = Utils.getRandomInstance();
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private static float[] fa;
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private static float[] fb;
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private static float[] fr;
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private static double[] da;
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private static double[] db;
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private static double[] dr;
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private static boolean[] m;
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static {
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fa = new float[LENGTH];
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fb = new float[LENGTH];
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fr = new float[LENGTH];
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da = new double[LENGTH];
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db = new double[LENGTH];
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dr = new double[LENGTH];
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m = new boolean[LENGTH];
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for (int i = 0; i < LENGTH; i++) {
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fa[i] = RD.nextFloat((float) 25.0);
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fb[i] = RD.nextFloat((float) 25.0);
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da[i] = RD.nextDouble(25.0);
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db[i] = RD.nextDouble(25.0);
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m[i] = RD.nextBoolean();
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}
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}
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@Test
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@IR(counts = {"vfabd", "> 0"})
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public static void testFloatAbsDiff() {
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for (int i = 0; i < LENGTH; i += F_SPECIES.length()) {
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FloatVector av = FloatVector.fromArray(F_SPECIES, fa, i);
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FloatVector bv = FloatVector.fromArray(F_SPECIES, fb, i);
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av.sub(bv).lanewise(VectorOperators.ABS).intoArray(fr, i);
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}
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}
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@Run(test = "testFloatAbsDiff")
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public static void testFloatAbsDiff_runner() {
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testFloatAbsDiff();
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for (int i = 0; i < LENGTH; i++) {
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Asserts.assertEquals(Math.abs(fa[i] - fb[i]), fr[i]);
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}
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}
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@Test
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@IR(counts = {"vfabd_masked", "> 0"}, applyIf = {"UseSVE", "> 0"})
|
||||
public static void testFloatAbsDiffMasked() {
|
||||
for (int i = 0; i < LENGTH; i += F_SPECIES.length()) {
|
||||
FloatVector av = FloatVector.fromArray(F_SPECIES, fa, i);
|
||||
FloatVector bv = FloatVector.fromArray(F_SPECIES, fb, i);
|
||||
VectorMask<Float> mask = VectorMask.fromArray(F_SPECIES, m, i);
|
||||
av.lanewise(VectorOperators.SUB, bv, mask).lanewise(VectorOperators.ABS, mask).intoArray(fr, i);
|
||||
}
|
||||
}
|
||||
|
||||
@Run(test = "testFloatAbsDiffMasked")
|
||||
public static void testFloatAbsDiffMasked_runner() {
|
||||
testFloatAbsDiffMasked();
|
||||
for (int i = 0; i < LENGTH; i++) {
|
||||
if (m[i]) {
|
||||
Asserts.assertEquals(Math.abs(fa[i] - fb[i]), fr[i]);
|
||||
} else {
|
||||
Asserts.assertEquals(fa[i], fr[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@Test
|
||||
@IR(counts = {"vfabd", "> 0"})
|
||||
public static void testDoubleAbsDiff() {
|
||||
for (int i = 0; i < LENGTH; i += D_SPECIES.length()) {
|
||||
DoubleVector av = DoubleVector.fromArray(D_SPECIES, da, i);
|
||||
DoubleVector bv = DoubleVector.fromArray(D_SPECIES, db, i);
|
||||
av.sub(bv).lanewise(VectorOperators.ABS).intoArray(dr, i);
|
||||
}
|
||||
}
|
||||
|
||||
@Run(test = "testDoubleAbsDiff")
|
||||
public static void testDoubleAbsDiff_runner() {
|
||||
testDoubleAbsDiff();
|
||||
for (int i = 0; i < LENGTH; i++) {
|
||||
Asserts.assertEquals(Math.abs(da[i] - db[i]), dr[i]);
|
||||
}
|
||||
}
|
||||
|
||||
@Test
|
||||
@IR(counts = {"vfabd_masked", "> 0"}, applyIf = {"UseSVE", "> 0"})
|
||||
public static void testDoubleAbsDiffMasked() {
|
||||
for (int i = 0; i < LENGTH; i += D_SPECIES.length()) {
|
||||
DoubleVector av = DoubleVector.fromArray(D_SPECIES, da, i);
|
||||
DoubleVector bv = DoubleVector.fromArray(D_SPECIES, db, i);
|
||||
VectorMask<Double> mask = VectorMask.fromArray(D_SPECIES, m, i);
|
||||
av.lanewise(VectorOperators.SUB, bv, mask).lanewise(VectorOperators.ABS, mask).intoArray(dr, i);
|
||||
}
|
||||
}
|
||||
|
||||
@Run(test = "testDoubleAbsDiffMasked")
|
||||
public static void testDoubleAbsDiffMasked_runner() {
|
||||
testDoubleAbsDiffMasked();
|
||||
for (int i = 0; i < LENGTH; i++) {
|
||||
if (m[i]) {
|
||||
Asserts.assertEquals(Math.abs(da[i] - db[i]), dr[i]);
|
||||
} else {
|
||||
Asserts.assertEquals(da[i], dr[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public static void main(String[] args) {
|
||||
TestFramework.runWithFlags("--add-modules=jdk.incubator.vector");
|
||||
}
|
||||
}
|
||||
@ -68,14 +68,14 @@ public class FloatingScalarVectorAbsDiff {
|
||||
@Benchmark
|
||||
public void testVectorAbsDiffFloat() {
|
||||
for (int i = 0; i < count; i++) {
|
||||
floatsD[i] = Math.abs(floatsA[i] - floatsB[i]);
|
||||
floatsD[i] = Math.abs(Math.abs(floatsA[i] - floatsB[i]) - 3.14f);
|
||||
}
|
||||
}
|
||||
|
||||
@Benchmark
|
||||
public void testVectorAbsDiffDouble() {
|
||||
for (int i = 0; i < count; i++) {
|
||||
doublesD[i] = Math.abs(doublesA[i] - doublesB[i]);
|
||||
doublesD[i] = Math.abs(Math.abs(doublesA[i] - doublesB[i]) - 3.14d);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user