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8295776: [JVMCI] Add x86 CPU flags for MPK and CET

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Reviewed-by: kvn, dnsimon
This commit is contained in:
Matthias Neugschwandtner 2022-10-24 12:09:05 +00:00 committed by Doug Simon
parent 5596d9ad5c
commit d50b6eb342
4 changed files with 37 additions and 3 deletions
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16
src/hotspot/cpu/x86/vm_version_x86.cpp
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@ -2991,6 +2991,22 @@ uint64_t VM_Version::feature_flags() {
}
}
// Protection key features.
if (_cpuid_info.sef_cpuid7_ecx.bits.pku != 0) {
result |= CPU_PKU;
}
if (_cpuid_info.sef_cpuid7_ecx.bits.ospke != 0) {
result |= CPU_OSPKE;
}
// Control flow enforcement (CET) features.
if (_cpuid_info.sef_cpuid7_ecx.bits.cet_ss != 0) {
result |= CPU_CET_SS;
}
if (_cpuid_info.sef_cpuid7_edx.bits.cet_ibt != 0) {
result |= CPU_CET_IBT;
}
// Composite features.
if (supports_tscinv_bit() &&
((is_amd_family() && !is_amd_Barcelona()) ||

16
src/hotspot/cpu/x86/vm_version_x86.hpp
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@ -246,7 +246,7 @@ class VM_Version : public Abstract_VM_Version {
ospke : 1,
: 1,
avx512_vbmi2 : 1,
: 1,
cet_ss : 1,
gfni : 1,
vaes : 1,
avx512_vpclmulqdq : 1,
@ -271,7 +271,9 @@ class VM_Version : public Abstract_VM_Version {
fast_short_rep_mov : 1,
: 9,
serialize : 1,
: 17;
: 5,
cet_ibt : 1,
: 11;
} bits;
};
@ -376,7 +378,11 @@ protected:
decl(FSRM, "fsrm", 50) /* Fast Short REP MOV */ \
decl(GFNI, "gfni", 51) /* Vector GFNI instructions */ \
decl(AVX512_BITALG, "avx512_bitalg", 52) /* Vector sub-word popcount and bit gather instructions */\
decl(F16C, "f16c", 53) /* Half-precision and single precision FP conversion instructions*/
decl(F16C, "f16c", 53) /* Half-precision and single precision FP conversion instructions*/ \
decl(PKU, "pku", 54) /* Protection keys for user-mode pages */ \
decl(OSPKE, "ospke", 55) /* OS enables protection keys */ \
decl(CET_IBT, "cet_ibt", 56) /* Control Flow Enforcement - Indirect Branch Tracking */ \
decl(CET_SS, "cet_ss", 57) /* Control Flow Enforcement - Shadow Stack */
#define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (1ULL << bit),
CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG)
@ -684,6 +690,10 @@ public:
static bool supports_hv() { return (_features & CPU_HV) != 0; }
static bool supports_serialize() { return (_features & CPU_SERIALIZE) != 0; }
static bool supports_f16c() { return (_features & CPU_F16C) != 0; }
static bool supports_pku() { return (_features & CPU_PKU) != 0; }
static bool supports_ospke() { return (_features & CPU_OSPKE) != 0; }
static bool supports_cet_ss() { return (_features & CPU_CET_SS) != 0; }
static bool supports_cet_ibt() { return (_features & CPU_CET_IBT) != 0; }
// Intel features
static bool is_intel_family_core() { return is_intel() &&

4
src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.amd64/src/jdk/vm/ci/amd64/AMD64.java
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@ -227,6 +227,10 @@ public class AMD64 extends Architecture {
GFNI,
AVX512_BITALG,
F16C,
PKU,
OSPKE,
CET_IBT,
CET_SS,
}
private final EnumSet<CPUFeature> features;

4
src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.amd64/src/jdk/vm/ci/hotspot/amd64/AMD64HotSpotVMConfig.java
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@ -83,4 +83,8 @@ class AMD64HotSpotVMConfig extends HotSpotVMConfigAccess {
final long amd64AVX512VL = getConstant("VM_Version::CPU_AVX512VL", Long.class);
final long amd64SHA = getConstant("VM_Version::CPU_SHA", Long.class);
final long amd64FMA = getConstant("VM_Version::CPU_FMA", Long.class);
final long amd64PKU = getConstant("VM_Version::CPU_PKU", Long.class);
final long amd64OSPKE = getConstant("VM_Version::CPU_OSPKE", Long.class);
final long amd64CET_IBT = getConstant("VM_Version::CPU_CET_IBT", Long.class);
final long amd64CET_SS = getConstant("VM_Version::CPU_CET_SS", Long.class);
}