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8231754: [JVMCI] Make r27 unconditionally reserved in JVMCI

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Reserve r27 (heap base register) on AArch64 unconditionally

Reviewed-by: adinn, dlong
This commit is contained in:
Yudi Zheng 2019-10-16 16:54:56 +02:00
parent ecde34ee35
commit db097ae201
2 changed files with 19 additions and 16 deletions
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8
src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.aarch64/src/jdk/vm/ci/hotspot/aarch64/AArch64HotSpotJVMCIBackendFactory.java
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -127,8 +127,8 @@ public class AArch64HotSpotJVMCIBackendFactory implements HotSpotJVMCIBackendFac
return new HotSpotConstantReflectionProvider(runtime);
}
private static RegisterConfig createRegisterConfig(AArch64HotSpotVMConfig config, TargetDescription target) {
return new AArch64HotSpotRegisterConfig(target, config.useCompressedOops);
private static RegisterConfig createRegisterConfig(TargetDescription target) {
return new AArch64HotSpotRegisterConfig(target);
}
protected HotSpotCodeCacheProvider createCodeCache(HotSpotJVMCIRuntime runtime, TargetDescription target, RegisterConfig regConfig) {
@ -167,7 +167,7 @@ public class AArch64HotSpotJVMCIBackendFactory implements HotSpotJVMCIBackendFac
metaAccess = createMetaAccess(runtime);
}
try (InitTimer rt = timer("create RegisterConfig")) {
regConfig = createRegisterConfig(config, target);
regConfig = createRegisterConfig(target);
}
try (InitTimer rt = timer("create CodeCache provider")) {
codeCache = createCodeCache(runtime, target, regConfig);

27
src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.aarch64/src/jdk/vm/ci/hotspot/aarch64/AArch64HotSpotRegisterConfig.java
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -126,11 +126,19 @@ public class AArch64HotSpotRegisterConfig implements RegisterConfig {
public static final Register threadRegister = r28;
public static final Register fp = r29;
private static final RegisterArray reservedRegisters = new RegisterArray(rscratch1, rscratch2, threadRegister, fp, lr, r31, zr, sp);
/**
* The heapBaseRegister, i.e. r27, is reserved unconditionally because HotSpot does not intend
* to support it as an allocatable register even when compressed oops is off. This register is
* excluded from callee-saved register at
* cpu/aarch64/sharedRuntime_aarch64.cpp:RegisterSaver::save_live_registers, which may lead to
* dereferencing unknown value from the stack at
* share/runtime/stackValue.cpp:StackValue::create_stack_value during deoptimization.
*/
private static final RegisterArray reservedRegisters = new RegisterArray(rscratch1, rscratch2, heapBaseRegister, threadRegister, fp, lr, r31, zr, sp);
private static RegisterArray initAllocatable(Architecture arch, boolean reserveForHeapBase) {
private static RegisterArray initAllocatable(Architecture arch) {
RegisterArray allRegisters = arch.getAvailableValueRegisters();
Register[] registers = new Register[allRegisters.size() - reservedRegisters.size() - (reserveForHeapBase ? 1 : 0)];
Register[] registers = new Register[allRegisters.size() - reservedRegisters.size()];
List<Register> reservedRegistersList = reservedRegisters.asList();
int idx = 0;
@ -139,12 +147,7 @@ public class AArch64HotSpotRegisterConfig implements RegisterConfig {
// skip reserved registers
continue;
}
assert !(reg.equals(threadRegister) || reg.equals(fp) || reg.equals(lr) || reg.equals(r31) || reg.equals(zr) || reg.equals(sp));
if (reserveForHeapBase && reg.equals(heapBaseRegister)) {
// skip heap base register
continue;
}
assert !(reg.equals(heapBaseRegister) || reg.equals(threadRegister) || reg.equals(fp) || reg.equals(lr) || reg.equals(r31) || reg.equals(zr) || reg.equals(sp)) : reg;
registers[idx++] = reg;
}
@ -152,8 +155,8 @@ public class AArch64HotSpotRegisterConfig implements RegisterConfig {
return new RegisterArray(registers);
}
public AArch64HotSpotRegisterConfig(TargetDescription target, boolean useCompressedOops) {
this(target, initAllocatable(target.arch, useCompressedOops));
public AArch64HotSpotRegisterConfig(TargetDescription target) {
this(target, initAllocatable(target.arch));
assert callerSaved.size() >= allocatable.size();
}