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8241077: x86_64: Minor Assembler improvements
Reviewed-by: kvn
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6f7a103abc
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@ -7900,7 +7900,7 @@ void Assembler::vex_prefix(Address adr, int nds_enc, int xreg_enc, VexSimdPrefix
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// is allowed in legacy mode and has resources which will fit in it.
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// Pure EVEX instructions will have is_evex_instruction set in their definition.
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if (!attributes->is_legacy_mode()) {
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if (UseAVX > 2 && !attributes->is_evex_instruction() && !_is_managed) {
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if (UseAVX > 2 && !attributes->is_evex_instruction() && !is_managed()) {
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if ((attributes->get_vector_len() != AVX_512bit) && (nds_enc < 16) && (xreg_enc < 16)) {
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attributes->set_is_legacy_mode();
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}
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@ -7915,7 +7915,7 @@ void Assembler::vex_prefix(Address adr, int nds_enc, int xreg_enc, VexSimdPrefix
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assert(((nds_enc < 16 && xreg_enc < 16) || (!attributes->is_legacy_mode())),"XMM register should be 0-15");
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}
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_is_managed = false;
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clear_managed();
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if (UseAVX > 2 && !attributes->is_legacy_mode())
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{
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bool evex_r = (xreg_enc >= 16);
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@ -7947,7 +7947,7 @@ int Assembler::vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc, VexS
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// is allowed in legacy mode and has resources which will fit in it.
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// Pure EVEX instructions will have is_evex_instruction set in their definition.
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if (!attributes->is_legacy_mode()) {
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if (UseAVX > 2 && !attributes->is_evex_instruction() && !_is_managed) {
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if (UseAVX > 2 && !attributes->is_evex_instruction() && !is_managed()) {
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if ((!attributes->uses_vl() || (attributes->get_vector_len() != AVX_512bit)) &&
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(dst_enc < 16) && (nds_enc < 16) && (src_enc < 16)) {
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attributes->set_is_legacy_mode();
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@ -7969,7 +7969,7 @@ int Assembler::vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc, VexS
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assert(((dst_enc < 16 && nds_enc < 16 && src_enc < 16) || (!attributes->is_legacy_mode())),"XMM register should be 0-15");
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}
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_is_managed = false;
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clear_managed();
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if (UseAVX > 2 && !attributes->is_legacy_mode())
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{
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bool evex_r = (dst_enc >= 16);
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@ -339,15 +339,15 @@ class Address {
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private:
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bool base_needs_rex() const {
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return _base != noreg && _base->encoding() >= 8;
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return _base->is_valid() && _base->encoding() >= 8;
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}
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bool index_needs_rex() const {
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return _index != noreg &&_index->encoding() >= 8;
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return _index->is_valid() &&_index->encoding() >= 8;
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}
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bool xmmindex_needs_rex() const {
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return _xmmindex != xnoreg && _xmmindex->encoding() >= 8;
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return _xmmindex->is_valid() && _xmmindex->encoding() >= 8;
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}
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relocInfo::relocType reloc() const { return _rspec.type(); }
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@ -659,7 +659,7 @@ private:
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bool _legacy_mode_dq;
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bool _legacy_mode_vl;
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bool _legacy_mode_vlbw;
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bool _is_managed;
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NOT_LP64(bool _is_managed;)
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class InstructionAttr *_attributes;
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@ -870,16 +870,18 @@ private:
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_legacy_mode_dq = (VM_Version::supports_avx512dq() == false);
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_legacy_mode_vl = (VM_Version::supports_avx512vl() == false);
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_legacy_mode_vlbw = (VM_Version::supports_avx512vlbw() == false);
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_is_managed = false;
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NOT_LP64(_is_managed = false;)
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_attributes = NULL;
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}
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void set_attributes(InstructionAttr *attributes) { _attributes = attributes; }
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void clear_attributes(void) { _attributes = NULL; }
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void set_managed(void) { _is_managed = true; }
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void clear_managed(void) { _is_managed = false; }
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bool is_managed(void) { return _is_managed; }
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void set_managed(void) { NOT_LP64(_is_managed = true;) }
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void clear_managed(void) { NOT_LP64(_is_managed = false;) }
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bool is_managed(void) {
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NOT_LP64(return _is_managed;)
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LP64_ONLY(return false;) }
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void lea(Register dst, Address src);
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@ -2280,22 +2282,20 @@ public:
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bool no_reg_mask, // when true, k0 is used when EVEX encoding is chosen, else embedded_opmask_register_specifier is used
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bool uses_vl) // This instruction may have legacy constraints based on vector length for EVEX
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:
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_avx_vector_len(vector_len),
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_rex_vex_w(rex_vex_w),
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_rex_vex_w_reverted(false),
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_legacy_mode(legacy_mode),
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_legacy_mode(legacy_mode || UseAVX < 3),
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_no_reg_mask(no_reg_mask),
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_uses_vl(uses_vl),
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_tuple_type(Assembler::EVEX_ETUP),
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_input_size_in_bits(Assembler::EVEX_NObit),
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_rex_vex_w_reverted(false),
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_is_evex_instruction(false),
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_evex_encoding(0),
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_is_clear_context(true),
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_is_extended_context(false),
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_avx_vector_len(vector_len),
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_tuple_type(Assembler::EVEX_ETUP),
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_input_size_in_bits(Assembler::EVEX_NObit),
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_evex_encoding(0),
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_embedded_opmask_register_specifier(0), // hard code k0
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_current_assembler(NULL) {
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if (UseAVX < 3) _legacy_mode = true;
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}
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_current_assembler(NULL) { }
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~InstructionAttr() {
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if (_current_assembler != NULL) {
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@ -2305,37 +2305,37 @@ public:
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}
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private:
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int _avx_vector_len;
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bool _rex_vex_w;
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bool _rex_vex_w_reverted;
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bool _legacy_mode;
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bool _no_reg_mask;
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bool _uses_vl;
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int _tuple_type;
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int _input_size_in_bits;
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bool _rex_vex_w_reverted;
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bool _is_evex_instruction;
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int _evex_encoding;
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bool _is_clear_context;
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bool _is_extended_context;
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int _avx_vector_len;
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int _tuple_type;
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int _input_size_in_bits;
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int _evex_encoding;
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int _embedded_opmask_register_specifier;
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Assembler *_current_assembler;
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public:
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// query functions for field accessors
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int get_vector_len(void) const { return _avx_vector_len; }
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bool is_rex_vex_w(void) const { return _rex_vex_w; }
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bool is_rex_vex_w_reverted(void) { return _rex_vex_w_reverted; }
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bool is_legacy_mode(void) const { return _legacy_mode; }
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bool is_no_reg_mask(void) const { return _no_reg_mask; }
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bool uses_vl(void) const { return _uses_vl; }
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int get_tuple_type(void) const { return _tuple_type; }
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int get_input_size(void) const { return _input_size_in_bits; }
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int is_evex_instruction(void) const { return _is_evex_instruction; }
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int get_evex_encoding(void) const { return _evex_encoding; }
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bool is_rex_vex_w_reverted(void) { return _rex_vex_w_reverted; }
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bool is_evex_instruction(void) const { return _is_evex_instruction; }
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bool is_clear_context(void) const { return _is_clear_context; }
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bool is_extended_context(void) const { return _is_extended_context; }
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int get_embedded_opmask_register_specifier(void) const { return _embedded_opmask_register_specifier; }
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int get_vector_len(void) const { return _avx_vector_len; }
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int get_tuple_type(void) const { return _tuple_type; }
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int get_input_size(void) const { return _input_size_in_bits; }
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int get_evex_encoding(void) const { return _evex_encoding; }
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int get_embedded_opmask_register_specifier(void) const { return _embedded_opmask_register_specifier; }
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// Set the vector len manually
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void set_vector_len(int vector_len) { _avx_vector_len = vector_len; }
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