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8332082: Shenandoah: Use consistent tests to determine when pre-write barrier is active
Reviewed-by: kdnilsen, shade
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@ -109,18 +109,13 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
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assert_different_registers(obj, pre_val, tmp1, tmp2);
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assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
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Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
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Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
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Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
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// Is marking active?
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if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
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__ ldrw(tmp1, in_progress);
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} else {
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assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
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__ ldrb(tmp1, in_progress);
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}
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__ cbzw(tmp1, done);
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Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
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__ ldrb(tmp1, gc_state);
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__ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
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// Do we need to load the previous value?
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if (obj != noreg) {
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@ -112,18 +112,14 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
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assert_different_registers(obj, pre_val, tmp1, tmp2);
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assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
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Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
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Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
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Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
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// Is marking active?
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if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
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__ lwu(tmp1, in_progress);
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} else {
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assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
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__ lbu(tmp1, in_progress);
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}
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__ beqz(tmp1, done);
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Address gc_state(xthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
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__ lbu(t1, gc_state);
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__ test_bit(t1, t1, ShenandoahHeap::MARKING_BITPOS);
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__ beqz(t1, done);
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// Do we need to load the previous value?
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if (obj != noreg) {
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@ -219,7 +219,6 @@ void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
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assert(pre_val != rax, "check this code");
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}
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Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
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Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
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Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
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@ -58,26 +58,32 @@ ShenandoahBarrierSetC1::ShenandoahBarrierSetC1() :
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void ShenandoahBarrierSetC1::pre_barrier(LIRGenerator* gen, CodeEmitInfo* info, DecoratorSet decorators, LIR_Opr addr_opr, LIR_Opr pre_val) {
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// First we test whether marking is in progress.
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BasicType flag_type;
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bool patch = (decorators & C1_NEEDS_PATCHING) != 0;
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bool do_load = pre_val == LIR_OprFact::illegalOpr;
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if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
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flag_type = T_INT;
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} else {
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guarantee(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1,
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"Assumption");
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// Use unsigned type T_BOOLEAN here rather than signed T_BYTE since some platforms, eg. ARM,
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// need to use unsigned instructions to use the large offset to load the satb_mark_queue.
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flag_type = T_BOOLEAN;
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}
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LIR_Opr thrd = gen->getThreadPointer();
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LIR_Address* mark_active_flag_addr =
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new LIR_Address(thrd,
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in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()),
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flag_type);
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// Read the marking-in-progress flag.
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LIR_Address* gc_state_addr =
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new LIR_Address(thrd,
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in_bytes(ShenandoahThreadLocalData::gc_state_offset()),
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T_BYTE);
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// Read the gc_state flag.
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LIR_Opr flag_val = gen->new_register(T_INT);
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__ load(mark_active_flag_addr, flag_val);
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__ load(gc_state_addr, flag_val);
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// Create a mask to test if the marking bit is set.
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// TODO: can we directly test if bit is set?
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LIR_Opr mask = LIR_OprFact::intConst(ShenandoahHeap::MARKING);
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LIR_Opr mask_reg = gen->new_register(T_INT);
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__ move(mask, mask_reg);
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if (two_operand_lir_form) {
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__ logical_and(flag_val, mask_reg, flag_val);
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} else {
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LIR_Opr masked_flag = gen->new_register(T_INT);
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__ logical_and(flag_val, mask_reg, masked_flag);
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flag_val = masked_flag;
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}
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__ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
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LIR_PatchCode pre_val_patch_code = lir_patch_none;
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@ -980,7 +980,7 @@ void ShenandoahBarrierSetC2::verify_gc_barriers(Compile* compile, CompilePhase p
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ShenandoahBarrierC2Support::verify(Compile::current()->root());
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} else if (phase == BarrierSetC2::BeforeCodeGen) {
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// Verify Shenandoah pre-barriers
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const int marking_offset = in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset());
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const int gc_state_offset = in_bytes(ShenandoahThreadLocalData::gc_state_offset());
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Unique_Node_List visited;
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Node_List worklist;
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@ -988,7 +988,10 @@ void ShenandoahBarrierSetC2::verify_gc_barriers(Compile* compile, CompilePhase p
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worklist.push(compile->root());
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while (worklist.size() > 0) {
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Node *x = worklist.pop();
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if (x == nullptr || x == compile->top()) continue;
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if (x == nullptr || x == compile->top()) {
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continue;
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}
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if (visited.member(x)) {
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continue;
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} else {
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@ -1016,7 +1019,7 @@ void ShenandoahBarrierSetC2::verify_gc_barriers(Compile* compile, CompilePhase p
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LoadNode *load = cmp->in(1)->as_Load();
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if (load->Opcode() == Op_LoadB && load->in(2)->is_AddP() && load->in(2)->in(2)->Opcode() == Op_ThreadLocal
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&& load->in(2)->in(3)->is_Con()
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&& load->in(2)->in(3)->bottom_type()->is_intptr_t()->get_con() == marking_offset) {
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&& load->in(2)->in(3)->bottom_type()->is_intptr_t()->get_con() == gc_state_offset) {
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Node *if_ctrl = iff->in(0);
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Node *load_ctrl = load->in(0);
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@ -158,10 +158,6 @@ public:
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}
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// Offsets
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static ByteSize satb_mark_queue_active_offset() {
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return satb_mark_queue_offset() + SATBMarkQueue::byte_offset_of_active();
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}
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static ByteSize satb_mark_queue_index_offset() {
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return satb_mark_queue_offset() + SATBMarkQueue::byte_offset_of_index();
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}
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