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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
BitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware. Reviewed-by: kvn, never
This commit is contained in:
parent
69f9ddee90
commit
de67e52949
@ -9015,6 +9015,33 @@ instruct string_compare(o0RegP str1, o1RegP str2, g3RegP tmp1, g4RegP tmp2, note
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ins_pipe(long_memory_op);
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%}
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//---------- Population Count Instructions -------------------------------------
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instruct popCountI(iRegI dst, iRegI src) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountI src));
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format %{ "POPC $src, $dst" %}
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ins_encode %{
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__ popc($src$$Register, $dst$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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// Note: Long.bitCount(long) returns an int.
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instruct popCountL(iRegI dst, iRegL src) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountL src));
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format %{ "POPC $src, $dst" %}
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ins_encode %{
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__ popc($src$$Register, $dst$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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// ============================================================================
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//------------Bytes reverse--------------------------------------------------
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@ -92,10 +92,18 @@ void VM_Version::initialize() {
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#endif
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}
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// Use hardware population count instruction if available.
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if (has_hardware_popc()) {
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if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
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UsePopCountInstruction = true;
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}
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}
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char buf[512];
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jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s",
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jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s",
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(has_v8() ? ", has_v8" : ""),
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(has_v9() ? ", has_v9" : ""),
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(has_hardware_popc() ? ", popc" : ""),
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(has_vis1() ? ", has_vis1" : ""),
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(has_vis2() ? ", has_vis2" : ""),
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(is_ultra3() ? ", is_ultra3" : ""),
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@ -29,10 +29,11 @@ protected:
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hardware_mul32 = 1,
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hardware_div32 = 2,
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hardware_fsmuld = 3,
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v9_instructions = 4,
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vis1_instructions = 5,
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vis2_instructions = 6,
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sun4v_instructions = 7
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hardware_popc = 4,
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v9_instructions = 5,
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vis1_instructions = 6,
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vis2_instructions = 7,
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sun4v_instructions = 8
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};
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enum Feature_Flag_Set {
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@ -43,6 +44,7 @@ protected:
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hardware_mul32_m = 1 << hardware_mul32,
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hardware_div32_m = 1 << hardware_div32,
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hardware_fsmuld_m = 1 << hardware_fsmuld,
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hardware_popc_m = 1 << hardware_popc,
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v9_instructions_m = 1 << v9_instructions,
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vis1_instructions_m = 1 << vis1_instructions,
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vis2_instructions_m = 1 << vis2_instructions,
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@ -81,6 +83,7 @@ public:
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static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; }
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static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; }
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static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; }
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static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; }
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static bool has_vis1() { return (_features & vis1_instructions_m) != 0; }
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static bool has_vis2() { return (_features & vis2_instructions_m) != 0; }
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@ -2193,6 +2193,25 @@ void Assembler::pop(Register dst) {
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emit_byte(0x58 | encode);
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}
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void Assembler::popcntl(Register dst, Address src) {
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assert(VM_Version::supports_popcnt(), "must support");
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InstructionMark im(this);
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emit_byte(0xF3);
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prefix(src, dst);
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emit_byte(0x0F);
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emit_byte(0xB8);
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emit_operand(dst, src);
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}
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void Assembler::popcntl(Register dst, Register src) {
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assert(VM_Version::supports_popcnt(), "must support");
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emit_byte(0xF3);
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int encode = prefix_and_encode(dst->encoding(), src->encoding());
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emit_byte(0x0F);
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emit_byte(0xB8);
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emit_byte(0xC0 | encode);
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}
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void Assembler::popf() {
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emit_byte(0x9D);
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}
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@ -4080,6 +4099,25 @@ void Assembler::popa() { // 64bit
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addq(rsp, 16 * wordSize);
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}
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void Assembler::popcntq(Register dst, Address src) {
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assert(VM_Version::supports_popcnt(), "must support");
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InstructionMark im(this);
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emit_byte(0xF3);
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prefixq(src, dst);
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emit_byte(0x0F);
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emit_byte(0xB8);
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emit_operand(dst, src);
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}
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void Assembler::popcntq(Register dst, Register src) {
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assert(VM_Version::supports_popcnt(), "must support");
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emit_byte(0xF3);
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int encode = prefixq_and_encode(dst->encoding(), src->encoding());
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emit_byte(0x0F);
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emit_byte(0xB8);
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emit_byte(0xC0 | encode);
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}
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void Assembler::popq(Address dst) {
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InstructionMark im(this);
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prefixq(dst);
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@ -1224,6 +1224,14 @@ private:
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void popq(Address dst);
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#endif
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void popcntl(Register dst, Address src);
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void popcntl(Register dst, Register src);
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#ifdef _LP64
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void popcntq(Register dst, Address src);
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void popcntq(Register dst, Register src);
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#endif
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// Prefetches (SSE, SSE2, 3DNOW only)
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void prefetchnta(Address src);
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@ -284,7 +284,7 @@ void VM_Version::get_processor_features() {
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}
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char buf[256];
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jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
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jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
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cores_per_cpu(), threads_per_core(),
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cpu_family(), _model, _stepping,
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(supports_cmov() ? ", cmov" : ""),
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@ -297,6 +297,7 @@ void VM_Version::get_processor_features() {
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(supports_ssse3()? ", ssse3": ""),
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(supports_sse4_1() ? ", sse4.1" : ""),
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(supports_sse4_2() ? ", sse4.2" : ""),
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(supports_popcnt() ? ", popcnt" : ""),
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(supports_mmx_ext() ? ", mmxext" : ""),
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(supports_3dnow() ? ", 3dnow" : ""),
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(supports_3dnow2() ? ", 3dnowext" : ""),
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@ -410,6 +411,13 @@ void VM_Version::get_processor_features() {
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}
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}
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// Use population count instruction if available.
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if (supports_popcnt()) {
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if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
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UsePopCountInstruction = true;
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}
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}
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assert(0 <= ReadPrefetchInstr && ReadPrefetchInstr <= 3, "invalid value");
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assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value");
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@ -70,7 +70,9 @@ public:
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dca : 1,
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sse4_1 : 1,
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sse4_2 : 1,
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: 11;
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: 2,
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popcnt : 1,
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: 8;
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} bits;
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};
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@ -179,7 +181,8 @@ protected:
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CPU_SSSE3 = (1 << 9),
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CPU_SSE4A = (1 << 10),
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CPU_SSE4_1 = (1 << 11),
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CPU_SSE4_2 = (1 << 12)
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CPU_SSE4_2 = (1 << 12),
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CPU_POPCNT = (1 << 13)
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} cpuFeatureFlags;
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// cpuid information block. All info derived from executing cpuid with
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@ -290,6 +293,8 @@ protected:
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result |= CPU_SSE4_1;
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if (_cpuid_info.std_cpuid1_ecx.bits.sse4_2 != 0)
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result |= CPU_SSE4_2;
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if (_cpuid_info.std_cpuid1_ecx.bits.popcnt != 0)
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result |= CPU_POPCNT;
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return result;
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}
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@ -379,6 +384,7 @@ public:
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static bool supports_ssse3() { return (_cpuFeatures & CPU_SSSE3)!= 0; }
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static bool supports_sse4_1() { return (_cpuFeatures & CPU_SSE4_1) != 0; }
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static bool supports_sse4_2() { return (_cpuFeatures & CPU_SSE4_2) != 0; }
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static bool supports_popcnt() { return (_cpuFeatures & CPU_POPCNT) != 0; }
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//
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// AMD features
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//
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@ -1483,16 +1483,20 @@ encode %{
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// main source block for now. In future, we can generalize this by
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// adding a syntax that specifies the sizes of fields in an order,
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// so that the adlc can build the emit functions automagically
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enc_class OpcP %{ // Emit opcode
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emit_opcode(cbuf,$primary);
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// Emit primary opcode
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enc_class OpcP %{
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emit_opcode(cbuf, $primary);
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%}
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enc_class OpcS %{ // Emit opcode
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emit_opcode(cbuf,$secondary);
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// Emit secondary opcode
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enc_class OpcS %{
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emit_opcode(cbuf, $secondary);
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%}
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enc_class Opcode(immI d8 ) %{ // Emit opcode
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emit_opcode(cbuf,$d8$$constant);
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// Emit opcode directly
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enc_class Opcode(immI d8) %{
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emit_opcode(cbuf, $d8$$constant);
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%}
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enc_class SizePrefix %{
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@ -6387,6 +6391,67 @@ instruct bytes_reverse_long(eRegL dst) %{
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%}
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//---------- Population Count Instructions -------------------------------------
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instruct popCountI(eRegI dst, eRegI src) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountI src));
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format %{ "POPCNT $dst, $src" %}
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ins_encode %{
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__ popcntl($dst$$Register, $src$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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instruct popCountI_mem(eRegI dst, memory mem) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountI (LoadI mem)));
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format %{ "POPCNT $dst, $mem" %}
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ins_encode %{
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__ popcntl($dst$$Register, $mem$$Address);
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%}
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ins_pipe(ialu_reg);
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%}
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// Note: Long.bitCount(long) returns an int.
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instruct popCountL(eRegI dst, eRegL src, eRegI tmp, eFlagsReg cr) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountL src));
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effect(KILL cr, TEMP tmp, TEMP dst);
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format %{ "POPCNT $dst, $src.lo\n\t"
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"POPCNT $tmp, $src.hi\n\t"
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"ADD $dst, $tmp" %}
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ins_encode %{
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__ popcntl($dst$$Register, $src$$Register);
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__ popcntl($tmp$$Register, HIGH_FROM_LOW($src$$Register));
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__ addl($dst$$Register, $tmp$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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// Note: Long.bitCount(long) returns an int.
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instruct popCountL_mem(eRegI dst, memory mem, eRegI tmp, eFlagsReg cr) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountL (LoadL mem)));
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effect(KILL cr, TEMP tmp, TEMP dst);
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format %{ "POPCNT $dst, $mem\n\t"
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"POPCNT $tmp, $mem+4\n\t"
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"ADD $dst, $tmp" %}
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ins_encode %{
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//__ popcntl($dst$$Register, $mem$$Address$$first);
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//__ popcntl($tmp$$Register, $mem$$Address$$second);
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__ popcntl($dst$$Register, Address::make_raw($mem$$base, $mem$$index, $mem$$scale, $mem$$disp, false));
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__ popcntl($tmp$$Register, Address::make_raw($mem$$base, $mem$$index, $mem$$scale, $mem$$disp + 4, false));
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__ addl($dst$$Register, $tmp$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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//----------Load/Store/Move Instructions---------------------------------------
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//----------Load Instructions--------------------------------------------------
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// Load Byte (8bit signed)
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@ -7429,6 +7429,56 @@ instruct storeL_reversed(memory dst, rRegL src) %{
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ins_pipe( ialu_mem_reg );
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%}
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//---------- Population Count Instructions -------------------------------------
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instruct popCountI(rRegI dst, rRegI src) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountI src));
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format %{ "popcnt $dst, $src" %}
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ins_encode %{
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__ popcntl($dst$$Register, $src$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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instruct popCountI_mem(rRegI dst, memory mem) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountI (LoadI mem)));
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format %{ "popcnt $dst, $mem" %}
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ins_encode %{
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__ popcntl($dst$$Register, $mem$$Address);
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%}
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ins_pipe(ialu_reg);
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%}
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// Note: Long.bitCount(long) returns an int.
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instruct popCountL(rRegI dst, rRegL src) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountL src));
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format %{ "popcnt $dst, $src" %}
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ins_encode %{
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__ popcntq($dst$$Register, $src$$Register);
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%}
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ins_pipe(ialu_reg);
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%}
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// Note: Long.bitCount(long) returns an int.
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instruct popCountL_mem(rRegI dst, memory mem) %{
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predicate(UsePopCountInstruction);
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match(Set dst (PopCountL (LoadL mem)));
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format %{ "popcnt $dst, $mem" %}
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ins_encode %{
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__ popcntq($dst$$Register, $mem$$Address);
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%}
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ins_pipe(ialu_reg);
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%}
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//----------MemBar Instructions-----------------------------------------------
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// Memory barrier flavors
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@ -85,6 +85,7 @@ int VM_Version::platform_features(int features) {
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if (av & AV_SPARC_DIV32) features |= hardware_div32_m;
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if (av & AV_SPARC_FSMULD) features |= hardware_fsmuld_m;
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if (av & AV_SPARC_V8PLUS) features |= v9_instructions_m;
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if (av & AV_SPARC_POPC) features |= hardware_popc_m;
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if (av & AV_SPARC_VIS) features |= vis1_instructions_m;
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if (av & AV_SPARC_VIS2) features |= vis2_instructions_m;
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} else {
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@ -1,5 +1,5 @@
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/*
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* Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
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* Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -284,6 +284,7 @@
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template(value_name, "value") \
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template(frontCacheEnabled_name, "frontCacheEnabled") \
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template(stringCacheEnabled_name, "stringCacheEnabled") \
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template(bitCount_name, "bitCount") \
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\
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/* non-intrinsic name/signature pairs: */ \
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template(register_method_name, "register") \
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@ -304,6 +305,7 @@
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template(double_long_signature, "(D)J") \
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template(double_double_signature, "(D)D") \
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template(int_float_signature, "(I)F") \
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template(long_int_signature, "(J)I") \
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template(long_long_signature, "(J)J") \
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template(long_double_signature, "(J)D") \
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template(byte_signature, "B") \
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@ -507,6 +509,10 @@
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do_name( doubleToLongBits_name, "doubleToLongBits") \
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do_intrinsic(_longBitsToDouble, java_lang_Double, longBitsToDouble_name, long_double_signature, F_S) \
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do_name( longBitsToDouble_name, "longBitsToDouble") \
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\
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do_intrinsic(_bitCount_i, java_lang_Integer, bitCount_name, int_int_signature, F_S) \
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do_intrinsic(_bitCount_l, java_lang_Long, bitCount_name, long_int_signature, F_S) \
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\
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do_intrinsic(_reverseBytes_i, java_lang_Integer, reverseBytes_name, int_int_signature, F_S) \
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do_name( reverseBytes_name, "reverseBytes") \
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do_intrinsic(_reverseBytes_l, java_lang_Long, reverseBytes_name, long_long_signature, F_S) \
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@ -696,7 +702,6 @@
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do_signature(putShort_raw_signature, "(JS)V") \
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do_signature(getChar_raw_signature, "(J)C") \
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do_signature(putChar_raw_signature, "(JC)V") \
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do_signature(getInt_raw_signature, "(J)I") \
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do_signature(putInt_raw_signature, "(JI)V") \
|
||||
do_alias(getLong_raw_signature, /*(J)J*/ long_long_signature) \
|
||||
do_alias(putLong_raw_signature, /*(JJ)V*/ long_long_void_signature) \
|
||||
@ -713,7 +718,7 @@
|
||||
do_intrinsic(_getByte_raw, sun_misc_Unsafe, getByte_name, getByte_raw_signature, F_RN) \
|
||||
do_intrinsic(_getShort_raw, sun_misc_Unsafe, getShort_name, getShort_raw_signature, F_RN) \
|
||||
do_intrinsic(_getChar_raw, sun_misc_Unsafe, getChar_name, getChar_raw_signature, F_RN) \
|
||||
do_intrinsic(_getInt_raw, sun_misc_Unsafe, getInt_name, getInt_raw_signature, F_RN) \
|
||||
do_intrinsic(_getInt_raw, sun_misc_Unsafe, getInt_name, long_int_signature, F_RN) \
|
||||
do_intrinsic(_getLong_raw, sun_misc_Unsafe, getLong_name, getLong_raw_signature, F_RN) \
|
||||
do_intrinsic(_getFloat_raw, sun_misc_Unsafe, getFloat_name, getFloat_raw_signature, F_RN) \
|
||||
do_intrinsic(_getDouble_raw, sun_misc_Unsafe, getDouble_name, getDouble_raw_signature, F_RN) \
|
||||
|
||||
@ -184,6 +184,8 @@ macro(PCTable)
|
||||
macro(Parm)
|
||||
macro(PartialSubtypeCheck)
|
||||
macro(Phi)
|
||||
macro(PopCountI)
|
||||
macro(PopCountL)
|
||||
macro(PowD)
|
||||
macro(PrefetchRead)
|
||||
macro(PrefetchWrite)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -635,3 +635,23 @@ class MoveD2LNode : public Node {
|
||||
virtual uint ideal_reg() const { return Op_RegL; }
|
||||
virtual const Type* Value( PhaseTransform *phase ) const;
|
||||
};
|
||||
|
||||
//---------- PopCountINode -----------------------------------------------------
|
||||
// Population count (bit count) of an integer.
|
||||
class PopCountINode : public Node {
|
||||
public:
|
||||
PopCountINode(Node* in1) : Node(0, in1) {}
|
||||
virtual int Opcode() const;
|
||||
const Type* bottom_type() const { return TypeInt::INT; }
|
||||
virtual uint ideal_reg() const { return Op_RegI; }
|
||||
};
|
||||
|
||||
//---------- PopCountLNode -----------------------------------------------------
|
||||
// Population count (bit count) of a long.
|
||||
class PopCountLNode : public Node {
|
||||
public:
|
||||
PopCountLNode(Node* in1) : Node(0, in1) {}
|
||||
virtual int Opcode() const;
|
||||
const Type* bottom_type() const { return TypeInt::INT; }
|
||||
virtual uint ideal_reg() const { return Op_RegI; }
|
||||
};
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 1999-2008 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* Copyright 1999-2009 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -221,6 +221,7 @@ class LibraryCallKit : public GraphKit {
|
||||
bool inline_unsafe_CAS(BasicType type);
|
||||
bool inline_unsafe_ordered_store(BasicType type);
|
||||
bool inline_fp_conversions(vmIntrinsics::ID id);
|
||||
bool inline_bitCount(vmIntrinsics::ID id);
|
||||
bool inline_reverseBytes(vmIntrinsics::ID id);
|
||||
};
|
||||
|
||||
@ -314,6 +315,11 @@ CallGenerator* Compile::make_vm_intrinsic(ciMethod* m, bool is_virtual) {
|
||||
if (!JDK_Version::is_gte_jdk14x_version()) return NULL;
|
||||
break;
|
||||
|
||||
case vmIntrinsics::_bitCount_i:
|
||||
case vmIntrinsics::_bitCount_l:
|
||||
if (!UsePopCountInstruction) return NULL;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@ -617,6 +623,10 @@ bool LibraryCallKit::try_to_inline() {
|
||||
case vmIntrinsics::_longBitsToDouble:
|
||||
return inline_fp_conversions(intrinsic_id());
|
||||
|
||||
case vmIntrinsics::_bitCount_i:
|
||||
case vmIntrinsics::_bitCount_l:
|
||||
return inline_bitCount(intrinsic_id());
|
||||
|
||||
case vmIntrinsics::_reverseBytes_i:
|
||||
case vmIntrinsics::_reverseBytes_l:
|
||||
return inline_reverseBytes((vmIntrinsics::ID) intrinsic_id());
|
||||
@ -1714,6 +1724,27 @@ inline Node* LibraryCallKit::make_unsafe_address(Node* base, Node* offset) {
|
||||
}
|
||||
}
|
||||
|
||||
//----------------------------inline_bitCount_int/long-----------------------
|
||||
// inline int Integer.bitCount(int)
|
||||
// inline int Long.bitCount(long)
|
||||
bool LibraryCallKit::inline_bitCount(vmIntrinsics::ID id) {
|
||||
assert(id == vmIntrinsics::_bitCount_i || id == vmIntrinsics::_bitCount_l, "not bitCount");
|
||||
if (id == vmIntrinsics::_bitCount_i && !Matcher::has_match_rule(Op_PopCountI)) return false;
|
||||
if (id == vmIntrinsics::_bitCount_l && !Matcher::has_match_rule(Op_PopCountL)) return false;
|
||||
_sp += arg_size(); // restore stack pointer
|
||||
switch (id) {
|
||||
case vmIntrinsics::_bitCount_i:
|
||||
push(_gvn.transform(new (C, 2) PopCountINode(pop())));
|
||||
break;
|
||||
case vmIntrinsics::_bitCount_l:
|
||||
push(_gvn.transform(new (C, 2) PopCountLNode(pop_pair())));
|
||||
break;
|
||||
default:
|
||||
ShouldNotReachHere();
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
//----------------------------inline_reverseBytes_int/long-------------------
|
||||
// inline Integer.reverseBytes(int)
|
||||
// inline Long.reverseBytes(long)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
@ -2172,6 +2172,9 @@ class CommandLineFlags {
|
||||
diagnostic(bool, PrintIntrinsics, false, \
|
||||
"prints attempted and successful inlining of intrinsics") \
|
||||
\
|
||||
product(bool, UsePopCountInstruction, false, \
|
||||
"Use population count instruction") \
|
||||
\
|
||||
diagnostic(ccstrlist, DisableIntrinsic, "", \
|
||||
"do not expand intrinsics whose (internal) names appear here") \
|
||||
\
|
||||
|
||||
75
hotspot/test/compiler/6378821/Test6378821.java
Normal file
75
hotspot/test/compiler/6378821/Test6378821.java
Normal file
@ -0,0 +1,75 @@
|
||||
/*
|
||||
* Copyright 2009 Sun Microsystems, Inc. All Rights Reserved.
|
||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
*
|
||||
* This code is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 only, as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* version 2 for more details (a copy is included in the LICENSE file that
|
||||
* accompanied this code).
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License version
|
||||
* 2 along with this work; if not, write to the Free Software Foundation,
|
||||
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
|
||||
* CA 95054 USA or visit www.sun.com if you need additional information or
|
||||
* have any questions.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @test
|
||||
* @bug 6378821
|
||||
* @summary where available, bitCount() should use POPC on SPARC processors and AMD+10h
|
||||
*
|
||||
* @run main/othervm -Xcomp -XX:CompileOnly=Test6378821.fcomp Test6378821
|
||||
*/
|
||||
|
||||
public class Test6378821 {
|
||||
static final int[] ia = new int[] { 0x12345678 };
|
||||
static final long[] la = new long[] { 0x12345678abcdefL };
|
||||
|
||||
public static void main(String [] args) {
|
||||
// Resolve the class and the method.
|
||||
Integer.bitCount(1);
|
||||
Long.bitCount(1);
|
||||
|
||||
sub(ia[0]);
|
||||
sub(la[0]);
|
||||
sub(ia);
|
||||
sub(la);
|
||||
}
|
||||
|
||||
static void check(int i, int expected, int result) {
|
||||
if (result != expected) {
|
||||
throw new InternalError("Wrong population count for " + i + ": " + result + " != " + expected);
|
||||
}
|
||||
}
|
||||
|
||||
static void check(long l, int expected, int result) {
|
||||
if (result != expected) {
|
||||
throw new InternalError("Wrong population count for " + l + ": " + result + " != " + expected);
|
||||
}
|
||||
}
|
||||
|
||||
static void sub(int i) { check(i, fint(i), fcomp(i) ); }
|
||||
static void sub(int[] ia) { check(ia[0], fint(ia), fcomp(ia)); }
|
||||
static void sub(long l) { check(l, fint(l), fcomp(l) ); }
|
||||
static void sub(long[] la) { check(la[0], fint(la), fcomp(la)); }
|
||||
|
||||
static int fint (int i) { return Integer.bitCount(i); }
|
||||
static int fcomp(int i) { return Integer.bitCount(i); }
|
||||
|
||||
static int fint (int[] ia) { return Integer.bitCount(ia[0]); }
|
||||
static int fcomp(int[] ia) { return Integer.bitCount(ia[0]); }
|
||||
|
||||
static int fint (long l) { return Long.bitCount(l); }
|
||||
static int fcomp(long l) { return Long.bitCount(l); }
|
||||
|
||||
static int fint (long[] la) { return Long.bitCount(la[0]); }
|
||||
static int fcomp(long[] la) { return Long.bitCount(la[0]); }
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user