From e1fc14fa17e78fef712b5635ee53d10d6d2bb50e Mon Sep 17 00:00:00 2001
From: Hamlin Li <mli@openjdk.org>
Date: Mon, 3 Mar 2025 18:29:36 +0000
Subject: [PATCH] 8350940: RISC-V: remove unnecessary
 assert_different_registers in minmax_fp

Reviewed-by: fyang
---
 src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp | 3 ---
 src/hotspot/cpu/riscv/riscv.ad                    | 8 ++++----
 2 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
index f145eb879df..e6bb7c46624 100644
--- a/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
+++ b/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
@@ -2135,9 +2135,6 @@ void C2_MacroAssembler::enc_cmove(int cmpFlag, Register op1, Register op2, Regis
 // Set dst to NaN if any NaN input.
 void C2_MacroAssembler::minmax_fp(FloatRegister dst, FloatRegister src1, FloatRegister src2,
                                   bool is_double, bool is_min) {
-  assert_different_registers(dst, src1);
-  assert_different_registers(dst, src2);
-
   Label Done, Compare;
 
   is_double ? fclass_d(t0, src1)
diff --git a/src/hotspot/cpu/riscv/riscv.ad b/src/hotspot/cpu/riscv/riscv.ad
index b8660afb5fd..a4da786f02e 100644
--- a/src/hotspot/cpu/riscv/riscv.ad
+++ b/src/hotspot/cpu/riscv/riscv.ad
@@ -7287,7 +7287,7 @@ instruct nmaddD_reg_reg(fRegD dst, fRegD src1, fRegD src2, fRegD src3) %{
 // Math.max(FF)F
 instruct maxF_reg_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr) %{
   match(Set dst (MaxF src1 src2));
-  effect(TEMP_DEF dst, KILL cr);
+  effect(KILL cr);
 
   format %{ "maxF $dst, $src1, $src2" %}
 
@@ -7303,7 +7303,7 @@ instruct maxF_reg_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr) %{
 // Math.min(FF)F
 instruct minF_reg_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr) %{
   match(Set dst (MinF src1 src2));
-  effect(TEMP_DEF dst, KILL cr);
+  effect(KILL cr);
 
   format %{ "minF $dst, $src1, $src2" %}
 
@@ -7319,7 +7319,7 @@ instruct minF_reg_reg(fRegF dst, fRegF src1, fRegF src2, rFlagsReg cr) %{
 // Math.max(DD)D
 instruct maxD_reg_reg(fRegD dst, fRegD src1, fRegD src2, rFlagsReg cr) %{
   match(Set dst (MaxD src1 src2));
-  effect(TEMP_DEF dst, KILL cr);
+  effect(KILL cr);
 
   format %{ "maxD $dst, $src1, $src2" %}
 
@@ -7335,7 +7335,7 @@ instruct maxD_reg_reg(fRegD dst, fRegD src1, fRegD src2, rFlagsReg cr) %{
 // Math.min(DD)D
 instruct minD_reg_reg(fRegD dst, fRegD src1, fRegD src2, rFlagsReg cr) %{
   match(Set dst (MinD src1 src2));
-  effect(TEMP_DEF dst, KILL cr);
+  effect(KILL cr);
 
   format %{ "minD $dst, $src1, $src2" %}