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e3621e678a
@ -284,7 +284,7 @@ void ZBarrierSetAssembler::generate_c1_load_barrier_stub(LIR_Assembler* ce,
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ref_addr = stub->ref_addr()->as_pointer_register();
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} else {
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// Load address into tmp register
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ce->leal(stub->ref_addr(), stub->tmp(), stub->patch_code(), stub->patch_info());
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ce->leal(stub->ref_addr(), stub->tmp());
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ref_addr = stub->tmp()->as_pointer_register();
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}
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@ -240,7 +240,7 @@ class LIR_Assembler: public CompilationResourceObj {
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void align_call(LIR_Code code);
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void negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp = LIR_OprFact::illegalOpr);
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void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
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void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL);
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void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -62,9 +62,13 @@ LIR_Opr BarrierSetC1::resolve_address(LIRAccess& access, bool resolve_in_registe
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if (resolve_in_register) {
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LIR_Opr resolved_addr = gen->new_pointer_register();
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__ leal(addr_opr, resolved_addr);
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resolved_addr = LIR_OprFact::address(new LIR_Address(resolved_addr, access.type()));
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return resolved_addr;
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if (needs_patching) {
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__ leal(addr_opr, resolved_addr, lir_patch_normal, access.patch_emit_info());
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access.clear_decorators(C1_NEEDS_PATCHING);
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} else {
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__ leal(addr_opr, resolved_addr);
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}
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return LIR_OprFact::address(new LIR_Address(resolved_addr, access.type()));
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} else {
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return addr_opr;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -92,17 +92,18 @@ public:
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load_offset();
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}
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LIRGenerator* gen() const { return _gen; }
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CodeEmitInfo*& patch_emit_info() { return _patch_emit_info; }
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CodeEmitInfo*& access_emit_info() { return _access_emit_info; }
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LIRAddressOpr& base() { return _base; }
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LIRAddressOpr& offset() { return _offset; }
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BasicType type() const { return _type; }
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LIR_Opr resolved_addr() const { return _resolved_addr; }
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void set_resolved_addr(LIR_Opr addr) { _resolved_addr = addr; }
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bool is_oop() const { return _type == T_ARRAY || _type == T_OBJECT; }
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DecoratorSet decorators() const { return _decorators; }
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bool is_raw() const { return (_decorators & AS_RAW) != 0; }
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LIRGenerator* gen() const { return _gen; }
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CodeEmitInfo*& patch_emit_info() { return _patch_emit_info; }
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CodeEmitInfo*& access_emit_info() { return _access_emit_info; }
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LIRAddressOpr& base() { return _base; }
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LIRAddressOpr& offset() { return _offset; }
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BasicType type() const { return _type; }
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LIR_Opr resolved_addr() const { return _resolved_addr; }
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void set_resolved_addr(LIR_Opr addr) { _resolved_addr = addr; }
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bool is_oop() const { return _type == T_ARRAY || _type == T_OBJECT; }
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DecoratorSet decorators() const { return _decorators; }
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void clear_decorators(DecoratorSet ds) { _decorators &= ~ds; }
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bool is_raw() const { return (_decorators & AS_RAW) != 0; }
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};
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// The BarrierSetC1 class is the main entry point for the GC backend of the Access API in C1.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2015, 2019, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -36,7 +36,6 @@ ZLoadBarrierStubC1::ZLoadBarrierStubC1(LIRAccess& access, LIR_Opr ref, address r
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_ref_addr(access.resolved_addr()),
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_ref(ref),
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_tmp(LIR_OprFact::illegalOpr),
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_patch_info(access.patch_emit_info()),
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_runtime_stub(runtime_stub) {
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// Allocate tmp register if needed
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@ -72,28 +71,14 @@ LIR_Opr ZLoadBarrierStubC1::tmp() const {
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return _tmp;
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}
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LIR_PatchCode ZLoadBarrierStubC1::patch_code() const {
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return (_decorators & C1_NEEDS_PATCHING) != 0 ? lir_patch_normal : lir_patch_none;
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}
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CodeEmitInfo*& ZLoadBarrierStubC1::patch_info() {
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return _patch_info;
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}
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address ZLoadBarrierStubC1::runtime_stub() const {
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return _runtime_stub;
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}
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void ZLoadBarrierStubC1::visit(LIR_OpVisitState* visitor) {
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if (_patch_info != NULL) {
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visitor->do_slow_case(_patch_info);
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} else {
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visitor->do_slow_case();
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}
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visitor->do_slow_case();
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visitor->do_input(_ref_addr);
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visitor->do_output(_ref);
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if (_tmp->is_valid()) {
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visitor->do_temp(_tmp);
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}
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@ -174,6 +159,14 @@ void ZBarrierSetC1::load_barrier(LIRAccess& access, LIR_Opr result) const {
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__ branch_destination(stub->continuation());
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}
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LIR_Opr ZBarrierSetC1::resolve_address(LIRAccess& access, bool resolve_in_register) {
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// We must resolve in register when patching. This is to avoid
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// having a patch area in the load barrier stub, since the call
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// into the runtime to patch will not have the proper oop map.
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const bool patch_before_barrier = barrier_needed(access) && (access.decorators() & C1_NEEDS_PATCHING) != 0;
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return BarrierSetC1::resolve_address(access, resolve_in_register || patch_before_barrier);
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}
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#undef __
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void ZBarrierSetC1::load_at_resolved(LIRAccess& access, LIR_Opr result) {
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015, 2018, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2015, 2019, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -32,12 +32,11 @@
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class ZLoadBarrierStubC1 : public CodeStub {
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private:
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DecoratorSet _decorators;
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LIR_Opr _ref_addr;
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LIR_Opr _ref;
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LIR_Opr _tmp;
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CodeEmitInfo* _patch_info;
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address _runtime_stub;
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DecoratorSet _decorators;
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LIR_Opr _ref_addr;
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LIR_Opr _ref;
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LIR_Opr _tmp;
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address _runtime_stub;
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public:
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ZLoadBarrierStubC1(LIRAccess& access, LIR_Opr ref, address runtime_stub);
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@ -46,8 +45,6 @@ public:
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LIR_Opr ref() const;
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LIR_Opr ref_addr() const;
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LIR_Opr tmp() const;
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LIR_PatchCode patch_code() const;
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CodeEmitInfo*& patch_info();
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address runtime_stub() const;
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virtual void emit_code(LIR_Assembler* ce);
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@ -67,6 +64,7 @@ private:
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void load_barrier(LIRAccess& access, LIR_Opr result) const;
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protected:
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virtual LIR_Opr resolve_address(LIRAccess& access, bool resolve_in_register);
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virtual void load_at_resolved(LIRAccess& access, LIR_Opr result);
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virtual LIR_Opr atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value);
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virtual LIR_Opr atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value);
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@ -39,8 +39,6 @@ compiler/compilercontrol/mixed/RandomValidCommandsTest.java 8181753 generi
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compiler/graalunit/JttThreadsTest.java 8208066 generic-all
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compiler/intrinsics/mathexact/LongMulOverflowTest.java 8217796 generic-all
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compiler/jvmci/SecurityRestrictionsTest.java 8181837 generic-all
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compiler/unsafe/UnsafeGetConstantField.java 8181833 generic-all
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@ -57,6 +57,10 @@ compiler/cpuflags/TestAESIntrinsicsOnSupportedConfig.java 8190680 generic-all
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compiler/runtime/Test8168712.java 8211769,8211771 generic-ppc64,generic-ppc64le,linux-s390x
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applications/ctw/modules/java_desktop.java 8217851 windows-all
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applications/ctw/modules/java_desktop_2.java 8217851 windows-all
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applications/ctw/modules/jdk_jconsole.java 8217851 windows-all
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#############################################################################
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# :hotspot_gc
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@ -63,7 +63,7 @@ public class UseCompressedOops {
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testCompressedOopsModes(args, "-XX:+UseParallelGC");
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testCompressedOopsModes(args, "-XX:+UseParallelOldGC");
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if (GC.Shenandoah.isSupported()) {
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testCompressedOopsModes(args, "-XX:+UseShenandoahGC");
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testCompressedOopsModes(args, "-XX:+UnlockExperimentalVMOptions", "-XX:+UseShenandoahGC");
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}
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}
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