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8270519: Move several vector helper methods to shared header file

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Reviewed-by: jiefu, njian
This commit is contained in:
Xiaohong Gong 2021-07-26 04:52:10 +00:00 committed by Jie Fu
parent e627caec84
commit e4295ccfcd
6 changed files with 423 additions and 435 deletions
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24
src/hotspot/cpu/aarch64/aarch64.ad
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@ -1295,30 +1295,6 @@ public:
};
};
static inline BasicType vector_element_basic_type(const MachNode* n) {
const TypeVect* vt = n->bottom_type()->is_vect();
return vt->element_basic_type();
}
static inline BasicType vector_element_basic_type(const MachNode* use, const MachOper* opnd) {
int def_idx = use->operand_index(opnd);
Node* def = use->in(def_idx);
const TypeVect* vt = def->bottom_type()->is_vect();
return vt->element_basic_type();
}
static inline uint vector_length(const MachNode* n) {
const TypeVect* vt = n->bottom_type()->is_vect();
return vt->length();
}
static inline uint vector_length(const MachNode* use, const MachOper* opnd) {
int def_idx = use->operand_index(opnd);
Node* def = use->in(def_idx);
const TypeVect* vt = def->bottom_type()->is_vect();
return vt->length();
}
bool is_CAS(int opcode, bool maybe_volatile);
// predicates controlling emit of ldr<x>/ldar<x> and associated dmb

6
src/hotspot/cpu/aarch64/aarch64_neon.ad
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@ -1850,7 +1850,7 @@ instruct vcmpD(vecD dst, vecD src1, vecD src2, immI cond)
format %{ "vcmpD $dst, $src1, $src2\t# vector compare " %}
ins_cost(INSN_COST);
ins_encode %{
BasicType bt = vector_element_basic_type(this);
BasicType bt = Matcher::vector_element_basic_type(this);
assert(type2aelembytes(bt) != 8, "not supported");
__ neon_compare(as_FloatRegister($dst$$reg), bt, as_FloatRegister($src1$$reg),
as_FloatRegister($src2$$reg), (int)$cond$$constant, /*isQ*/ false);
@ -1865,7 +1865,7 @@ instruct vcmpX(vecX dst, vecX src1, vecX src2, immI cond)
format %{ "vcmpX $dst, $src1, $src2\t# vector compare " %}
ins_cost(INSN_COST);
ins_encode %{
BasicType bt = vector_element_basic_type(this);
BasicType bt = Matcher::vector_element_basic_type(this);
__ neon_compare(as_FloatRegister($dst$$reg), bt, as_FloatRegister($src1$$reg),
as_FloatRegister($src2$$reg), (int)$cond$$constant, /*isQ*/ true);
%}
@ -5351,7 +5351,7 @@ instruct vmask_firsttrue_LT8B(iRegINoSp dst, vecD src, rFlagsReg cr) %{
__ rbit($dst$$Register, $dst$$Register);
__ clz($dst$$Register, $dst$$Register);
__ lsrw($dst$$Register, $dst$$Register, 3);
__ movw(rscratch1, vector_length(this, $src));
__ movw(rscratch1, Matcher::vector_length(this, $src));
__ cmpw($dst$$Register, rscratch1);
__ cselw($dst$$Register, rscratch1, $dst$$Register, Assembler::GE);
%}

8
src/hotspot/cpu/aarch64/aarch64_sve.ad
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@ -219,7 +219,7 @@ instruct loadV(vReg dst, vmemA mem) %{
ins_encode %{
FloatRegister dst_reg = as_FloatRegister($dst$$reg);
loadStoreA_predicate(C2_MacroAssembler(&cbuf), false, dst_reg, ptrue,
vector_element_basic_type(this), $mem->opcode(),
Matcher::vector_element_basic_type(this), $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
%}
ins_pipe(pipe_slow);
@ -233,7 +233,7 @@ instruct storeV(vReg src, vmemA mem) %{
ins_encode %{
FloatRegister src_reg = as_FloatRegister($src$$reg);
loadStoreA_predicate(C2_MacroAssembler(&cbuf), true, src_reg, ptrue,
vector_element_basic_type(this, $src), $mem->opcode(),
Matcher::vector_element_basic_type(this, $src), $mem->opcode(),
as_Register($mem$$base), $mem$$index, $mem$$scale, $mem$$disp);
%}
ins_pipe(pipe_slow);
@ -538,7 +538,7 @@ instruct vmin(vReg dst_src1, vReg src2) %{
ins_cost(SVE_COST);
format %{ "sve_min $dst_src1, $dst_src1, $src2\t # vector (sve)" %}
ins_encode %{
BasicType bt = vector_element_basic_type(this);
BasicType bt = Matcher::vector_element_basic_type(this);
Assembler::SIMD_RegVariant size = elemType_to_regVariant(bt);
if (is_floating_point_type(bt)) {
__ sve_fmin(as_FloatRegister($dst_src1$$reg), size,
@ -558,7 +558,7 @@ instruct vmax(vReg dst_src1, vReg src2) %{
ins_cost(SVE_COST);
format %{ "sve_max $dst_src1, $dst_src1, $src2\t # vector (sve)" %}
ins_encode %{
BasicType bt = vector_element_basic_type(this);
BasicType bt = Matcher::vector_element_basic_type(this);
Assembler::SIMD_RegVariant size = elemType_to_regVariant(bt);
if (is_floating_point_type(bt)) {
__ sve_fmax(as_FloatRegister($dst_src1$$reg), size,

775
src/hotspot/cpu/x86/x86.ad
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File diff suppressed because it is too large Load Diff

33
src/hotspot/share/opto/matcher.cpp
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@ -2686,6 +2686,39 @@ void Matcher::specialize_generic_vector_operands() {
}
}
uint Matcher::vector_length(const Node* n) {
const TypeVect* vt = n->bottom_type()->is_vect();
return vt->length();
}
uint Matcher::vector_length(const MachNode* use, const MachOper* opnd) {
int def_idx = use->operand_index(opnd);
Node* def = use->in(def_idx);
return def->bottom_type()->is_vect()->length();
}
uint Matcher::vector_length_in_bytes(const Node* n) {
const TypeVect* vt = n->bottom_type()->is_vect();
return vt->length_in_bytes();
}
uint Matcher::vector_length_in_bytes(const MachNode* use, const MachOper* opnd) {
uint def_idx = use->operand_index(opnd);
Node* def = use->in(def_idx);
return def->bottom_type()->is_vect()->length_in_bytes();
}
BasicType Matcher::vector_element_basic_type(const Node* n) {
const TypeVect* vt = n->bottom_type()->is_vect();
return vt->element_basic_type();
}
BasicType Matcher::vector_element_basic_type(const MachNode* use, const MachOper* opnd) {
int def_idx = use->operand_index(opnd);
Node* def = use->in(def_idx);
return def->bottom_type()->is_vect()->element_basic_type();
}
#ifdef ASSERT
bool Matcher::verify_after_postselect_cleanup() {
assert(!C->failing(), "sanity");

12
src/hotspot/share/opto/matcher.hpp
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@ -349,6 +349,18 @@ public:
// Vector ideal reg
static const uint vector_ideal_reg(int len);
// Vector length
static uint vector_length(const Node* n);
static uint vector_length(const MachNode* use, const MachOper* opnd);
// Vector length in bytes
static uint vector_length_in_bytes(const Node* n);
static uint vector_length_in_bytes(const MachNode* use, const MachOper* opnd);
// Vector element basic type
static BasicType vector_element_basic_type(const Node* n);
static BasicType vector_element_basic_type(const MachNode* use, const MachOper* opnd);
// These calls are all generated by the ADLC
// Java-Java calling convention