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8384520: AArch64: Prevent out-of-CodeBuffer read in MacroAssembler::membar
Reviewed-by: shade, aseoane
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parent
32d3559925
commit
f480e95774
@ -2687,10 +2687,11 @@ void MacroAssembler::membar(Membar_mask_bits order_constraint) {
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BLOCK_COMMENT("merged membar");
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return;
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} else {
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// A special case like "DMB ST;DMB LD;DMB ST", the last DMB can be skipped
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// We need check the last 2 instructions
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// A special case like "DMB ST;DMB LD;DMB ST", the last DMB can be skipped.
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// We need to check the second-to-last instruction, only if it is inside
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// the current code section.
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address prev2 = prev - NativeMembar::instruction_size;
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if (last != code()->last_label() && nativeInstruction_at(prev2)->is_Membar()) {
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if (prev2 >= begin() && last != code()->last_label() && nativeInstruction_at(prev2)->is_Membar()) {
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NativeMembar *bar2 = NativeMembar_at(prev2);
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assert(bar2->get_kind() == order_constraint, "it should be merged before");
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BLOCK_COMMENT("merged membar(elided)");
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2024, 2025, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2024, 2026, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2020, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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@ -157,6 +157,35 @@ void test_merge_dmb() {
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BufferBlob::free(b);
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}
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void test_merge_dmb_does_not_cross_section_start() {
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unsigned int insns[12] = {};
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// Add a StoreStore membar just before the start of the CodeBuffer's
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// instruction section to see that it doesn't affect any merging decisions
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// inside the code buffer.
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insns[0] = test_encode_dmb_st;
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unsigned int* insns_actual = (insns + 1);
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CodeBuffer code((address)insns_actual, sizeof(insns) - sizeof(insns[0]));
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MacroAssembler _masm(&code);
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{
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__ membar(Assembler::Membar_mask_bits::LoadStore);
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__ membar(Assembler::Membar_mask_bits::StoreStore);
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}
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asm_dump(code.insts()->start(), code.insts()->end());
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// The last StoreStore in the CodeBuffer should not have been removed.
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static const unsigned int insns_expected[] = {
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test_encode_dmb_ld,
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test_encode_dmb_st,
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};
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EXPECT_EQ(code.insts()->size(), (CodeSection::csize_t)(sizeof(insns_expected)));
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asm_check((const unsigned int *)code.insts()->start(), insns_expected, sizeof(insns_expected) / sizeof(insns_expected[0]));
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}
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TEST_VM(AssemblerAArch64, merge_dmb_1) {
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FlagSetting fs(AlwaysMergeDMB, true);
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test_merge_dmb();
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@ -167,6 +196,11 @@ TEST_VM(AssemblerAArch64, merge_dmb_2) {
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test_merge_dmb();
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}
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TEST_VM(AssemblerAArch64, merge_dmb_does_not_cross_section_start) {
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FlagSetting fs(AlwaysMergeDMB, false);
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test_merge_dmb_does_not_cross_section_start();
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}
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TEST_VM(AssemblerAArch64, merge_dmb_block_by_label) {
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BufferBlob* b = BufferBlob::create("aarch64Test", 400);
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CodeBuffer code(b);
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