From fe70e7484f9a4adcc1e0fcd16b04884d1cc2b0d3 Mon Sep 17 00:00:00 2001
From: Aleksey Shipilev <aleksey@shipilev.net>
Date: Tue, 9 Jun 2026 11:40:39 +0200
Subject: [PATCH] Fix

---
 .../shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp | 9 +++------
 .../gc/shenandoah/shenandoahBarrierSetAssembler_ppc.cpp  | 9 +++------
 .../shenandoah/shenandoahBarrierSetAssembler_riscv.cpp   | 9 +++------
 3 files changed, 9 insertions(+), 18 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp
index 7731290c801..c590b6699c0 100644
--- a/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp
@@ -976,12 +976,9 @@ void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm) {
     if (c_rarg0 == _obj) {
       __ lea(c_rarg1, _addr);
     } else if (c_rarg1 == _obj) {
-      // Set up arguments in reverse, and then flip them
-      __ lea(c_rarg0, _addr);
-      // flip them
-      __ mov(_tmp1, c_rarg0);
-      __ mov(c_rarg0, c_rarg1);
-      __ mov(c_rarg1, _tmp1);
+      __ mov(_tmp1, c_rarg1);
+      __ lea(c_rarg1, _addr);
+      __ mov(c_rarg0, _tmp1);
     } else {
       assert_different_registers(c_rarg1, _obj);
       __ lea(c_rarg1, _addr);
diff --git a/src/hotspot/cpu/ppc/gc/shenandoah/shenandoahBarrierSetAssembler_ppc.cpp b/src/hotspot/cpu/ppc/gc/shenandoah/shenandoahBarrierSetAssembler_ppc.cpp
index 823ff175379..582327282fd 100644
--- a/src/hotspot/cpu/ppc/gc/shenandoah/shenandoahBarrierSetAssembler_ppc.cpp
+++ b/src/hotspot/cpu/ppc/gc/shenandoah/shenandoahBarrierSetAssembler_ppc.cpp
@@ -1210,12 +1210,9 @@ void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm) {
     if (c_rarg0 == _obj) {
       __ addi(c_rarg1, _addr.base(), _addr.disp());
     } else if (c_rarg1 == _obj) {
-      // Set up arguments in reverse, and then flip them
-      __ addi(c_rarg0, _addr.base(), _addr.disp());
-      // flip them
-      __ mr(_tmp1, c_rarg0);
-      __ mr(c_rarg0, c_rarg1);
-      __ mr(c_rarg1, _tmp1);
+      __ mr(_tmp1, c_rarg1);
+      __ addi(c_rarg1, _addr.base(), _addr.disp());
+      __ mr(c_rarg0, _tmp1);
     } else {
       assert_different_registers(c_rarg1, _obj);
       __ addi(c_rarg1, _addr.base(), _addr.disp());
diff --git a/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp b/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp
index d30592d68f1..eec5f9a5165 100644
--- a/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp
+++ b/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp
@@ -912,12 +912,9 @@ void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm) {
     if (c_rarg0 == _obj) {
       __ la(c_rarg1, _addr);
     } else if (c_rarg1 == _obj) {
-      // Set up arguments in reverse, and then flip them
-      __ la(c_rarg0, _addr);
-      // flip them
-      __ mv(_tmp1, c_rarg0);
-      __ mv(c_rarg0, c_rarg1);
-      __ mv(c_rarg1, _tmp1);
+      __ mv(_tmp1, c_rarg1);
+      __ la(c_rarg1, _addr);
+      __ mv(c_rarg0, _tmp1);
     } else {
       assert_different_registers(c_rarg1, _obj);
       __ la(c_rarg1, _addr);