7 Commits

Author SHA1 Message Date
Anjian-Wen
5c067232bf 8355074: RISC-V: C2: Support Vector-Scalar version of Zvbb Vector And-Not instruction
Reviewed-by: fjiang, fyang
2025-04-25 12:50:12 +00:00
Anjian-Wen
07aad68c17 8329887: RISC-V: C2: Support Zvbb Vector And-Not instruction
Reviewed-by: fyang, fjiang
2025-04-17 02:16:24 +00:00
Christian Hagedorn
f829b5a73f 8280378: [IR Framework] Support IR matching for different compile phases
Reviewed-by: kvn, rcastanedalo
2022-11-01 15:41:09 +00:00
Pengfei Li
f2f0cd86bf 8292511: AArch64: Align CPU feature name for NEON with hwcap
Reviewed-by: aph, njian
2022-08-19 09:09:18 +00:00
Hao Sun
0cc66aeae8 8285790: AArch64: Merge C2 NEON and SVE matching rules
Co-authored-by: Ningsheng Jian <njian@openjdk.org>
Co-authored-by: Eric Liu <eliu@openjdk.org>
Reviewed-by: adinn, aph, xgong
2022-08-17 03:51:46 +00:00
Hao Sun
16a127524c 8290943: Fix several IR test issues on SVE after JDK-8289801
Reviewed-by: jiefu, adinn
2022-07-27 23:42:11 +00:00
Xiaohong Gong
1305fb5ca8 8287984: AArch64: [vector] Make all bits set vector sharable for match rules
Reviewed-by: kvn, ngasson
2022-06-30 08:53:27 +00:00