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133 lines
3.4 KiB
C++
133 lines
3.4 KiB
C++
/*
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* Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "asm/macroAssembler.hpp"
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#include "runtime/flags/flagSetting.hpp"
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#include "runtime/globals_extension.hpp"
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#include "runtime/icache.hpp"
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#define __ _masm->
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void x86_generate_icache_fence(MacroAssembler* _masm) {
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switch (X86ICacheSync) {
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case 0:
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break;
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case 1:
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__ mfence();
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break;
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case 2:
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case 3:
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__ sfence();
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break;
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case 4:
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__ push_ppx(rax);
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__ push_ppx(rbx);
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__ push_ppx(rcx);
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__ push_ppx(rdx);
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__ xorptr(rax, rax);
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__ cpuid();
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__ pop_ppx(rdx);
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__ pop_ppx(rcx);
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__ pop_ppx(rbx);
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__ pop_ppx(rax);
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break;
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case 5:
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__ serialize();
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break;
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default:
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ShouldNotReachHere();
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}
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}
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void x86_generate_icache_flush_insn(MacroAssembler* _masm, Register addr) {
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switch (X86ICacheSync) {
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case 1:
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__ clflush(Address(addr, 0));
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break;
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case 2:
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__ clflushopt(Address(addr, 0));
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break;
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case 3:
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__ clwb(Address(addr, 0));
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break;
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default:
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ShouldNotReachHere();
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}
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}
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void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
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StubCodeMark mark(this, "ICache", _stub_name);
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address start = __ pc();
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const Register addr = c_rarg0;
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const Register lines = c_rarg1;
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const Register magic = c_rarg2;
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Label flush_line, done;
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__ testl(lines, lines);
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__ jccb(Assembler::zero, done);
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x86_generate_icache_fence(_masm);
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if (1 <= X86ICacheSync && X86ICacheSync <= 3) {
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__ bind(flush_line);
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x86_generate_icache_flush_insn(_masm, addr);
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__ addptr(addr, ICache::line_size);
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__ decrementl(lines);
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__ jccb(Assembler::notZero, flush_line);
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x86_generate_icache_fence(_masm);
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}
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__ bind(done);
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__ movptr(rax, magic); // Handshake with caller to make sure it happened!
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__ ret(0);
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// Must be set here so StubCodeMark destructor can call the flush stub.
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*flush_icache_stub = (ICache::flush_icache_stub_t)start;
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}
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void ICache::initialize(int phase) {
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switch (phase) {
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case 1: {
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// Initial phase, we assume only CLFLUSH is available.
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IntFlagSetting fs(X86ICacheSync, 1);
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AbstractICache::initialize(phase);
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break;
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}
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case 2: {
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// Final phase, generate the stub again.
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AbstractICache::initialize(phase);
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break;
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}
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default:
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ShouldNotReachHere();
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}
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}
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#undef __
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