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745 lines
25 KiB
C++
745 lines
25 KiB
C++
/*
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* Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2015, 2020, Red Hat Inc. All rights reserved.
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* Copyright 2025 Arm Limited and/or its affiliates.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "pauth_aarch64.hpp"
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#include "register_aarch64.hpp"
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#include "runtime/arguments.hpp"
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#include "runtime/globals_extension.hpp"
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#include "runtime/java.hpp"
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#include "runtime/os.inline.hpp"
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#include "runtime/vm_version.hpp"
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#include "utilities/formatBuffer.hpp"
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#include "utilities/macros.hpp"
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#include "utilities/ostream.hpp"
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int VM_Version::_cpu;
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int VM_Version::_model;
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int VM_Version::_model2;
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int VM_Version::_variant;
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int VM_Version::_revision;
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int VM_Version::_stepping;
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int VM_Version::_zva_length;
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int VM_Version::_dcache_line_size;
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int VM_Version::_icache_line_size;
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int VM_Version::_initial_sve_vector_length;
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int VM_Version::_max_supported_sve_vector_length;
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bool VM_Version::_rop_protection;
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uintptr_t VM_Version::_pac_mask;
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SpinWait VM_Version::_spin_wait;
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const char* VM_Version::_features_names[MAX_CPU_FEATURES] = { nullptr };
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static SpinWait get_spin_wait_desc() {
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SpinWait spin_wait(OnSpinWaitInst, OnSpinWaitInstCount);
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if (spin_wait.inst() == SpinWait::SB && !VM_Version::supports_sb()) {
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vm_exit_during_initialization("OnSpinWaitInst is SB but current CPU does not support SB instruction");
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}
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return spin_wait;
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}
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void VM_Version::initialize() {
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#define SET_CPU_FEATURE_NAME(id, name, bit) \
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_features_names[bit] = XSTR(name);
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CPU_FEATURE_FLAGS(SET_CPU_FEATURE_NAME)
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#undef SET_CPU_FEATURE_NAME
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_supports_atomic_getset4 = true;
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_supports_atomic_getadd4 = true;
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_supports_atomic_getset8 = true;
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_supports_atomic_getadd8 = true;
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get_os_cpu_info();
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int dcache_line = VM_Version::dcache_line_size();
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// Limit AllocatePrefetchDistance so that it does not exceed the
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// static constraint of 512 defined in runtime/globals.hpp.
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if (FLAG_IS_DEFAULT(AllocatePrefetchDistance))
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FLAG_SET_DEFAULT(AllocatePrefetchDistance, MIN2(512, 3*dcache_line));
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if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize))
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FLAG_SET_DEFAULT(AllocatePrefetchStepSize, dcache_line);
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if (FLAG_IS_DEFAULT(PrefetchScanIntervalInBytes))
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FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 3*dcache_line);
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if (FLAG_IS_DEFAULT(PrefetchCopyIntervalInBytes))
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FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 3*dcache_line);
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if (FLAG_IS_DEFAULT(SoftwarePrefetchHintDistance))
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FLAG_SET_DEFAULT(SoftwarePrefetchHintDistance, 3*dcache_line);
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if (PrefetchCopyIntervalInBytes != -1 &&
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((PrefetchCopyIntervalInBytes & 7) || (PrefetchCopyIntervalInBytes >= 32768))) {
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warning("PrefetchCopyIntervalInBytes must be -1, or a multiple of 8 and < 32768");
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PrefetchCopyIntervalInBytes &= ~7;
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if (PrefetchCopyIntervalInBytes >= 32768)
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PrefetchCopyIntervalInBytes = 32760;
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}
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if (AllocatePrefetchDistance != -1 && (AllocatePrefetchDistance & 7)) {
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warning("AllocatePrefetchDistance must be multiple of 8");
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AllocatePrefetchDistance &= ~7;
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}
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if (AllocatePrefetchStepSize & 7) {
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warning("AllocatePrefetchStepSize must be multiple of 8");
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AllocatePrefetchStepSize &= ~7;
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}
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if (SoftwarePrefetchHintDistance != -1 &&
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(SoftwarePrefetchHintDistance & 7)) {
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warning("SoftwarePrefetchHintDistance must be -1, or a multiple of 8");
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SoftwarePrefetchHintDistance &= ~7;
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}
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if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (dcache_line > ContendedPaddingWidth)) {
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ContendedPaddingWidth = dcache_line;
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}
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if (os::supports_map_sync()) {
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// if dcpop is available publish data cache line flush size via
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// generic field, otherwise let if default to zero thereby
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// disabling writeback
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if (VM_Version::supports_dcpop()) {
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_data_cache_line_flush_size = dcache_line;
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}
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}
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// Enable vendor specific features
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// Ampere eMAG
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if (_cpu == CPU_AMCC && (_model == CPU_MODEL_EMAG) && (_variant == 0x3)) {
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if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
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FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
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}
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if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
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FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
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}
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if (FLAG_IS_DEFAULT(UseSIMDForArrayEquals)) {
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FLAG_SET_DEFAULT(UseSIMDForArrayEquals, !(_revision == 1 || _revision == 2));
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}
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}
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// Ampere CPUs
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if (_cpu == CPU_AMPERE && ((_model == CPU_MODEL_AMPERE_1) ||
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(_model == CPU_MODEL_AMPERE_1A) ||
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(_model == CPU_MODEL_AMPERE_1B))) {
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if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
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FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
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}
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if (FLAG_IS_DEFAULT(OnSpinWaitInst)) {
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FLAG_SET_DEFAULT(OnSpinWaitInst, "isb");
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}
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if (FLAG_IS_DEFAULT(OnSpinWaitInstCount)) {
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FLAG_SET_DEFAULT(OnSpinWaitInstCount, 2);
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}
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if (FLAG_IS_DEFAULT(CodeEntryAlignment) &&
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(_model == CPU_MODEL_AMPERE_1A || _model == CPU_MODEL_AMPERE_1B)) {
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FLAG_SET_DEFAULT(CodeEntryAlignment, 32);
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}
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if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) {
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FLAG_SET_DEFAULT(AlwaysMergeDMB, false);
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}
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}
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// ThunderX
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if (_cpu == CPU_CAVIUM && (_model == 0xA1)) {
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guarantee(_variant != 0, "Pre-release hardware no longer supported.");
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if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
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FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
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}
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if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
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FLAG_SET_DEFAULT(UseSIMDForMemoryOps, (_variant > 0));
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}
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if (FLAG_IS_DEFAULT(UseSIMDForArrayEquals)) {
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FLAG_SET_DEFAULT(UseSIMDForArrayEquals, false);
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}
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}
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// ThunderX2
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if ((_cpu == CPU_CAVIUM && (_model == 0xAF)) ||
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(_cpu == CPU_BROADCOM && (_model == 0x516))) {
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if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
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FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
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}
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if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
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FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
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}
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}
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// HiSilicon TSV110
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if (_cpu == CPU_HISILICON && _model == 0xd01) {
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if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
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FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
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}
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if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
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FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
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}
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}
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if (_cpu == CPU_ARM && model_is(CPU_MODEL_ARM_CORTEX_A53)) {
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set_feature(CPU_A53MAC);
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if (FLAG_IS_DEFAULT(UseSIMDForArrayEquals)) {
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FLAG_SET_DEFAULT(UseSIMDForArrayEquals, false);
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}
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}
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if (_cpu == CPU_ARM && model_is(CPU_MODEL_ARM_CORTEX_A73)) {
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if (FLAG_IS_DEFAULT(SoftwarePrefetchHintDistance)) {
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FLAG_SET_DEFAULT(SoftwarePrefetchHintDistance, -1);
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}
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// A73 is faster with short-and-easy-for-speculative-execution-loop
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if (FLAG_IS_DEFAULT(UseSimpleArrayEquals)) {
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FLAG_SET_DEFAULT(UseSimpleArrayEquals, true);
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}
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}
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if (_cpu == CPU_ARM &&
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model_is_in({ CPU_MODEL_ARM_NEOVERSE_N1, CPU_MODEL_ARM_NEOVERSE_V1,
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CPU_MODEL_ARM_NEOVERSE_N2, CPU_MODEL_ARM_NEOVERSE_V2,
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CPU_MODEL_ARM_NEOVERSE_N3, CPU_MODEL_ARM_NEOVERSE_V3,
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CPU_MODEL_ARM_NEOVERSE_V3AE })) {
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if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
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FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
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}
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if (FLAG_IS_DEFAULT(OnSpinWaitInst)) {
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FLAG_SET_DEFAULT(OnSpinWaitInst, "isb");
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}
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if (FLAG_IS_DEFAULT(OnSpinWaitInstCount)) {
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FLAG_SET_DEFAULT(OnSpinWaitInstCount, 1);
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}
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if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) {
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FLAG_SET_DEFAULT(AlwaysMergeDMB, false);
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}
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}
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if (supports_feature(CPU_FP) || supports_feature(CPU_ASIMD)) {
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if (FLAG_IS_DEFAULT(UseSignumIntrinsic)) {
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FLAG_SET_DEFAULT(UseSignumIntrinsic, true);
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}
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}
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if (FLAG_IS_DEFAULT(UseCRC32)) {
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UseCRC32 = VM_Version::supports_crc32();
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}
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if (UseCRC32 && !VM_Version::supports_crc32()) {
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warning("UseCRC32 specified, but not supported on this CPU");
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FLAG_SET_DEFAULT(UseCRC32, false);
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}
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if (_cpu == CPU_ARM &&
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model_is_in({ CPU_MODEL_ARM_NEOVERSE_V1, CPU_MODEL_ARM_NEOVERSE_V2,
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CPU_MODEL_ARM_NEOVERSE_V3, CPU_MODEL_ARM_NEOVERSE_V3AE })) {
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if (FLAG_IS_DEFAULT(UseCryptoPmullForCRC32)) {
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FLAG_SET_DEFAULT(UseCryptoPmullForCRC32, true);
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}
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if (FLAG_IS_DEFAULT(CodeEntryAlignment)) {
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FLAG_SET_DEFAULT(CodeEntryAlignment, 32);
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}
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}
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if (UseCryptoPmullForCRC32 && (!VM_Version::supports_pmull() || !VM_Version::supports_sha3() || !VM_Version::supports_crc32())) {
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warning("UseCryptoPmullForCRC32 specified, but not supported on this CPU");
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FLAG_SET_DEFAULT(UseCryptoPmullForCRC32, false);
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}
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if (FLAG_IS_DEFAULT(UseAdler32Intrinsics)) {
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FLAG_SET_DEFAULT(UseAdler32Intrinsics, true);
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}
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if (UseVectorizedMismatchIntrinsic) {
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warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU.");
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FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false);
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}
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if (VM_Version::supports_lse()) {
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if (FLAG_IS_DEFAULT(UseLSE))
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FLAG_SET_DEFAULT(UseLSE, true);
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} else {
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if (UseLSE) {
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warning("UseLSE specified, but not supported on this CPU");
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FLAG_SET_DEFAULT(UseLSE, false);
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}
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}
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if (VM_Version::supports_aes()) {
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UseAES = UseAES || FLAG_IS_DEFAULT(UseAES);
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UseAESIntrinsics =
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UseAESIntrinsics || (UseAES && FLAG_IS_DEFAULT(UseAESIntrinsics));
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if (UseAESIntrinsics && !UseAES) {
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warning("UseAESIntrinsics enabled, but UseAES not, enabling");
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UseAES = true;
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}
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if (FLAG_IS_DEFAULT(UseAESCTRIntrinsics)) {
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, true);
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}
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} else {
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if (UseAES) {
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warning("AES instructions are not available on this CPU");
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FLAG_SET_DEFAULT(UseAES, false);
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}
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if (UseAESIntrinsics) {
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warning("AES intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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if (UseAESCTRIntrinsics) {
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warning("AES/CTR intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
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}
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}
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if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
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UseCRC32Intrinsics = true;
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}
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if (VM_Version::supports_crc32()) {
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if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
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FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
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}
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} else if (UseCRC32CIntrinsics) {
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warning("CRC32C is not available on the CPU");
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FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
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}
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if (FLAG_IS_DEFAULT(UseFMA)) {
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FLAG_SET_DEFAULT(UseFMA, true);
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}
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if (FLAG_IS_DEFAULT(UseMD5Intrinsics)) {
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UseMD5Intrinsics = true;
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}
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if (VM_Version::supports_sha1() || VM_Version::supports_sha256() ||
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VM_Version::supports_sha3() || VM_Version::supports_sha512()) {
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if (FLAG_IS_DEFAULT(UseSHA)) {
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FLAG_SET_DEFAULT(UseSHA, true);
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}
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} else if (UseSHA) {
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warning("SHA instructions are not available on this CPU");
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FLAG_SET_DEFAULT(UseSHA, false);
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}
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if (UseSHA && VM_Version::supports_sha1()) {
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if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
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}
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} else if (UseSHA1Intrinsics) {
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warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
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}
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if (UseSHA && VM_Version::supports_sha256()) {
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if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
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}
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} else if (UseSHA256Intrinsics) {
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warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
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}
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if (UseSHA && VM_Version::supports_sha3()) {
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// Auto-enable UseSHA3Intrinsics on hardware with performance benefit.
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// Note that the evaluation of UseSHA3Intrinsics shows better performance
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// on Apple and Qualcomm silicon but worse performance on Neoverse V1 and N2.
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if (_cpu == CPU_APPLE || _cpu == CPU_QUALCOMM) { // Apple or Qualcomm silicon
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if (FLAG_IS_DEFAULT(UseSHA3Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA3Intrinsics, true);
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}
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}
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} else if (UseSHA3Intrinsics && UseSIMDForSHA3Intrinsic) {
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warning("Intrinsics for SHA3-224, SHA3-256, SHA3-384 and SHA3-512 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA3Intrinsics, false);
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}
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if (UseSHA && VM_Version::supports_sha512()) {
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if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
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}
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} else if (UseSHA512Intrinsics) {
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warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
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}
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if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA3Intrinsics || UseSHA512Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA, false);
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}
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if (VM_Version::supports_pmull()) {
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if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
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FLAG_SET_DEFAULT(UseGHASHIntrinsics, true);
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}
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} else if (UseGHASHIntrinsics) {
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warning("GHASH intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
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}
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if (supports_feature(CPU_ASIMD)) {
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if (FLAG_IS_DEFAULT(UseChaCha20Intrinsics)) {
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UseChaCha20Intrinsics = true;
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}
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} else if (UseChaCha20Intrinsics) {
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if (!FLAG_IS_DEFAULT(UseChaCha20Intrinsics)) {
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warning("ChaCha20 intrinsic requires ASIMD instructions");
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}
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FLAG_SET_DEFAULT(UseChaCha20Intrinsics, false);
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}
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if (supports_feature(CPU_ASIMD)) {
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if (FLAG_IS_DEFAULT(UseKyberIntrinsics)) {
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UseKyberIntrinsics = true;
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}
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} else if (UseKyberIntrinsics) {
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if (!FLAG_IS_DEFAULT(UseKyberIntrinsics)) {
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warning("Kyber intrinsics require ASIMD instructions");
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}
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FLAG_SET_DEFAULT(UseKyberIntrinsics, false);
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}
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if (supports_feature(CPU_ASIMD)) {
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if (FLAG_IS_DEFAULT(UseDilithiumIntrinsics)) {
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UseDilithiumIntrinsics = true;
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}
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} else if (UseDilithiumIntrinsics) {
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if (!FLAG_IS_DEFAULT(UseDilithiumIntrinsics)) {
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warning("Dilithium intrinsics require ASIMD instructions");
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}
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FLAG_SET_DEFAULT(UseDilithiumIntrinsics, false);
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}
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if (FLAG_IS_DEFAULT(UseBASE64Intrinsics)) {
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UseBASE64Intrinsics = true;
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}
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if (is_zva_enabled()) {
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if (FLAG_IS_DEFAULT(UseBlockZeroing)) {
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FLAG_SET_DEFAULT(UseBlockZeroing, true);
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}
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if (FLAG_IS_DEFAULT(BlockZeroingLowLimit)) {
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FLAG_SET_DEFAULT(BlockZeroingLowLimit, 4 * VM_Version::zva_length());
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}
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} else if (UseBlockZeroing) {
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warning("DC ZVA is not available on this CPU");
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FLAG_SET_DEFAULT(UseBlockZeroing, false);
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}
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if (VM_Version::supports_sve2()) {
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if (FLAG_IS_DEFAULT(UseSVE)) {
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FLAG_SET_DEFAULT(UseSVE, 2);
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}
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} else if (VM_Version::supports_sve()) {
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if (FLAG_IS_DEFAULT(UseSVE)) {
|
|
FLAG_SET_DEFAULT(UseSVE, 1);
|
|
} else if (UseSVE > 1) {
|
|
warning("SVE2 specified, but not supported on current CPU. Using SVE.");
|
|
FLAG_SET_DEFAULT(UseSVE, 1);
|
|
}
|
|
} else if (UseSVE > 0) {
|
|
warning("UseSVE specified, but not supported on current CPU. Disabling SVE.");
|
|
FLAG_SET_DEFAULT(UseSVE, 0);
|
|
}
|
|
|
|
if (UseSVE > 0) {
|
|
int vl = get_current_sve_vector_length();
|
|
if (vl < 0) {
|
|
warning("Unable to get SVE vector length on this system. "
|
|
"Disabling SVE. Specify -XX:UseSVE=0 to shun this warning.");
|
|
FLAG_SET_DEFAULT(UseSVE, 0);
|
|
} else if ((vl == 0) || ((vl % FloatRegister::sve_vl_min) != 0) || !is_power_of_2(vl)) {
|
|
warning("Detected SVE vector length (%d) should be a power of two and a multiple of %d. "
|
|
"Disabling SVE. Specify -XX:UseSVE=0 to shun this warning.",
|
|
vl, FloatRegister::sve_vl_min);
|
|
FLAG_SET_DEFAULT(UseSVE, 0);
|
|
} else {
|
|
_initial_sve_vector_length = vl;
|
|
}
|
|
}
|
|
|
|
// This machine allows unaligned memory accesses
|
|
if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
|
|
FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
|
|
FLAG_SET_DEFAULT(UsePopCountInstruction, true);
|
|
}
|
|
|
|
if (!UsePopCountInstruction) {
|
|
warning("UsePopCountInstruction is always enabled on this CPU");
|
|
UsePopCountInstruction = true;
|
|
}
|
|
|
|
if (UseBranchProtection == nullptr || strcmp(UseBranchProtection, "none") == 0) {
|
|
_rop_protection = false;
|
|
} else if (strcmp(UseBranchProtection, "standard") == 0 ||
|
|
strcmp(UseBranchProtection, "pac-ret") == 0) {
|
|
_rop_protection = false;
|
|
// Enable ROP-protection if
|
|
// 1) this code has been built with branch-protection and
|
|
// 2) the CPU/OS supports it
|
|
#ifdef __ARM_FEATURE_PAC_DEFAULT
|
|
if (!VM_Version::supports_paca()) {
|
|
// Disable PAC to prevent illegal instruction crashes.
|
|
warning("ROP-protection specified, but not supported on this CPU. Disabling ROP-protection.");
|
|
} else {
|
|
_rop_protection = true;
|
|
}
|
|
#else
|
|
warning("ROP-protection specified, but this VM was built without ROP-protection support. Disabling ROP-protection.");
|
|
#endif
|
|
} else {
|
|
vm_exit_during_initialization(err_msg("Unsupported UseBranchProtection: %s", UseBranchProtection));
|
|
}
|
|
|
|
if (_rop_protection == true) {
|
|
// Determine the mask of address bits used for PAC. Clear bit 55 of
|
|
// the input to make it look like a user address.
|
|
_pac_mask = (uintptr_t)pauth_strip_pointer((address)~(UINT64_C(1) << 55));
|
|
}
|
|
|
|
#ifdef COMPILER2
|
|
if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
|
|
UseMultiplyToLenIntrinsic = true;
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(UseSquareToLenIntrinsic)) {
|
|
UseSquareToLenIntrinsic = true;
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(UseMulAddIntrinsic)) {
|
|
UseMulAddIntrinsic = true;
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
|
|
UseMontgomeryMultiplyIntrinsic = true;
|
|
}
|
|
if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
|
|
UseMontgomerySquareIntrinsic = true;
|
|
}
|
|
|
|
if (UseSVE > 0) {
|
|
if (FLAG_IS_DEFAULT(MaxVectorSize)) {
|
|
MaxVectorSize = _initial_sve_vector_length;
|
|
} else if (MaxVectorSize < FloatRegister::sve_vl_min) {
|
|
warning("SVE does not support vector length less than %d bytes. Disabling SVE.",
|
|
FloatRegister::sve_vl_min);
|
|
UseSVE = 0;
|
|
} else if (!((MaxVectorSize % FloatRegister::sve_vl_min) == 0 && is_power_of_2(MaxVectorSize))) {
|
|
vm_exit_during_initialization(err_msg("Unsupported MaxVectorSize: %d", (int)MaxVectorSize));
|
|
}
|
|
|
|
if (UseSVE > 0) {
|
|
// Acquire the largest supported vector length of this machine
|
|
_max_supported_sve_vector_length = set_and_get_current_sve_vector_length(FloatRegister::sve_vl_max);
|
|
|
|
if (MaxVectorSize != _max_supported_sve_vector_length) {
|
|
int new_vl = set_and_get_current_sve_vector_length(MaxVectorSize);
|
|
if (new_vl < 0) {
|
|
vm_exit_during_initialization(
|
|
err_msg("Current system does not support SVE vector length for MaxVectorSize: %d",
|
|
(int)MaxVectorSize));
|
|
} else if (new_vl != MaxVectorSize) {
|
|
warning("Current system only supports max SVE vector length %d. Set MaxVectorSize to %d",
|
|
new_vl, new_vl);
|
|
}
|
|
MaxVectorSize = new_vl;
|
|
}
|
|
_initial_sve_vector_length = MaxVectorSize;
|
|
}
|
|
}
|
|
|
|
if (UseSVE == 0) { // NEON
|
|
int min_vector_size = 8;
|
|
int max_vector_size = FloatRegister::neon_vl;
|
|
if (!FLAG_IS_DEFAULT(MaxVectorSize)) {
|
|
if (!is_power_of_2(MaxVectorSize)) {
|
|
vm_exit_during_initialization(err_msg("Unsupported MaxVectorSize: %d", (int)MaxVectorSize));
|
|
} else if (MaxVectorSize < min_vector_size) {
|
|
warning("MaxVectorSize must be at least %i on this platform", min_vector_size);
|
|
FLAG_SET_DEFAULT(MaxVectorSize, min_vector_size);
|
|
} else if (MaxVectorSize > max_vector_size) {
|
|
warning("MaxVectorSize must be at most %i on this platform", max_vector_size);
|
|
FLAG_SET_DEFAULT(MaxVectorSize, max_vector_size);
|
|
}
|
|
} else {
|
|
FLAG_SET_DEFAULT(MaxVectorSize, FloatRegister::neon_vl);
|
|
}
|
|
}
|
|
|
|
int inline_size = (UseSVE > 0 && MaxVectorSize >= FloatRegister::sve_vl_min) ? MaxVectorSize : 0;
|
|
if (FLAG_IS_DEFAULT(ArrayOperationPartialInlineSize)) {
|
|
FLAG_SET_DEFAULT(ArrayOperationPartialInlineSize, inline_size);
|
|
} else if (ArrayOperationPartialInlineSize != 0 && ArrayOperationPartialInlineSize != inline_size) {
|
|
warning("Setting ArrayOperationPartialInlineSize to %d", inline_size);
|
|
ArrayOperationPartialInlineSize = inline_size;
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(OptoScheduling)) {
|
|
OptoScheduling = true;
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(AlignVector)) {
|
|
AlignVector = AvoidUnalignedAccesses;
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(UsePoly1305Intrinsics)) {
|
|
FLAG_SET_DEFAULT(UsePoly1305Intrinsics, true);
|
|
}
|
|
|
|
if (FLAG_IS_DEFAULT(UseVectorizedHashCodeIntrinsic)) {
|
|
FLAG_SET_DEFAULT(UseVectorizedHashCodeIntrinsic, true);
|
|
}
|
|
#endif
|
|
|
|
_spin_wait = get_spin_wait_desc();
|
|
|
|
check_virtualizations();
|
|
|
|
#ifdef __APPLE__
|
|
DefaultWXWriteMode = UseOldWX ? WXWrite : WXArmedForWrite;
|
|
|
|
if (TraceWXHealing) {
|
|
if (pthread_jit_write_protect_supported_np()) {
|
|
tty->print_cr("### TraceWXHealing is in use");
|
|
if (StressWXHealing) {
|
|
tty->print_cr("### StressWXHealing is in use");
|
|
}
|
|
} else {
|
|
tty->print_cr("WX Healing is not in use because MAP_JIT write protection "
|
|
"does not work on this system.");
|
|
}
|
|
}
|
|
#endif
|
|
|
|
// Sync SVE related CPU features with flags
|
|
if (UseSVE < 2) {
|
|
clear_feature(CPU_SVE2);
|
|
clear_feature(CPU_SVEBITPERM);
|
|
}
|
|
if (UseSVE < 1) {
|
|
clear_feature(CPU_SVE);
|
|
}
|
|
|
|
// Construct the "features" string
|
|
stringStream ss(512);
|
|
ss.print("0x%02x:0x%x:0x%03x:%d", _cpu, _variant, _model, _revision);
|
|
if (_model2) {
|
|
ss.print("(0x%03x)", _model2);
|
|
}
|
|
ss.print(", ");
|
|
int features_offset = (int)ss.size();
|
|
insert_features_names(_features, ss);
|
|
|
|
_cpu_info_string = ss.as_string(true);
|
|
_features_string = _cpu_info_string + features_offset;
|
|
}
|
|
|
|
void VM_Version::insert_features_names(uint64_t features, stringStream& ss) {
|
|
int i = 0;
|
|
ss.join([&]() {
|
|
while (i < MAX_CPU_FEATURES) {
|
|
if (supports_feature((VM_Version::Feature_Flag)i)) {
|
|
return _features_names[i++];
|
|
}
|
|
i += 1;
|
|
}
|
|
return (const char*)nullptr;
|
|
}, ", ");
|
|
}
|
|
|
|
#if defined(LINUX)
|
|
static bool check_info_file(const char* fpath,
|
|
const char* virt1, VirtualizationType vt1,
|
|
const char* virt2, VirtualizationType vt2) {
|
|
char line[500];
|
|
FILE* fp = os::fopen(fpath, "r");
|
|
if (fp == nullptr) {
|
|
return false;
|
|
}
|
|
while (fgets(line, sizeof(line), fp) != nullptr) {
|
|
if (strcasestr(line, virt1) != nullptr) {
|
|
Abstract_VM_Version::_detected_virtualization = vt1;
|
|
fclose(fp);
|
|
return true;
|
|
}
|
|
if (virt2 != nullptr && strcasestr(line, virt2) != nullptr) {
|
|
Abstract_VM_Version::_detected_virtualization = vt2;
|
|
fclose(fp);
|
|
return true;
|
|
}
|
|
}
|
|
fclose(fp);
|
|
return false;
|
|
}
|
|
#endif
|
|
|
|
void VM_Version::check_virtualizations() {
|
|
#if defined(LINUX)
|
|
const char* pname_file = "/sys/devices/virtual/dmi/id/product_name";
|
|
const char* tname_file = "/sys/hypervisor/type";
|
|
if (check_info_file(pname_file, "KVM", KVM, "VMWare", VMWare)) {
|
|
return;
|
|
}
|
|
check_info_file(tname_file, "Xen", XenPVHVM, nullptr, NoDetectedVirtualization);
|
|
#endif
|
|
}
|
|
|
|
void VM_Version::print_platform_virtualization_info(outputStream* st) {
|
|
#if defined(LINUX)
|
|
VirtualizationType vrt = VM_Version::get_detected_virtualization();
|
|
if (vrt == KVM) {
|
|
st->print_cr("KVM virtualization detected");
|
|
} else if (vrt == VMWare) {
|
|
st->print_cr("VMWare virtualization detected");
|
|
} else if (vrt == XenPVHVM) {
|
|
st->print_cr("Xen virtualization detected");
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void VM_Version::initialize_cpu_information(void) {
|
|
// do nothing if cpu info has been initialized
|
|
if (_initialized) {
|
|
return;
|
|
}
|
|
|
|
_no_of_cores = os::processor_count();
|
|
_no_of_threads = _no_of_cores;
|
|
_no_of_sockets = _no_of_cores;
|
|
os::snprintf_checked(_cpu_name, CPU_TYPE_DESC_BUF_SIZE - 1, "AArch64");
|
|
|
|
int desc_len = os::snprintf(_cpu_desc, CPU_DETAILED_DESC_BUF_SIZE, "AArch64 ");
|
|
get_compatible_board(_cpu_desc + desc_len, CPU_DETAILED_DESC_BUF_SIZE - desc_len);
|
|
desc_len = (int)strlen(_cpu_desc);
|
|
os::snprintf_checked(_cpu_desc + desc_len, CPU_DETAILED_DESC_BUF_SIZE - desc_len, " %s", _cpu_info_string);
|
|
|
|
_initialized = true;
|
|
}
|