8368366: RISC-V: AlignVector is mistakenly set to AvoidUnalignedAccesses

Reviewed-by: fjiang, rehn, mli
This commit is contained in:
Fei Yang 2025-09-24 11:31:09 +00:00
parent 288822a5c2
commit 2313f8e4eb

View File

@ -477,10 +477,6 @@ void VM_Version::c2_initialize() {
warning("AES/CTR intrinsics are not available on this CPU");
FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
}
if (FLAG_IS_DEFAULT(AlignVector)) {
FLAG_SET_DEFAULT(AlignVector, AvoidUnalignedAccesses);
}
}
#endif // COMPILER2