infernap12/jdk
1
0
Fork 0
mirror of https://github.com/openjdk/jdk.git synced 2026-03-11 08:23:26 +00:00
Code Issues Packages Projects Releases Wiki Activity

8357695: RISC-V: Move vector intrinsic condition checks into match_rule_supported_vector

Browse Source 
Reviewed-by: fyang, fjiang
This commit is contained in:
Dingli Zhang 2025-05-28 02:27:06 +00:00 committed by Feilong Jiang
parent 4cad437956
commit 96fb31e2db
2 changed files with 14 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/hotspot/cpu/riscv/riscv.ad
View File

@ -1882,18 +1882,6 @@ bool Matcher::match_rule_supported(int opcode) {
case Op_EncodeISOArray:
return UseRVV;
// Current test shows that, it brings performance gain when MaxVectorSize >= 32, but brings
// regression when MaxVectorSize == 16. So only enable the intrinsic when MaxVectorSize >= 32.
case Op_RoundVF:
return UseRVV && MaxVectorSize >= 32;
// For double, current test shows that even with MaxVectorSize == 32, there is still some regression.
// Although there is no hardware to verify it for now, from the trend of performance data on hardwares
// (with vlenb == 16 and 32 respectively), it's promising to bring better performance rather than
// regression for double when MaxVectorSize == 64+. So only enable the intrinsic when MaxVectorSize >= 64.
case Op_RoundVD:
return UseRVV && MaxVectorSize >= 64;
case Op_PopCountI:
case Op_PopCountL:
return UsePopCountInstruction;
@ -1917,9 +1905,6 @@ bool Matcher::match_rule_supported(int opcode) {
case Op_FmaF:
case Op_FmaD:
return UseFMA;
case Op_FmaVF:
case Op_FmaVD:
return UseRVV && UseFMA;
case Op_ConvHF2F:
case Op_ConvF2HF:

14
src/hotspot/cpu/riscv/riscv_v.ad
View File

@ -122,6 +122,20 @@ source %{
return UseZvfh;
case Op_FmaVHF:
return UseZvfh && UseFMA;
case Op_FmaVF:
case Op_FmaVD:
return UseFMA;
// For float, current test shows that, it brings performance gain when vlen >= 8, but brings
// regression when vlen == 4. So only enable this intrinsic when vlen >= 8.
// For double, current test shows that even with vlen == 4, there is still some regression.
// Although there is no hardware to verify it, from the trend of performance data on hardwares
// (with vlen == 2 and 4 respectively), it's promising to bring better performance rather than
// regression for double when vlen == 8. So only enable this intrinsic when vlen >= 8.
case Op_RoundVF:
case Op_RoundVD:
return vlen >= 8;
default:
break;
}