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Introduce and clean up umbrella headers for the files in the cpu subdirectories. Reviewed-by: lfoltan, coleenp, dholmes
789 lines
27 KiB
C++
789 lines
27 KiB
C++
/*
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* Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "asm/assembler.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "interpreter/bytecodeHistogram.hpp"
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#include "interpreter/interpreter.hpp"
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#include "interpreter/interpreterGenerator.hpp"
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#include "interpreter/interpreterRuntime.hpp"
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#include "interpreter/interp_masm.hpp"
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#include "interpreter/templateTable.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/methodData.hpp"
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#include "oops/method.hpp"
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#include "oops/oop.inline.hpp"
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#include "prims/jvmtiExport.hpp"
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#include "prims/jvmtiThreadState.hpp"
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#include "prims/methodHandles.hpp"
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#include "runtime/arguments.hpp"
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#include "runtime/deoptimization.hpp"
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#include "runtime/frame.inline.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "runtime/synchronizer.hpp"
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#include "runtime/timer.hpp"
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#include "runtime/vframeArray.hpp"
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#include "utilities/debug.hpp"
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#ifdef COMPILER1
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#include "c1/c1_Runtime1.hpp"
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#endif
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#define __ _masm->
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#ifdef PRODUCT
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#define BLOCK_COMMENT(str) // nothing
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#else
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#define BLOCK_COMMENT(str) __ block_comment(str)
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#endif
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#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
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int AbstractInterpreter::BasicType_as_index(BasicType type) {
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int i = 0;
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switch (type) {
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case T_BOOLEAN: i = 0; break;
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case T_CHAR : i = 1; break;
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case T_BYTE : i = 2; break;
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case T_SHORT : i = 3; break;
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case T_INT : i = 4; break;
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case T_LONG : i = 5; break;
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case T_VOID : i = 6; break;
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case T_FLOAT : i = 7; break;
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case T_DOUBLE : i = 8; break;
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case T_OBJECT : i = 9; break;
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case T_ARRAY : i = 9; break;
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default : ShouldNotReachHere();
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}
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assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers, "index out of bounds");
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return i;
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}
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address AbstractInterpreterGenerator::generate_slow_signature_handler() {
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// Slow_signature handler that respects the PPC C calling conventions.
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//
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// We get called by the native entry code with our output register
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// area == 8. First we call InterpreterRuntime::get_result_handler
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// to copy the pointer to the signature string temporarily to the
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// first C-argument and to return the result_handler in
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// R3_RET. Since native_entry will copy the jni-pointer to the
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// first C-argument slot later on, it is OK to occupy this slot
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// temporarilly. Then we copy the argument list on the java
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// expression stack into native varargs format on the native stack
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// and load arguments into argument registers. Integer arguments in
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// the varargs vector will be sign-extended to 8 bytes.
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//
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// On entry:
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// R3_ARG1 - intptr_t* Address of java argument list in memory.
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// R15_prev_state - BytecodeInterpreter* Address of interpreter state for
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// this method
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// R19_method
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//
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// On exit (just before return instruction):
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// R3_RET - contains the address of the result_handler.
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// R4_ARG2 - is not updated for static methods and contains "this" otherwise.
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// R5_ARG3-R10_ARG8: - When the (i-2)th Java argument is not of type float or double,
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// ARGi contains this argument. Otherwise, ARGi is not updated.
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// F1_ARG1-F13_ARG13 - contain the first 13 arguments of type float or double.
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const int LogSizeOfTwoInstructions = 3;
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// FIXME: use Argument:: GL: Argument names different numbers!
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const int max_fp_register_arguments = 13;
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const int max_int_register_arguments = 6; // first 2 are reserved
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const Register arg_java = R21_tmp1;
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const Register arg_c = R22_tmp2;
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const Register signature = R23_tmp3; // is string
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const Register sig_byte = R24_tmp4;
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const Register fpcnt = R25_tmp5;
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const Register argcnt = R26_tmp6;
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const Register intSlot = R27_tmp7;
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const Register target_sp = R28_tmp8;
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const FloatRegister floatSlot = F0;
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address entry = __ function_entry();
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__ save_LR_CR(R0);
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__ save_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
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// We use target_sp for storing arguments in the C frame.
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__ mr(target_sp, R1_SP);
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__ push_frame_reg_args_nonvolatiles(0, R11_scratch1);
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__ mr(arg_java, R3_ARG1);
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__ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_signature), R16_thread, R19_method);
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// Signature is in R3_RET. Signature is callee saved.
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__ mr(signature, R3_RET);
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// Get the result handler.
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__ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_result_handler), R16_thread, R19_method);
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{
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Label L;
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// test if static
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// _access_flags._flags must be at offset 0.
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// TODO PPC port: requires change in shared code.
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//assert(in_bytes(AccessFlags::flags_offset()) == 0,
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// "MethodDesc._access_flags == MethodDesc._access_flags._flags");
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// _access_flags must be a 32 bit value.
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assert(sizeof(AccessFlags) == 4, "wrong size");
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__ lwa(R11_scratch1/*access_flags*/, method_(access_flags));
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// testbit with condition register.
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__ testbitdi(CCR0, R0, R11_scratch1/*access_flags*/, JVM_ACC_STATIC_BIT);
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__ btrue(CCR0, L);
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// For non-static functions, pass "this" in R4_ARG2 and copy it
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// to 2nd C-arg slot.
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// We need to box the Java object here, so we use arg_java
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// (address of current Java stack slot) as argument and don't
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// dereference it as in case of ints, floats, etc.
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__ mr(R4_ARG2, arg_java);
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__ addi(arg_java, arg_java, -BytesPerWord);
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__ std(R4_ARG2, _abi(carg_2), target_sp);
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__ bind(L);
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}
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// Will be incremented directly after loop_start. argcnt=0
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// corresponds to 3rd C argument.
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__ li(argcnt, -1);
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// arg_c points to 3rd C argument
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__ addi(arg_c, target_sp, _abi(carg_3));
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// no floating-point args parsed so far
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__ li(fpcnt, 0);
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Label move_intSlot_to_ARG, move_floatSlot_to_FARG;
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Label loop_start, loop_end;
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Label do_int, do_long, do_float, do_double, do_dontreachhere, do_object, do_array, do_boxed;
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// signature points to '(' at entry
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#ifdef ASSERT
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__ lbz(sig_byte, 0, signature);
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__ cmplwi(CCR0, sig_byte, '(');
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__ bne(CCR0, do_dontreachhere);
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#endif
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__ bind(loop_start);
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__ addi(argcnt, argcnt, 1);
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__ lbzu(sig_byte, 1, signature);
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__ cmplwi(CCR0, sig_byte, ')'); // end of signature
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__ beq(CCR0, loop_end);
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__ cmplwi(CCR0, sig_byte, 'B'); // byte
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__ beq(CCR0, do_int);
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__ cmplwi(CCR0, sig_byte, 'C'); // char
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__ beq(CCR0, do_int);
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__ cmplwi(CCR0, sig_byte, 'D'); // double
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__ beq(CCR0, do_double);
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__ cmplwi(CCR0, sig_byte, 'F'); // float
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__ beq(CCR0, do_float);
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__ cmplwi(CCR0, sig_byte, 'I'); // int
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__ beq(CCR0, do_int);
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__ cmplwi(CCR0, sig_byte, 'J'); // long
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__ beq(CCR0, do_long);
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__ cmplwi(CCR0, sig_byte, 'S'); // short
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__ beq(CCR0, do_int);
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__ cmplwi(CCR0, sig_byte, 'Z'); // boolean
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__ beq(CCR0, do_int);
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__ cmplwi(CCR0, sig_byte, 'L'); // object
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__ beq(CCR0, do_object);
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__ cmplwi(CCR0, sig_byte, '['); // array
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__ beq(CCR0, do_array);
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// __ cmplwi(CCR0, sig_byte, 'V'); // void cannot appear since we do not parse the return type
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// __ beq(CCR0, do_void);
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__ bind(do_dontreachhere);
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__ unimplemented("ShouldNotReachHere in slow_signature_handler", 120);
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__ bind(do_array);
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{
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Label start_skip, end_skip;
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__ bind(start_skip);
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__ lbzu(sig_byte, 1, signature);
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__ cmplwi(CCR0, sig_byte, '[');
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__ beq(CCR0, start_skip); // skip further brackets
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__ cmplwi(CCR0, sig_byte, '9');
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__ bgt(CCR0, end_skip); // no optional size
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__ cmplwi(CCR0, sig_byte, '0');
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__ bge(CCR0, start_skip); // skip optional size
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__ bind(end_skip);
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__ cmplwi(CCR0, sig_byte, 'L');
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__ beq(CCR0, do_object); // for arrays of objects, the name of the object must be skipped
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__ b(do_boxed); // otherwise, go directly to do_boxed
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}
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__ bind(do_object);
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{
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Label L;
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__ bind(L);
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__ lbzu(sig_byte, 1, signature);
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__ cmplwi(CCR0, sig_byte, ';');
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__ bne(CCR0, L);
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}
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// Need to box the Java object here, so we use arg_java (address of
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// current Java stack slot) as argument and don't dereference it as
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// in case of ints, floats, etc.
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Label do_null;
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__ bind(do_boxed);
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__ ld(R0,0, arg_java);
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__ cmpdi(CCR0, R0, 0);
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__ li(intSlot,0);
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__ beq(CCR0, do_null);
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__ mr(intSlot, arg_java);
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__ bind(do_null);
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__ std(intSlot, 0, arg_c);
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__ addi(arg_java, arg_java, -BytesPerWord);
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__ addi(arg_c, arg_c, BytesPerWord);
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__ cmplwi(CCR0, argcnt, max_int_register_arguments);
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__ blt(CCR0, move_intSlot_to_ARG);
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__ b(loop_start);
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__ bind(do_int);
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__ lwa(intSlot, 0, arg_java);
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__ std(intSlot, 0, arg_c);
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__ addi(arg_java, arg_java, -BytesPerWord);
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__ addi(arg_c, arg_c, BytesPerWord);
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__ cmplwi(CCR0, argcnt, max_int_register_arguments);
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__ blt(CCR0, move_intSlot_to_ARG);
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__ b(loop_start);
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__ bind(do_long);
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__ ld(intSlot, -BytesPerWord, arg_java);
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__ std(intSlot, 0, arg_c);
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__ addi(arg_java, arg_java, - 2 * BytesPerWord);
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__ addi(arg_c, arg_c, BytesPerWord);
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__ cmplwi(CCR0, argcnt, max_int_register_arguments);
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__ blt(CCR0, move_intSlot_to_ARG);
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__ b(loop_start);
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__ bind(do_float);
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__ lfs(floatSlot, 0, arg_java);
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#if defined(LINUX)
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__ stfs(floatSlot, 4, arg_c);
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#elif defined(AIX)
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__ stfs(floatSlot, 0, arg_c);
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#else
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#error "unknown OS"
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#endif
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__ addi(arg_java, arg_java, -BytesPerWord);
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__ addi(arg_c, arg_c, BytesPerWord);
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__ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
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__ blt(CCR0, move_floatSlot_to_FARG);
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__ b(loop_start);
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__ bind(do_double);
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__ lfd(floatSlot, - BytesPerWord, arg_java);
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__ stfd(floatSlot, 0, arg_c);
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__ addi(arg_java, arg_java, - 2 * BytesPerWord);
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__ addi(arg_c, arg_c, BytesPerWord);
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__ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
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__ blt(CCR0, move_floatSlot_to_FARG);
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__ b(loop_start);
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__ bind(loop_end);
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__ pop_frame();
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__ restore_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
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__ restore_LR_CR(R0);
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__ blr();
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Label move_int_arg, move_float_arg;
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__ bind(move_int_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
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__ mr(R5_ARG3, intSlot); __ b(loop_start);
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__ mr(R6_ARG4, intSlot); __ b(loop_start);
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__ mr(R7_ARG5, intSlot); __ b(loop_start);
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__ mr(R8_ARG6, intSlot); __ b(loop_start);
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__ mr(R9_ARG7, intSlot); __ b(loop_start);
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__ mr(R10_ARG8, intSlot); __ b(loop_start);
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__ bind(move_float_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
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__ fmr(F1_ARG1, floatSlot); __ b(loop_start);
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__ fmr(F2_ARG2, floatSlot); __ b(loop_start);
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__ fmr(F3_ARG3, floatSlot); __ b(loop_start);
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__ fmr(F4_ARG4, floatSlot); __ b(loop_start);
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__ fmr(F5_ARG5, floatSlot); __ b(loop_start);
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__ fmr(F6_ARG6, floatSlot); __ b(loop_start);
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__ fmr(F7_ARG7, floatSlot); __ b(loop_start);
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__ fmr(F8_ARG8, floatSlot); __ b(loop_start);
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__ fmr(F9_ARG9, floatSlot); __ b(loop_start);
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__ fmr(F10_ARG10, floatSlot); __ b(loop_start);
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__ fmr(F11_ARG11, floatSlot); __ b(loop_start);
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__ fmr(F12_ARG12, floatSlot); __ b(loop_start);
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__ fmr(F13_ARG13, floatSlot); __ b(loop_start);
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__ bind(move_intSlot_to_ARG);
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__ sldi(R0, argcnt, LogSizeOfTwoInstructions);
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__ load_const(R11_scratch1, move_int_arg); // Label must be bound here.
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__ add(R11_scratch1, R0, R11_scratch1);
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__ mtctr(R11_scratch1/*branch_target*/);
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__ bctr();
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__ bind(move_floatSlot_to_FARG);
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__ sldi(R0, fpcnt, LogSizeOfTwoInstructions);
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__ addi(fpcnt, fpcnt, 1);
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__ load_const(R11_scratch1, move_float_arg); // Label must be bound here.
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__ add(R11_scratch1, R0, R11_scratch1);
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__ mtctr(R11_scratch1/*branch_target*/);
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__ bctr();
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return entry;
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}
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address AbstractInterpreterGenerator::generate_result_handler_for(BasicType type) {
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//
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// Registers alive
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// R3_RET
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// LR
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//
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// Registers updated
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// R3_RET
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//
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Label done;
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address entry = __ pc();
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switch (type) {
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case T_BOOLEAN:
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// convert !=0 to 1
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__ neg(R0, R3_RET);
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__ orr(R0, R3_RET, R0);
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__ srwi(R3_RET, R0, 31);
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break;
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case T_BYTE:
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// sign extend 8 bits
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__ extsb(R3_RET, R3_RET);
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break;
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case T_CHAR:
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// zero extend 16 bits
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__ clrldi(R3_RET, R3_RET, 48);
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break;
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case T_SHORT:
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// sign extend 16 bits
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__ extsh(R3_RET, R3_RET);
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break;
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case T_INT:
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// sign extend 32 bits
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__ extsw(R3_RET, R3_RET);
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break;
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case T_LONG:
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break;
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case T_OBJECT:
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// unbox result if not null
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__ cmpdi(CCR0, R3_RET, 0);
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__ beq(CCR0, done);
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__ ld(R3_RET, 0, R3_RET);
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__ verify_oop(R3_RET);
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break;
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case T_FLOAT:
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break;
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case T_DOUBLE:
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break;
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case T_VOID:
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break;
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default: ShouldNotReachHere();
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}
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__ BIND(done);
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__ blr();
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return entry;
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}
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// Abstract method entry.
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//
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address InterpreterGenerator::generate_abstract_entry(void) {
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address entry = __ pc();
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//
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// Registers alive
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// R16_thread - JavaThread*
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// R19_method - callee's method (method to be invoked)
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// R1_SP - SP prepared such that caller's outgoing args are near top
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// LR - return address to caller
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//
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// Stack layout at this point:
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//
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// 0 [TOP_IJAVA_FRAME_ABI] <-- R1_SP
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// alignment (optional)
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// [outgoing Java arguments]
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// ...
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// PARENT [PARENT_IJAVA_FRAME_ABI]
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// ...
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//
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// Can't use call_VM here because we have not set up a new
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// interpreter state. Make the call to the vm and make it look like
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// our caller set up the JavaFrameAnchor.
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__ set_top_ijava_frame_at_SP_as_last_Java_frame(R1_SP, R12_scratch2/*tmp*/);
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// Push a new C frame and save LR.
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__ save_LR_CR(R0);
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__ push_frame_reg_args(0, R11_scratch1);
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// This is not a leaf but we have a JavaFrameAnchor now and we will
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// check (create) exceptions afterward so this is ok.
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__ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError));
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// Pop the C frame and restore LR.
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__ pop_frame();
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__ restore_LR_CR(R0);
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// Reset JavaFrameAnchor from call_VM_leaf above.
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__ reset_last_Java_frame();
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#ifdef CC_INTERP
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// Return to frame manager, it will handle the pending exception.
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__ blr();
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#else
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// We don't know our caller, so jump to the general forward exception stub,
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// which will also pop our full frame off. Satisfy the interface of
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// SharedRuntime::generate_forward_exception()
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__ load_const_optimized(R11_scratch1, StubRoutines::forward_exception_entry(), R0);
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__ mtctr(R11_scratch1);
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__ bctr();
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#endif
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return entry;
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}
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// Call an accessor method (assuming it is resolved, otherwise drop into
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// vanilla (slow path) entry.
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address InterpreterGenerator::generate_accessor_entry(void) {
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if (!UseFastAccessorMethods && (!FLAG_IS_ERGO(UseFastAccessorMethods))) {
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return NULL;
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}
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Label Lslow_path, Lacquire;
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const Register
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Rclass_or_obj = R3_ARG1,
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Rconst_method = R4_ARG2,
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Rcodes = Rconst_method,
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Rcpool_cache = R5_ARG3,
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Rscratch = R11_scratch1,
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Rjvmti_mode = Rscratch,
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Roffset = R12_scratch2,
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Rflags = R6_ARG4,
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Rbtable = R7_ARG5;
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static address branch_table[number_of_states];
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address entry = __ pc();
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// Check for safepoint:
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// Ditch this, real man don't need safepoint checks.
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// Also check for JVMTI mode
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// Check for null obj, take slow path if so.
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__ ld(Rclass_or_obj, Interpreter::stackElementSize, CC_INTERP_ONLY(R17_tos) NOT_CC_INTERP(R15_esp));
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__ lwz(Rjvmti_mode, thread_(interp_only_mode));
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__ cmpdi(CCR1, Rclass_or_obj, 0);
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__ cmpwi(CCR0, Rjvmti_mode, 0);
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__ crorc(/*CCR0 eq*/2, /*CCR1 eq*/4+2, /*CCR0 eq*/2);
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__ beq(CCR0, Lslow_path); // this==null or jvmti_mode!=0
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// Do 2 things in parallel:
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// 1. Load the index out of the first instruction word, which looks like this:
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// <0x2a><0xb4><index (2 byte, native endianess)>.
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// 2. Load constant pool cache base.
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__ ld(Rconst_method, in_bytes(Method::const_offset()), R19_method);
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__ ld(Rcpool_cache, in_bytes(ConstMethod::constants_offset()), Rconst_method);
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__ lhz(Rcodes, in_bytes(ConstMethod::codes_offset()) + 2, Rconst_method); // Lower half of 32 bit field.
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__ ld(Rcpool_cache, ConstantPool::cache_offset_in_bytes(), Rcpool_cache);
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// Get the const pool entry by means of <index>.
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const int codes_shift = exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord);
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__ slwi(Rscratch, Rcodes, codes_shift); // (codes&0xFFFF)<<codes_shift
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__ add(Rcpool_cache, Rscratch, Rcpool_cache);
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// Check if cpool cache entry is resolved.
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// We are resolved if the indices offset contains the current bytecode.
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ByteSize cp_base_offset = ConstantPoolCache::base_offset();
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// Big Endian:
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__ lbz(Rscratch, in_bytes(cp_base_offset) + in_bytes(ConstantPoolCacheEntry::indices_offset()) + 7 - 2, Rcpool_cache);
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__ cmpwi(CCR0, Rscratch, Bytecodes::_getfield);
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__ bne(CCR0, Lslow_path);
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__ isync(); // Order succeeding loads wrt. load of _indices field from cpool_cache.
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// Finally, start loading the value: Get cp cache entry into regs.
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__ ld(Rflags, in_bytes(cp_base_offset) + in_bytes(ConstantPoolCacheEntry::flags_offset()), Rcpool_cache);
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__ ld(Roffset, in_bytes(cp_base_offset) + in_bytes(ConstantPoolCacheEntry::f2_offset()), Rcpool_cache);
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// Following code is from templateTable::getfield_or_static
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// Load pointer to branch table
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__ load_const_optimized(Rbtable, (address)branch_table, Rscratch);
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// Get volatile flag
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__ rldicl(Rscratch, Rflags, 64-ConstantPoolCacheEntry::is_volatile_shift, 63); // extract volatile bit
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// note: sync is needed before volatile load on PPC64
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// Check field type
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__ rldicl(Rflags, Rflags, 64-ConstantPoolCacheEntry::tos_state_shift, 64-ConstantPoolCacheEntry::tos_state_bits);
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#ifdef ASSERT
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Label LFlagInvalid;
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__ cmpldi(CCR0, Rflags, number_of_states);
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__ bge(CCR0, LFlagInvalid);
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__ ld(R9_ARG7, 0, R1_SP);
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__ ld(R10_ARG8, 0, R21_sender_SP);
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__ cmpd(CCR0, R9_ARG7, R10_ARG8);
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__ asm_assert_eq("backlink", 0x543);
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#endif // ASSERT
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__ mr(R1_SP, R21_sender_SP); // Cut the stack back to where the caller started.
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// Load from branch table and dispatch (volatile case: one instruction ahead)
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__ sldi(Rflags, Rflags, LogBytesPerWord);
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__ cmpwi(CCR6, Rscratch, 1); // volatile?
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if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
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__ sldi(Rscratch, Rscratch, exact_log2(BytesPerInstWord)); // volatile ? size of 1 instruction : 0
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}
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__ ldx(Rbtable, Rbtable, Rflags);
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if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
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__ subf(Rbtable, Rscratch, Rbtable); // point to volatile/non-volatile entry point
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}
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__ mtctr(Rbtable);
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__ bctr();
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#ifdef ASSERT
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__ bind(LFlagInvalid);
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__ stop("got invalid flag", 0x6541);
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bool all_uninitialized = true,
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all_initialized = true;
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for (int i = 0; i<number_of_states; ++i) {
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all_uninitialized = all_uninitialized && (branch_table[i] == NULL);
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all_initialized = all_initialized && (branch_table[i] != NULL);
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}
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assert(all_uninitialized != all_initialized, "consistency"); // either or
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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if (branch_table[vtos] == 0) branch_table[vtos] = __ pc(); // non-volatile_entry point
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if (branch_table[dtos] == 0) branch_table[dtos] = __ pc(); // non-volatile_entry point
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if (branch_table[ftos] == 0) branch_table[ftos] = __ pc(); // non-volatile_entry point
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__ stop("unexpected type", 0x6551);
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#endif
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if (branch_table[itos] == 0) { // generate only once
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__ align(32, 28, 28); // align load
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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branch_table[itos] = __ pc(); // non-volatile_entry point
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__ lwax(R3_RET, Rclass_or_obj, Roffset);
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__ beq(CCR6, Lacquire);
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__ blr();
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}
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if (branch_table[ltos] == 0) { // generate only once
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__ align(32, 28, 28); // align load
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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branch_table[ltos] = __ pc(); // non-volatile_entry point
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__ ldx(R3_RET, Rclass_or_obj, Roffset);
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__ beq(CCR6, Lacquire);
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__ blr();
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}
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if (branch_table[btos] == 0) { // generate only once
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__ align(32, 28, 28); // align load
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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branch_table[btos] = __ pc(); // non-volatile_entry point
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__ lbzx(R3_RET, Rclass_or_obj, Roffset);
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__ extsb(R3_RET, R3_RET);
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__ beq(CCR6, Lacquire);
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__ blr();
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}
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if (branch_table[ctos] == 0) { // generate only once
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__ align(32, 28, 28); // align load
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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branch_table[ctos] = __ pc(); // non-volatile_entry point
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__ lhzx(R3_RET, Rclass_or_obj, Roffset);
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__ beq(CCR6, Lacquire);
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__ blr();
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}
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if (branch_table[stos] == 0) { // generate only once
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__ align(32, 28, 28); // align load
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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branch_table[stos] = __ pc(); // non-volatile_entry point
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__ lhax(R3_RET, Rclass_or_obj, Roffset);
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__ beq(CCR6, Lacquire);
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__ blr();
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}
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if (branch_table[atos] == 0) { // generate only once
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__ align(32, 28, 28); // align load
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__ fence(); // volatile entry point (one instruction before non-volatile_entry point)
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branch_table[atos] = __ pc(); // non-volatile_entry point
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__ load_heap_oop(R3_RET, (RegisterOrConstant)Roffset, Rclass_or_obj);
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__ verify_oop(R3_RET);
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//__ dcbt(R3_RET); // prefetch
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__ beq(CCR6, Lacquire);
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__ blr();
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}
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__ align(32, 12);
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__ bind(Lacquire);
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__ twi_0(R3_RET);
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__ isync(); // acquire
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__ blr();
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#ifdef ASSERT
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for (int i = 0; i<number_of_states; ++i) {
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assert(branch_table[i], "accessor_entry initialization");
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//tty->print_cr("accessor_entry: branch_table[%d] = 0x%llx (opcode 0x%llx)", i, branch_table[i], *((unsigned int*)branch_table[i]));
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}
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#endif
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__ bind(Lslow_path);
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__ branch_to_entry(Interpreter::entry_for_kind(Interpreter::zerolocals), Rscratch);
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__ flush();
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return entry;
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}
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// Interpreter intrinsic for WeakReference.get().
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// 1. Don't push a full blown frame and go on dispatching, but fetch the value
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// into R8 and return quickly
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// 2. If G1 is active we *must* execute this intrinsic for corrrectness:
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// It contains a GC barrier which puts the reference into the satb buffer
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// to indicate that someone holds a strong reference to the object the
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// weak ref points to!
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address InterpreterGenerator::generate_Reference_get_entry(void) {
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// Code: _aload_0, _getfield, _areturn
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// parameter size = 1
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//
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// The code that gets generated by this routine is split into 2 parts:
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// 1. the "intrinsified" code for G1 (or any SATB based GC),
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// 2. the slow path - which is an expansion of the regular method entry.
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//
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// Notes:
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// * In the G1 code we do not check whether we need to block for
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// a safepoint. If G1 is enabled then we must execute the specialized
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// code for Reference.get (except when the Reference object is null)
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// so that we can log the value in the referent field with an SATB
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// update buffer.
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// If the code for the getfield template is modified so that the
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// G1 pre-barrier code is executed when the current method is
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// Reference.get() then going through the normal method entry
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// will be fine.
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// * The G1 code can, however, check the receiver object (the instance
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// of java.lang.Reference) and jump to the slow path if null. If the
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// Reference object is null then we obviously cannot fetch the referent
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// and so we don't need to call the G1 pre-barrier. Thus we can use the
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// regular method entry code to generate the NPE.
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//
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// This code is based on generate_accessor_enty.
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address entry = __ pc();
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const int referent_offset = java_lang_ref_Reference::referent_offset;
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guarantee(referent_offset > 0, "referent offset not initialized");
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if (UseG1GC) {
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Label slow_path;
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// Debugging not possible, so can't use __ skip_if_jvmti_mode(slow_path, GR31_SCRATCH);
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// In the G1 code we don't check if we need to reach a safepoint. We
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// continue and the thread will safepoint at the next bytecode dispatch.
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// If the receiver is null then it is OK to jump to the slow path.
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__ ld(R3_RET, Interpreter::stackElementSize, CC_INTERP_ONLY(R17_tos) NOT_CC_INTERP(R15_esp)); // get receiver
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// Check if receiver == NULL and go the slow path.
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__ cmpdi(CCR0, R3_RET, 0);
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__ beq(CCR0, slow_path);
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// Load the value of the referent field.
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__ load_heap_oop(R3_RET, referent_offset, R3_RET);
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// Generate the G1 pre-barrier code to log the value of
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// the referent field in an SATB buffer. Note with
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// these parameters the pre-barrier does not generate
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// the load of the previous value.
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// Restore caller sp for c2i case.
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#ifdef ASSERT
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__ ld(R9_ARG7, 0, R1_SP);
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__ ld(R10_ARG8, 0, R21_sender_SP);
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__ cmpd(CCR0, R9_ARG7, R10_ARG8);
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__ asm_assert_eq("backlink", 0x544);
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#endif // ASSERT
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__ mr(R1_SP, R21_sender_SP); // Cut the stack back to where the caller started.
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__ g1_write_barrier_pre(noreg, // obj
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noreg, // offset
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R3_RET, // pre_val
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R11_scratch1, // tmp
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R12_scratch2, // tmp
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true); // needs_frame
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__ blr();
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// Generate regular method entry.
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__ bind(slow_path);
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__ branch_to_entry(Interpreter::entry_for_kind(Interpreter::zerolocals), R11_scratch1);
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__ flush();
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return entry;
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} else {
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return generate_accessor_entry();
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}
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}
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void Deoptimization::unwind_callee_save_values(frame* f, vframeArray* vframe_array) {
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// This code is sort of the equivalent of C2IAdapter::setup_stack_frame back in
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// the days we had adapter frames. When we deoptimize a situation where a
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// compiled caller calls a compiled caller will have registers it expects
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// to survive the call to the callee. If we deoptimize the callee the only
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// way we can restore these registers is to have the oldest interpreter
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// frame that we create restore these values. That is what this routine
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// will accomplish.
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// At the moment we have modified c2 to not have any callee save registers
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// so this problem does not exist and this routine is just a place holder.
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assert(f->is_interpreted_frame(), "must be interpreted");
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}
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